src/cpu/x86/vm/c1_LIRAssembler_x86.cpp

rev 12906 : [mq]: gc_interface

@@ -1860,24 +1860,25 @@
 
 }
 
 
 void LIR_Assembler::emit_compare_and_swap(LIR_OpCompareAndSwap* op) {
+  LIR_Address* address = op->addr()->as_address_ptr();
   if (LP64_ONLY(false &&) op->code() == lir_cas_long && VM_Version::supports_cx8()) {
     assert(op->cmp_value()->as_register_lo() == rax, "wrong register");
     assert(op->cmp_value()->as_register_hi() == rdx, "wrong register");
     assert(op->new_value()->as_register_lo() == rbx, "wrong register");
     assert(op->new_value()->as_register_hi() == rcx, "wrong register");
-    Register addr = op->addr()->as_register();
+    Register addr = address->base()->as_pointer_register();
     if (os::is_MP()) {
       __ lock();
     }
     NOT_LP64(__ cmpxchg8(Address(addr, 0)));
 
   } else if (op->code() == lir_cas_int || op->code() == lir_cas_obj ) {
     NOT_LP64(assert(op->addr()->is_single_cpu(), "must be single");)
-    Register addr = (op->addr()->is_single_cpu() ? op->addr()->as_register() : op->addr()->as_register_lo());
+    Register addr = address->base()->as_pointer_register();
     Register newval = op->new_value()->as_register();
     Register cmpval = op->cmp_value()->as_register();
     assert(cmpval == rax, "wrong register");
     assert(newval != NULL, "new val must be register");
     assert(cmpval != newval, "cmp and new values must be in different registers");

@@ -1910,11 +1911,11 @@
       }
       __ cmpxchgl(newval, Address(addr, 0));
     }
 #ifdef _LP64
   } else if (op->code() == lir_cas_long) {
-    Register addr = (op->addr()->is_single_cpu() ? op->addr()->as_register() : op->addr()->as_register_lo());
+    Register addr = address->base()->as_pointer_register();
     Register newval = op->new_value()->as_register_lo();
     Register cmpval = op->cmp_value()->as_register_lo();
     assert(cmpval == rax, "wrong register");
     assert(newval != NULL, "new val must be register");
     assert(cmpval != newval, "cmp and new values must be in different registers");