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src/cpu/aarch64/vm/aarch64.ad

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rev 11942 : 8247979: aarch64: missing side effect of killing flags for clearArray_reg_reg
Reviewed-by: adinn
Contributed-by: wangyadong4@huawei.com


12356   effect(DEF dst, USE src);
12357 
12358   ins_cost(INSN_COST);
12359 
12360   format %{ "fmovd $dst, $src\t# MoveL2D_reg_reg" %}
12361 
12362   ins_encode %{
12363     __ fmovd(as_FloatRegister($dst$$reg), $src$$Register);
12364   %}
12365 
12366   ins_pipe(fp_l2d);
12367 
12368 %}
12369 
12370 // ============================================================================
12371 // clearing of an array
12372 
12373 instruct clearArray_reg_reg(iRegL_R11 cnt, iRegP_R10 base, Universe dummy, rFlagsReg cr)
12374 %{
12375   match(Set dummy (ClearArray cnt base));
12376   effect(USE_KILL cnt, USE_KILL base);
12377 
12378   ins_cost(4 * INSN_COST);
12379   format %{ "ClearArray $cnt, $base" %}
12380 
12381   ins_encode %{
12382     __ zero_words($base$$Register, $cnt$$Register);
12383   %}
12384 
12385   ins_pipe(pipe_class_memory);
12386 %}
12387 
12388 instruct clearArray_imm_reg(immL cnt, iRegP_R10 base, iRegL_R11 tmp, Universe dummy, rFlagsReg cr)
12389 %{
12390   match(Set dummy (ClearArray cnt base));
12391   effect(USE_KILL base, TEMP tmp);
12392 
12393   ins_cost(4 * INSN_COST);
12394   format %{ "ClearArray $cnt, $base" %}
12395 
12396   ins_encode %{
12397     __ zero_words($base$$Register, (u_int64_t)$cnt$$constant);
12398   %}
12399 
12400   ins_pipe(pipe_class_memory);
12401 %}
12402 
12403 // ============================================================================
12404 // Overflow Math Instructions
12405 
12406 instruct overflowAddI_reg_reg(rFlagsReg cr, iRegIorL2I op1, iRegIorL2I op2)
12407 %{
12408   match(Set cr (OverflowAddI op1 op2));
12409 
12410   format %{ "cmnw  $op1, $op2\t# overflow check int" %}
12411   ins_cost(INSN_COST);




12356   effect(DEF dst, USE src);
12357 
12358   ins_cost(INSN_COST);
12359 
12360   format %{ "fmovd $dst, $src\t# MoveL2D_reg_reg" %}
12361 
12362   ins_encode %{
12363     __ fmovd(as_FloatRegister($dst$$reg), $src$$Register);
12364   %}
12365 
12366   ins_pipe(fp_l2d);
12367 
12368 %}
12369 
12370 // ============================================================================
12371 // clearing of an array
12372 
12373 instruct clearArray_reg_reg(iRegL_R11 cnt, iRegP_R10 base, Universe dummy, rFlagsReg cr)
12374 %{
12375   match(Set dummy (ClearArray cnt base));
12376   effect(USE_KILL cnt, USE_KILL base, KILL cr);
12377 
12378   ins_cost(4 * INSN_COST);
12379   format %{ "ClearArray $cnt, $base" %}
12380 
12381   ins_encode %{
12382     __ zero_words($base$$Register, $cnt$$Register);
12383   %}
12384 
12385   ins_pipe(pipe_class_memory);
12386 %}
12387 
12388 instruct clearArray_imm_reg(immL cnt, iRegP_R10 base, iRegL_R11 tmp, Universe dummy, rFlagsReg cr)
12389 %{
12390   match(Set dummy (ClearArray cnt base));
12391   effect(USE_KILL base, TEMP tmp, KILL cr);
12392 
12393   ins_cost(4 * INSN_COST);
12394   format %{ "ClearArray $cnt, $base" %}
12395 
12396   ins_encode %{
12397     __ zero_words($base$$Register, (u_int64_t)$cnt$$constant);
12398   %}
12399 
12400   ins_pipe(pipe_class_memory);
12401 %}
12402 
12403 // ============================================================================
12404 // Overflow Math Instructions
12405 
12406 instruct overflowAddI_reg_reg(rFlagsReg cr, iRegIorL2I op1, iRegIorL2I op2)
12407 %{
12408   match(Set cr (OverflowAddI op1 op2));
12409 
12410   format %{ "cmnw  $op1, $op2\t# overflow check int" %}
12411   ins_cost(INSN_COST);
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