1 /*
2 * Copyright (c) 2005, 2018, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2012, 2017, SAP SE. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "precompiled.hpp"
27 #include "c1/c1_Compilation.hpp"
28 #include "c1/c1_FrameMap.hpp"
29 #include "c1/c1_Instruction.hpp"
30 #include "c1/c1_LIRAssembler.hpp"
31 #include "c1/c1_LIRGenerator.hpp"
32 #include "c1/c1_Runtime1.hpp"
33 #include "c1/c1_ValueStack.hpp"
34 #include "ci/ciArray.hpp"
35 #include "ci/ciObjArrayKlass.hpp"
36 #include "ci/ciTypeArrayKlass.hpp"
37 #include "runtime/sharedRuntime.hpp"
38 #include "runtime/stubRoutines.hpp"
39 #include "vmreg_ppc.inline.hpp"
40
41 #ifdef ASSERT
42 #define __ gen()->lir(__FILE__, __LINE__)->
43 #else
44 #define __ gen()->lir()->
45 #endif
46
47 void LIRItem::load_byte_item() {
48 // Byte loads use same registers as other loads.
49 load_item();
50 }
51
52
53 void LIRItem::load_nonconstant() {
54 LIR_Opr r = value()->operand();
55 if (_gen->can_inline_as_constant(value())) {
56 if (!r->is_constant()) {
57 r = LIR_OprFact::value_type(value()->type());
58 }
59 _result = r;
60 } else {
61 load_item();
62 }
63 }
64
65
66 //--------------------------------------------------------------
67 // LIRGenerator
68 //--------------------------------------------------------------
69
70 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::R3_oop_opr; }
71 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::R4_opr; }
72 LIR_Opr LIRGenerator::syncLockOpr() { return FrameMap::R5_opr; } // Need temp effect for MonitorEnterStub.
73 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::R4_oop_opr; } // Need temp effect for MonitorEnterStub.
74 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; } // not needed
75
76 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
77 LIR_Opr opr;
78 switch (type->tag()) {
79 case intTag: opr = FrameMap::R3_opr; break;
80 case objectTag: opr = FrameMap::R3_oop_opr; break;
81 case longTag: opr = FrameMap::R3_long_opr; break;
82 case floatTag: opr = FrameMap::F1_opr; break;
83 case doubleTag: opr = FrameMap::F1_double_opr; break;
84
85 case addressTag:
86 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
87 }
88
89 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
90 return opr;
91 }
92
93 LIR_Opr LIRGenerator::rlock_callee_saved(BasicType type) {
94 ShouldNotReachHere();
95 return LIR_OprFact::illegalOpr;
96 }
97
98
99 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
100 return new_register(T_INT);
101 }
102
103
104 //--------- loading items into registers --------------------------------
105
106 // PPC cannot inline all constants.
107 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
108 if (v->type()->as_IntConstant() != NULL) {
109 return Assembler::is_simm16(v->type()->as_IntConstant()->value());
110 } else if (v->type()->as_LongConstant() != NULL) {
111 return Assembler::is_simm16(v->type()->as_LongConstant()->value());
112 } else if (v->type()->as_ObjectConstant() != NULL) {
113 return v->type()->as_ObjectConstant()->value()->is_null_object();
114 } else {
115 return false;
116 }
117 }
118
119
120 // Only simm16 constants can be inlined.
121 bool LIRGenerator::can_inline_as_constant(Value i) const {
122 return can_store_as_constant(i, as_BasicType(i->type()));
123 }
124
125
126 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
127 if (c->type() == T_INT) {
128 return Assembler::is_simm16(c->as_jint());
129 }
130 if (c->type() == T_LONG) {
131 return Assembler::is_simm16(c->as_jlong());
132 }
133 if (c->type() == T_OBJECT) {
134 return c->as_jobject() == NULL;
135 }
136 return false;
137 }
138
139
140 LIR_Opr LIRGenerator::safepoint_poll_register() {
141 return new_register(T_INT);
142 }
143
144
145 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
146 int shift, int disp, BasicType type) {
147 assert(base->is_register(), "must be");
148 intx large_disp = disp;
149
150 // Accumulate fixed displacements.
151 if (index->is_constant()) {
152 large_disp += (intx)(index->as_constant_ptr()->as_jint()) << shift;
153 index = LIR_OprFact::illegalOpr;
154 }
155
156 if (index->is_register()) {
157 // Apply the shift and accumulate the displacement.
158 if (shift > 0) {
159 LIR_Opr tmp = new_pointer_register();
160 __ shift_left(index, shift, tmp);
161 index = tmp;
162 }
163 if (large_disp != 0) {
164 LIR_Opr tmp = new_pointer_register();
165 if (Assembler::is_simm16(large_disp)) {
166 __ add(index, LIR_OprFact::intptrConst(large_disp), tmp);
167 index = tmp;
168 } else {
169 __ move(LIR_OprFact::intptrConst(large_disp), tmp);
170 __ add(tmp, index, tmp);
171 index = tmp;
172 }
173 large_disp = 0;
174 }
175 } else if (!Assembler::is_simm16(large_disp)) {
176 // Index is illegal so replace it with the displacement loaded into a register.
177 index = new_pointer_register();
178 __ move(LIR_OprFact::intptrConst(large_disp), index);
179 large_disp = 0;
180 }
181
182 // At this point we either have base + index or base + displacement.
183 if (large_disp == 0) {
184 return new LIR_Address(base, index, type);
185 } else {
186 assert(Assembler::is_simm16(large_disp), "must be");
187 return new LIR_Address(base, large_disp, type);
188 }
189 }
190
191
192 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
193 BasicType type, bool needs_card_mark) {
194 int elem_size = type2aelembytes(type);
195 int shift = exact_log2(elem_size);
196
197 LIR_Opr base_opr;
198 intx offset = arrayOopDesc::base_offset_in_bytes(type);
199
200 if (index_opr->is_constant()) {
201 intx i = index_opr->as_constant_ptr()->as_jint();
202 intx array_offset = i * elem_size;
203 if (Assembler::is_simm16(array_offset + offset)) {
204 base_opr = array_opr;
205 offset = array_offset + offset;
206 } else {
207 base_opr = new_pointer_register();
208 if (Assembler::is_simm16(array_offset)) {
209 __ add(array_opr, LIR_OprFact::intptrConst(array_offset), base_opr);
210 } else {
211 __ move(LIR_OprFact::intptrConst(array_offset), base_opr);
212 __ add(base_opr, array_opr, base_opr);
213 }
214 }
215 } else {
216 #ifdef _LP64
217 if (index_opr->type() == T_INT) {
218 LIR_Opr tmp = new_register(T_LONG);
219 __ convert(Bytecodes::_i2l, index_opr, tmp);
220 index_opr = tmp;
221 }
222 #endif
223
224 base_opr = new_pointer_register();
225 assert (index_opr->is_register(), "Must be register");
226 if (shift > 0) {
227 __ shift_left(index_opr, shift, base_opr);
228 __ add(base_opr, array_opr, base_opr);
229 } else {
230 __ add(index_opr, array_opr, base_opr);
231 }
232 }
233 if (needs_card_mark) {
234 LIR_Opr ptr = new_pointer_register();
235 __ add(base_opr, LIR_OprFact::intptrConst(offset), ptr);
236 return new LIR_Address(ptr, type);
237 } else {
238 return new LIR_Address(base_opr, offset, type);
239 }
240 }
241
242
243 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
244 LIR_Opr r = NULL;
245 if (type == T_LONG) {
246 r = LIR_OprFact::longConst(x);
247 } else if (type == T_INT) {
248 r = LIR_OprFact::intConst(x);
249 } else {
250 ShouldNotReachHere();
251 }
252 if (!Assembler::is_simm16(x)) {
253 LIR_Opr tmp = new_register(type);
254 __ move(r, tmp);
255 return tmp;
256 }
257 return r;
258 }
259
260
261 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
262 LIR_Opr pointer = new_pointer_register();
263 __ move(LIR_OprFact::intptrConst(counter), pointer);
264 LIR_Address* addr = new LIR_Address(pointer, type);
265 increment_counter(addr, step);
266 }
267
268
269 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
270 LIR_Opr temp = new_register(addr->type());
271 __ move(addr, temp);
272 __ add(temp, load_immediate(step, addr->type()), temp);
273 __ move(temp, addr);
274 }
275
276
277 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
278 LIR_Opr tmp = FrameMap::R0_opr;
279 __ load(new LIR_Address(base, disp, T_INT), tmp, info);
280 __ cmp(condition, tmp, c);
281 }
282
283
284 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base,
285 int disp, BasicType type, CodeEmitInfo* info) {
286 LIR_Opr tmp = FrameMap::R0_opr;
287 __ load(new LIR_Address(base, disp, type), tmp, info);
288 __ cmp(condition, reg, tmp);
289 }
290
291
292 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, int c, LIR_Opr result, LIR_Opr tmp) {
293 assert(left != result, "should be different registers");
294 if (is_power_of_2(c + 1)) {
295 __ shift_left(left, log2_intptr(c + 1), result);
296 __ sub(result, left, result);
297 return true;
298 } else if (is_power_of_2(c - 1)) {
299 __ shift_left(left, log2_intptr(c - 1), result);
300 __ add(result, left, result);
301 return true;
302 }
303 return false;
304 }
305
306
307 void LIRGenerator::store_stack_parameter(LIR_Opr item, ByteSize offset_from_sp) {
308 BasicType t = item->type();
309 LIR_Opr sp_opr = FrameMap::SP_opr;
310 if ((t == T_LONG || t == T_DOUBLE) &&
311 ((in_bytes(offset_from_sp) - STACK_BIAS) % 8 != 0)) {
312 __ unaligned_move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
313 } else {
314 __ move(item, new LIR_Address(sp_opr, in_bytes(offset_from_sp), t));
315 }
316 }
317
318
319 //----------------------------------------------------------------------
320 // visitor functions
321 //----------------------------------------------------------------------
322
323 void LIRGenerator::do_StoreIndexed(StoreIndexed* x) {
324 assert(x->is_pinned(),"");
325 bool needs_range_check = x->compute_needs_range_check();
326 bool use_length = x->length() != NULL;
327 bool obj_store = x->elt_type() == T_ARRAY || x->elt_type() == T_OBJECT;
328 bool needs_store_check = obj_store && (x->value()->as_Constant() == NULL ||
329 !get_jobject_constant(x->value())->is_null_object() ||
330 x->should_profile());
331
332 LIRItem array(x->array(), this);
333 LIRItem index(x->index(), this);
334 LIRItem value(x->value(), this);
335 LIRItem length(this);
336
337 array.load_item();
338 index.load_nonconstant();
339
340 if (use_length && needs_range_check) {
341 length.set_instruction(x->length());
342 length.load_item();
343 }
344 if (needs_store_check || x->check_boolean()) {
345 value.load_item();
346 } else {
347 value.load_for_store(x->elt_type());
348 }
349
350 set_no_result(x);
351
352 // The CodeEmitInfo must be duplicated for each different
353 // LIR-instruction because spilling can occur anywhere between two
354 // instructions and so the debug information must be different.
355 CodeEmitInfo* range_check_info = state_for(x);
356 CodeEmitInfo* null_check_info = NULL;
357 if (x->needs_null_check()) {
358 null_check_info = new CodeEmitInfo(range_check_info);
359 }
360
361 // Emit array address setup early so it schedules better.
362 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
363
364 if (GenerateRangeChecks && needs_range_check) {
365 if (use_length) {
366 __ cmp(lir_cond_belowEqual, length.result(), index.result());
367 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result(), array.result()));
368 } else {
369 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
370 // Range_check also does the null check.
371 null_check_info = NULL;
372 }
373 }
374
375 if (GenerateArrayStoreCheck && needs_store_check) {
376 // Following registers are used by slow_subtype_check:
377 LIR_Opr tmp1 = FrameMap::R4_opr; // super_klass
378 LIR_Opr tmp2 = FrameMap::R5_opr; // sub_klass
379 LIR_Opr tmp3 = FrameMap::R6_opr; // temp
380
381 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
382 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3,
383 store_check_info, x->profiled_method(), x->profiled_bci());
384 }
385
386 if (obj_store) {
387 // Needs GC write barriers.
388 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
389 true /* do_load */, false /* patch */, NULL);
390 }
391 LIR_Opr result = maybe_mask_boolean(x, array.result(), value.result(), null_check_info);
392 __ move(result, array_addr, null_check_info);
393 if (obj_store) {
394 // Precise card mark.
395 post_barrier(LIR_OprFact::address(array_addr), value.result());
396 }
397 }
398
399
400 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
401 assert(x->is_pinned(),"");
402 LIRItem obj(x->obj(), this);
403 obj.load_item();
404
405 set_no_result(x);
406
407 // We use R4+R5 in order to get a temp effect. These regs are used in slow path (MonitorEnterStub).
408 LIR_Opr lock = FrameMap::R5_opr;
409 LIR_Opr scratch = FrameMap::R4_opr;
410 LIR_Opr hdr = FrameMap::R6_opr;
411
412 CodeEmitInfo* info_for_exception = NULL;
413 if (x->needs_null_check()) {
414 info_for_exception = state_for(x);
415 }
416
417 // This CodeEmitInfo must not have the xhandlers because here the
418 // object is already locked (xhandlers expects object to be unlocked).
419 CodeEmitInfo* info = state_for(x, x->state(), true);
420 monitor_enter(obj.result(), lock, hdr, scratch, x->monitor_no(), info_for_exception, info);
421 }
422
423
424 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
425 assert(x->is_pinned(),"");
426 LIRItem obj(x->obj(), this);
427 obj.dont_load_item();
428
429 set_no_result(x);
430 LIR_Opr lock = FrameMap::R5_opr;
431 LIR_Opr hdr = FrameMap::R4_opr; // Used for slow path (MonitorExitStub).
432 LIR_Opr obj_temp = FrameMap::R6_opr;
433 monitor_exit(obj_temp, lock, hdr, LIR_OprFact::illegalOpr, x->monitor_no());
434 }
435
436
437 // _ineg, _lneg, _fneg, _dneg
438 void LIRGenerator::do_NegateOp(NegateOp* x) {
439 LIRItem value(x->x(), this);
440 value.load_item();
441 LIR_Opr reg = rlock_result(x);
442 __ negate(value.result(), reg);
443 }
444
445
446 // for _fadd, _fmul, _fsub, _fdiv, _frem
447 // _dadd, _dmul, _dsub, _ddiv, _drem
448 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
449 switch (x->op()) {
450 case Bytecodes::_fadd:
451 case Bytecodes::_fmul:
452 case Bytecodes::_fsub:
453 case Bytecodes::_fdiv:
454 case Bytecodes::_dadd:
455 case Bytecodes::_dmul:
456 case Bytecodes::_dsub:
457 case Bytecodes::_ddiv: {
458 LIRItem left(x->x(), this);
459 LIRItem right(x->y(), this);
460 left.load_item();
461 right.load_item();
462 rlock_result(x);
463 arithmetic_op_fpu(x->op(), x->operand(), left.result(), right.result(), x->is_strictfp());
464 }
465 break;
466
467 case Bytecodes::_frem:
468 case Bytecodes::_drem: {
469 address entry = NULL;
470 switch (x->op()) {
471 case Bytecodes::_frem:
472 entry = CAST_FROM_FN_PTR(address, SharedRuntime::frem);
473 break;
474 case Bytecodes::_drem:
475 entry = CAST_FROM_FN_PTR(address, SharedRuntime::drem);
476 break;
477 default:
478 ShouldNotReachHere();
479 }
480 LIR_Opr result = call_runtime(x->x(), x->y(), entry, x->type(), NULL);
481 set_result(x, result);
482 }
483 break;
484
485 default: ShouldNotReachHere();
486 }
487 }
488
489
490 // for _ladd, _lmul, _lsub, _ldiv, _lrem
491 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
492 bool is_div_rem = x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem;
493
494 LIRItem right(x->y(), this);
495 // Missing test if instr is commutative and if we should swap.
496 if (right.value()->type()->as_LongConstant() &&
497 (x->op() == Bytecodes::_lsub && right.value()->type()->as_LongConstant()->value() == ((-1)<<15)) ) {
498 // Sub is implemented by addi and can't support min_simm16 as constant..
499 right.load_item();
500 } else {
501 right.load_nonconstant();
502 }
503 assert(right.is_constant() || right.is_register(), "wrong state of right");
504
505 if (is_div_rem) {
506 LIR_Opr divisor = right.result();
507 if (divisor->is_register()) {
508 CodeEmitInfo* null_check_info = state_for(x);
509 __ cmp(lir_cond_equal, divisor, LIR_OprFact::longConst(0));
510 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(null_check_info));
511 } else {
512 jlong const_divisor = divisor->as_constant_ptr()->as_jlong();
513 if (const_divisor == 0) {
514 CodeEmitInfo* null_check_info = state_for(x);
515 __ jump(new DivByZeroStub(null_check_info));
516 rlock_result(x);
517 __ move(LIR_OprFact::longConst(0), x->operand()); // dummy
518 return;
519 }
520 if (x->op() == Bytecodes::_lrem && !is_power_of_2(const_divisor) && const_divisor != -1) {
521 // Remainder computation would need additional tmp != R0.
522 right.load_item();
523 }
524 }
525 }
526
527 LIRItem left(x->x(), this);
528 left.load_item();
529 rlock_result(x);
530 if (is_div_rem) {
531 CodeEmitInfo* info = NULL; // Null check already done above.
532 LIR_Opr tmp = FrameMap::R0_opr;
533 if (x->op() == Bytecodes::_lrem) {
534 __ irem(left.result(), right.result(), x->operand(), tmp, info);
535 } else if (x->op() == Bytecodes::_ldiv) {
536 __ idiv(left.result(), right.result(), x->operand(), tmp, info);
537 }
538 } else {
539 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
540 }
541 }
542
543
544 // for: _iadd, _imul, _isub, _idiv, _irem
545 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
546 bool is_div_rem = x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem;
547
548 LIRItem right(x->y(), this);
549 // Missing test if instr is commutative and if we should swap.
550 if (right.value()->type()->as_IntConstant() &&
551 (x->op() == Bytecodes::_isub && right.value()->type()->as_IntConstant()->value() == ((-1)<<15)) ) {
552 // Sub is implemented by addi and can't support min_simm16 as constant.
553 right.load_item();
554 } else {
555 right.load_nonconstant();
556 }
557 assert(right.is_constant() || right.is_register(), "wrong state of right");
558
559 if (is_div_rem) {
560 LIR_Opr divisor = right.result();
561 if (divisor->is_register()) {
562 CodeEmitInfo* null_check_info = state_for(x);
563 __ cmp(lir_cond_equal, divisor, LIR_OprFact::intConst(0));
564 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(null_check_info));
565 } else {
566 jint const_divisor = divisor->as_constant_ptr()->as_jint();
567 if (const_divisor == 0) {
568 CodeEmitInfo* null_check_info = state_for(x);
569 __ jump(new DivByZeroStub(null_check_info));
570 rlock_result(x);
571 __ move(LIR_OprFact::intConst(0), x->operand()); // dummy
572 return;
573 }
574 if (x->op() == Bytecodes::_irem && !is_power_of_2(const_divisor) && const_divisor != -1) {
575 // Remainder computation would need additional tmp != R0.
576 right.load_item();
577 }
578 }
579 }
580
581 LIRItem left(x->x(), this);
582 left.load_item();
583 rlock_result(x);
584 if (is_div_rem) {
585 CodeEmitInfo* info = NULL; // Null check already done above.
586 LIR_Opr tmp = FrameMap::R0_opr;
587 if (x->op() == Bytecodes::_irem) {
588 __ irem(left.result(), right.result(), x->operand(), tmp, info);
589 } else if (x->op() == Bytecodes::_idiv) {
590 __ idiv(left.result(), right.result(), x->operand(), tmp, info);
591 }
592 } else {
593 arithmetic_op_int(x->op(), x->operand(), left.result(), right.result(), FrameMap::R0_opr);
594 }
595 }
596
597
598 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
599 ValueTag tag = x->type()->tag();
600 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
601 switch (tag) {
602 case floatTag:
603 case doubleTag: do_ArithmeticOp_FPU(x); return;
604 case longTag: do_ArithmeticOp_Long(x); return;
605 case intTag: do_ArithmeticOp_Int(x); return;
606 }
607 ShouldNotReachHere();
608 }
609
610
611 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
612 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
613 LIRItem value(x->x(), this);
614 LIRItem count(x->y(), this);
615 value.load_item();
616 LIR_Opr reg = rlock_result(x);
617 LIR_Opr mcount;
618 if (count.result()->is_register()) {
619 mcount = FrameMap::R0_opr;
620 } else {
621 mcount = LIR_OprFact::illegalOpr;
622 }
623 shift_op(x->op(), reg, value.result(), count.result(), mcount);
624 }
625
626
627 inline bool can_handle_logic_op_as_uimm(ValueType *type, Bytecodes::Code bc) {
628 jlong int_or_long_const;
629 if (type->as_IntConstant()) {
630 int_or_long_const = type->as_IntConstant()->value();
631 } else if (type->as_LongConstant()) {
632 int_or_long_const = type->as_LongConstant()->value();
633 } else if (type->as_ObjectConstant()) {
634 return type->as_ObjectConstant()->value()->is_null_object();
635 } else {
636 return false;
637 }
638
639 if (Assembler::is_uimm(int_or_long_const, 16)) return true;
640 if ((int_or_long_const & 0xFFFF) == 0 &&
641 Assembler::is_uimm((jlong)((julong)int_or_long_const >> 16), 16)) return true;
642
643 // see Assembler::andi
644 if (bc == Bytecodes::_iand &&
645 (is_power_of_2_long(int_or_long_const+1) ||
646 is_power_of_2_long(int_or_long_const) ||
647 is_power_of_2_long(-int_or_long_const))) return true;
648 if (bc == Bytecodes::_land &&
649 (is_power_of_2_long(int_or_long_const+1) ||
650 (Assembler::is_uimm(int_or_long_const, 32) && is_power_of_2_long(int_or_long_const)) ||
651 (int_or_long_const != min_jlong && is_power_of_2_long(-int_or_long_const)))) return true;
652
653 // special case: xor -1
654 if ((bc == Bytecodes::_ixor || bc == Bytecodes::_lxor) &&
655 int_or_long_const == -1) return true;
656 return false;
657 }
658
659
660 // _iand, _land, _ior, _lor, _ixor, _lxor
661 void LIRGenerator::do_LogicOp(LogicOp* x) {
662 LIRItem left(x->x(), this);
663 LIRItem right(x->y(), this);
664
665 left.load_item();
666
667 Value rval = right.value();
668 LIR_Opr r = rval->operand();
669 ValueType *type = rval->type();
670 // Logic instructions use unsigned immediate values.
671 if (can_handle_logic_op_as_uimm(type, x->op())) {
672 if (!r->is_constant()) {
673 r = LIR_OprFact::value_type(type);
674 rval->set_operand(r);
675 }
676 right.set_result(r);
677 } else {
678 right.load_item();
679 }
680
681 LIR_Opr reg = rlock_result(x);
682
683 logic_op(x->op(), reg, left.result(), right.result());
684 }
685
686
687 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
688 void LIRGenerator::do_CompareOp(CompareOp* x) {
689 LIRItem left(x->x(), this);
690 LIRItem right(x->y(), this);
691 left.load_item();
692 right.load_item();
693 LIR_Opr reg = rlock_result(x);
694 if (x->x()->type()->is_float_kind()) {
695 Bytecodes::Code code = x->op();
696 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
697 } else if (x->x()->type()->tag() == longTag) {
698 __ lcmp2int(left.result(), right.result(), reg);
699 } else {
700 Unimplemented();
701 }
702 }
703
704
705 void LIRGenerator::do_CompareAndSwap(Intrinsic* x, ValueType* type) {
706 assert(x->number_of_arguments() == 4, "wrong type");
707 LIRItem obj (x->argument_at(0), this); // object
708 LIRItem offset(x->argument_at(1), this); // offset of field
709 LIRItem cmp (x->argument_at(2), this); // Value to compare with field.
710 LIRItem val (x->argument_at(3), this); // Replace field with val if matches cmp.
711
712 LIR_Opr t1 = LIR_OprFact::illegalOpr;
713 LIR_Opr t2 = LIR_OprFact::illegalOpr;
714 LIR_Opr addr = new_pointer_register();
715
716 // Get address of field.
717 obj.load_item();
718 offset.load_item();
719 cmp.load_item();
720 val.load_item();
721
722 __ add(obj.result(), offset.result(), addr);
723
724 // Volatile load may be followed by Unsafe CAS.
725 if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
726 __ membar(); // To be safe. Unsafe semantics are unclear.
727 } else {
728 __ membar_release();
729 }
730
731 if (type == objectType) { // Write-barrier needed for Object fields.
732 // Only cmp value can get overwritten, no do_load required.
733 pre_barrier(LIR_OprFact::illegalOpr /* addr */, cmp.result() /* pre_val */,
734 false /* do_load */, false /* patch */, NULL);
735 }
736
737 if (type == objectType) {
738 if (UseCompressedOops) {
739 t1 = new_register(T_OBJECT);
740 t2 = new_register(T_OBJECT);
741 }
742 __ cas_obj(addr, cmp.result(), val.result(), t1, t2);
743 } else if (type == intType) {
744 __ cas_int(addr, cmp.result(), val.result(), t1, t2);
745 } else if (type == longType) {
746 __ cas_long(addr, cmp.result(), val.result(), t1, t2);
747 } else {
748 ShouldNotReachHere();
749 }
750 // Benerate conditional move of boolean result.
751 LIR_Opr result = rlock_result(x);
752 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
753 result, as_BasicType(type));
754 if (type == objectType) { // Write-barrier needed for Object fields.
755 // Precise card mark since could either be object or array.
756 post_barrier(addr, val.result());
757 }
758 }
759
760
761 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
762 switch (x->id()) {
763 case vmIntrinsics::_dabs: {
764 assert(x->number_of_arguments() == 1, "wrong type");
765 LIRItem value(x->argument_at(0), this);
766 value.load_item();
767 LIR_Opr dst = rlock_result(x);
768 __ abs(value.result(), dst, LIR_OprFact::illegalOpr);
769 break;
770 }
771 case vmIntrinsics::_dsqrt: {
772 if (VM_Version::has_fsqrt()) {
773 assert(x->number_of_arguments() == 1, "wrong type");
774 LIRItem value(x->argument_at(0), this);
775 value.load_item();
776 LIR_Opr dst = rlock_result(x);
777 __ sqrt(value.result(), dst, LIR_OprFact::illegalOpr);
778 break;
779 } // else fallthru
780 }
781 case vmIntrinsics::_dlog10: // fall through
782 case vmIntrinsics::_dlog: // fall through
783 case vmIntrinsics::_dsin: // fall through
784 case vmIntrinsics::_dtan: // fall through
785 case vmIntrinsics::_dcos: // fall through
786 case vmIntrinsics::_dexp: {
787 assert(x->number_of_arguments() == 1, "wrong type");
788
789 address runtime_entry = NULL;
790 switch (x->id()) {
791 case vmIntrinsics::_dsqrt:
792 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsqrt);
793 break;
794 case vmIntrinsics::_dsin:
795 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dsin);
796 break;
797 case vmIntrinsics::_dcos:
798 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dcos);
799 break;
800 case vmIntrinsics::_dtan:
801 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dtan);
802 break;
803 case vmIntrinsics::_dlog:
804 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog);
805 break;
806 case vmIntrinsics::_dlog10:
807 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dlog10);
808 break;
809 case vmIntrinsics::_dexp:
810 runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dexp);
811 break;
812 default:
813 ShouldNotReachHere();
814 }
815
816 LIR_Opr result = call_runtime(x->argument_at(0), runtime_entry, x->type(), NULL);
817 set_result(x, result);
818 break;
819 }
820 case vmIntrinsics::_dpow: {
821 assert(x->number_of_arguments() == 2, "wrong type");
822 address runtime_entry = CAST_FROM_FN_PTR(address, SharedRuntime::dpow);
823 LIR_Opr result = call_runtime(x->argument_at(0), x->argument_at(1), runtime_entry, x->type(), NULL);
824 set_result(x, result);
825 break;
826 }
827 }
828 }
829
830
831 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
832 assert(x->number_of_arguments() == 5, "wrong type");
833
834 // Make all state_for calls early since they can emit code.
835 CodeEmitInfo* info = state_for(x, x->state());
836
837 LIRItem src (x->argument_at(0), this);
838 LIRItem src_pos (x->argument_at(1), this);
839 LIRItem dst (x->argument_at(2), this);
840 LIRItem dst_pos (x->argument_at(3), this);
841 LIRItem length (x->argument_at(4), this);
842
843 // Load all values in callee_save_registers (C calling convention),
844 // as this makes the parameter passing to the fast case simpler.
845 src.load_item_force (FrameMap::R14_oop_opr);
846 src_pos.load_item_force (FrameMap::R15_opr);
847 dst.load_item_force (FrameMap::R17_oop_opr);
848 dst_pos.load_item_force (FrameMap::R18_opr);
849 length.load_item_force (FrameMap::R19_opr);
850 LIR_Opr tmp = FrameMap::R20_opr;
851
852 int flags;
853 ciArrayKlass* expected_type;
854 arraycopy_helper(x, &flags, &expected_type);
855
856 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(),
857 length.result(), tmp,
858 expected_type, flags, info);
859 set_no_result(x);
860 }
861
862
863 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
864 // _i2b, _i2c, _i2s
865 void LIRGenerator::do_Convert(Convert* x) {
866 if (!VM_Version::has_mtfprd()) {
867 switch (x->op()) {
868
869 // int -> float: force spill
870 case Bytecodes::_l2f: {
871 if (!VM_Version::has_fcfids()) { // fcfids is >= Power7 only
872 // fcfid+frsp needs fixup code to avoid rounding incompatibility.
873 address entry = CAST_FROM_FN_PTR(address, SharedRuntime::l2f);
874 LIR_Opr result = call_runtime(x->value(), entry, x->type(), NULL);
875 set_result(x, result);
876 return;
877 } // else fallthru
878 }
879 case Bytecodes::_l2d: {
880 LIRItem value(x->value(), this);
881 LIR_Opr reg = rlock_result(x);
882 value.load_item();
883 LIR_Opr tmp = force_to_spill(value.result(), T_DOUBLE);
884 __ convert(x->op(), tmp, reg);
885 return;
886 }
887 case Bytecodes::_i2f:
888 case Bytecodes::_i2d: {
889 LIRItem value(x->value(), this);
890 LIR_Opr reg = rlock_result(x);
891 value.load_item();
892 // Convert i2l first.
893 LIR_Opr tmp1 = new_register(T_LONG);
894 __ convert(Bytecodes::_i2l, value.result(), tmp1);
895 LIR_Opr tmp2 = force_to_spill(tmp1, T_DOUBLE);
896 __ convert(x->op(), tmp2, reg);
897 return;
898 }
899
900 // float -> int: result will be stored
901 case Bytecodes::_f2l:
902 case Bytecodes::_d2l: {
903 LIRItem value(x->value(), this);
904 LIR_Opr reg = rlock_result(x);
905 value.set_destroys_register(); // USE_KILL
906 value.load_item();
907 set_vreg_flag(reg, must_start_in_memory);
908 __ convert(x->op(), value.result(), reg);
909 return;
910 }
911 case Bytecodes::_f2i:
912 case Bytecodes::_d2i: {
913 LIRItem value(x->value(), this);
914 LIR_Opr reg = rlock_result(x);
915 value.set_destroys_register(); // USE_KILL
916 value.load_item();
917 // Convert l2i afterwards.
918 LIR_Opr tmp1 = new_register(T_LONG);
919 set_vreg_flag(tmp1, must_start_in_memory);
920 __ convert(x->op(), value.result(), tmp1);
921 __ convert(Bytecodes::_l2i, tmp1, reg);
922 return;
923 }
924
925 // Within same category: just register conversions.
926 case Bytecodes::_i2b:
927 case Bytecodes::_i2c:
928 case Bytecodes::_i2s:
929 case Bytecodes::_i2l:
930 case Bytecodes::_l2i:
931 case Bytecodes::_f2d:
932 case Bytecodes::_d2f:
933 break;
934
935 default: ShouldNotReachHere();
936 }
937 }
938
939 // Register conversion.
940 LIRItem value(x->value(), this);
941 LIR_Opr reg = rlock_result(x);
942 value.load_item();
943 switch (x->op()) {
944 case Bytecodes::_f2l:
945 case Bytecodes::_d2l:
946 case Bytecodes::_f2i:
947 case Bytecodes::_d2i: value.set_destroys_register(); break; // USE_KILL
948 default: break;
949 }
950 __ convert(x->op(), value.result(), reg);
951 }
952
953
954 void LIRGenerator::do_NewInstance(NewInstance* x) {
955 // This instruction can be deoptimized in the slow path.
956 const LIR_Opr reg = result_register_for(x->type());
957 #ifndef PRODUCT
958 if (PrintNotLoaded && !x->klass()->is_loaded()) {
959 tty->print_cr(" ###class not loaded at new bci %d", x->printable_bci());
960 }
961 #endif
962 CodeEmitInfo* info = state_for(x, x->state());
963 LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path (NewInstanceStub).
964 LIR_Opr tmp1 = FrameMap::R5_oop_opr;
965 LIR_Opr tmp2 = FrameMap::R6_oop_opr;
966 LIR_Opr tmp3 = FrameMap::R7_oop_opr;
967 LIR_Opr tmp4 = FrameMap::R8_oop_opr;
968 new_instance(reg, x->klass(), x->is_unresolved(), tmp1, tmp2, tmp3, tmp4, klass_reg, info);
969
970 // Must prevent reordering of stores for object initialization
971 // with stores that publish the new object.
972 __ membar_storestore();
973 LIR_Opr result = rlock_result(x);
974 __ move(reg, result);
975 }
976
977
978 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
979 // Evaluate state_for early since it may emit code.
980 CodeEmitInfo* info = state_for(x, x->state());
981
982 LIRItem length(x->length(), this);
983 length.load_item();
984
985 LIR_Opr reg = result_register_for(x->type());
986 LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path (NewTypeArrayStub).
987 // We use R5 in order to get a temp effect. This reg is used in slow path (NewTypeArrayStub).
988 LIR_Opr tmp1 = FrameMap::R5_oop_opr;
989 LIR_Opr tmp2 = FrameMap::R6_oop_opr;
990 LIR_Opr tmp3 = FrameMap::R7_oop_opr;
991 LIR_Opr tmp4 = FrameMap::R8_oop_opr;
992 LIR_Opr len = length.result();
993 BasicType elem_type = x->elt_type();
994
995 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
996
997 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
998 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
999
1000 // Must prevent reordering of stores for object initialization
1001 // with stores that publish the new object.
1002 __ membar_storestore();
1003 LIR_Opr result = rlock_result(x);
1004 __ move(reg, result);
1005 }
1006
1007
1008 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1009 // Evaluate state_for early since it may emit code.
1010 CodeEmitInfo* info = state_for(x, x->state());
1011 // In case of patching (i.e., object class is not yet loaded),
1012 // we need to reexecute the instruction and therefore provide
1013 // the state before the parameters have been consumed.
1014 CodeEmitInfo* patching_info = NULL;
1015 if (!x->klass()->is_loaded() || PatchALot) {
1016 patching_info = state_for(x, x->state_before());
1017 }
1018
1019 LIRItem length(x->length(), this);
1020 length.load_item();
1021
1022 const LIR_Opr reg = result_register_for(x->type());
1023 LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path (NewObjectArrayStub).
1024 // We use R5 in order to get a temp effect. This reg is used in slow path (NewObjectArrayStub).
1025 LIR_Opr tmp1 = FrameMap::R5_oop_opr;
1026 LIR_Opr tmp2 = FrameMap::R6_oop_opr;
1027 LIR_Opr tmp3 = FrameMap::R7_oop_opr;
1028 LIR_Opr tmp4 = FrameMap::R8_oop_opr;
1029 LIR_Opr len = length.result();
1030
1031 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1032 ciMetadata* obj = ciObjArrayKlass::make(x->klass());
1033 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1034 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1035 }
1036 klass2reg_with_patching(klass_reg, obj, patching_info);
1037 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1038
1039 // Must prevent reordering of stores for object initialization
1040 // with stores that publish the new object.
1041 __ membar_storestore();
1042 LIR_Opr result = rlock_result(x);
1043 __ move(reg, result);
1044 }
1045
1046
1047 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1048 Values* dims = x->dims();
1049 int i = dims->length();
1050 LIRItemList* items = new LIRItemList(i, i, NULL);
1051 while (i-- > 0) {
1052 LIRItem* size = new LIRItem(dims->at(i), this);
1053 items->at_put(i, size);
1054 }
1055
1056 // Evaluate state_for early since it may emit code.
1057 CodeEmitInfo* patching_info = NULL;
1058 if (!x->klass()->is_loaded() || PatchALot) {
1059 patching_info = state_for(x, x->state_before());
1060
1061 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1062 // clone all handlers (NOTE: Usually this is handled transparently
1063 // by the CodeEmitInfo cloning logic in CodeStub constructors but
1064 // is done explicitly here because a stub isn't being used).
1065 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1066 }
1067 CodeEmitInfo* info = state_for(x, x->state());
1068
1069 i = dims->length();
1070 while (i-- > 0) {
1071 LIRItem* size = items->at(i);
1072 size->load_nonconstant();
1073 // FrameMap::_reserved_argument_area_size includes the dimensions
1074 // varargs, because it's initialized to hir()->max_stack() when the
1075 // FrameMap is created.
1076 store_stack_parameter(size->result(), in_ByteSize(i*sizeof(jint) + FrameMap::first_available_sp_in_frame));
1077 }
1078
1079 const LIR_Opr klass_reg = FrameMap::R4_metadata_opr; // Used by slow path.
1080 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1081
1082 LIR_Opr rank = FrameMap::R5_opr; // Used by slow path.
1083 __ move(LIR_OprFact::intConst(x->rank()), rank);
1084
1085 LIR_Opr varargs = FrameMap::as_pointer_opr(R6); // Used by slow path.
1086 __ leal(LIR_OprFact::address(new LIR_Address(FrameMap::SP_opr, FrameMap::first_available_sp_in_frame, T_INT)),
1087 varargs);
1088
1089 // Note: This instruction can be deoptimized in the slow path.
1090 LIR_OprList* args = new LIR_OprList(3);
1091 args->append(klass_reg);
1092 args->append(rank);
1093 args->append(varargs);
1094 const LIR_Opr reg = result_register_for(x->type());
1095 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1096 LIR_OprFact::illegalOpr,
1097 reg, args, info);
1098
1099 // Must prevent reordering of stores for object initialization
1100 // with stores that publish the new object.
1101 __ membar_storestore();
1102 LIR_Opr result = rlock_result(x);
1103 __ move(reg, result);
1104 }
1105
1106
1107 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1108 // nothing to do for now
1109 }
1110
1111
1112 void LIRGenerator::do_CheckCast(CheckCast* x) {
1113 LIRItem obj(x->obj(), this);
1114 CodeEmitInfo* patching_info = NULL;
1115 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check())) {
1116 // Must do this before locking the destination register as
1117 // an oop register, and before the obj is loaded (so x->obj()->item()
1118 // is valid for creating a debug info location).
1119 patching_info = state_for(x, x->state_before());
1120 }
1121 obj.load_item();
1122 LIR_Opr out_reg = rlock_result(x);
1123 CodeStub* stub;
1124 CodeEmitInfo* info_for_exception =
1125 (x->needs_exception_state() ? state_for(x) :
1126 state_for(x, x->state_before(), true /*ignore_xhandler*/));
1127
1128 if (x->is_incompatible_class_change_check()) {
1129 assert(patching_info == NULL, "can't patch this");
1130 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id,
1131 LIR_OprFact::illegalOpr, info_for_exception);
1132 } else if (x->is_invokespecial_receiver_check()) {
1133 assert(patching_info == NULL, "can't patch this");
1134 stub = new DeoptimizeStub(info_for_exception,
1135 Deoptimization::Reason_class_check,
1136 Deoptimization::Action_none);
1137 } else {
1138 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1139 }
1140 // Following registers are used by slow_subtype_check:
1141 LIR_Opr tmp1 = FrameMap::R4_oop_opr; // super_klass
1142 LIR_Opr tmp2 = FrameMap::R5_oop_opr; // sub_klass
1143 LIR_Opr tmp3 = FrameMap::R6_oop_opr; // temp
1144 __ checkcast(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1145 x->direct_compare(), info_for_exception, patching_info, stub,
1146 x->profiled_method(), x->profiled_bci());
1147 }
1148
1149
1150 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1151 LIRItem obj(x->obj(), this);
1152 CodeEmitInfo* patching_info = NULL;
1153 if (!x->klass()->is_loaded() || PatchALot) {
1154 patching_info = state_for(x, x->state_before());
1155 }
1156 // Ensure the result register is not the input register because the
1157 // result is initialized before the patching safepoint.
1158 obj.load_item();
1159 LIR_Opr out_reg = rlock_result(x);
1160 // Following registers are used by slow_subtype_check:
1161 LIR_Opr tmp1 = FrameMap::R4_oop_opr; // super_klass
1162 LIR_Opr tmp2 = FrameMap::R5_oop_opr; // sub_klass
1163 LIR_Opr tmp3 = FrameMap::R6_oop_opr; // temp
1164 __ instanceof(out_reg, obj.result(), x->klass(), tmp1, tmp2, tmp3,
1165 x->direct_compare(), patching_info,
1166 x->profiled_method(), x->profiled_bci());
1167 }
1168
1169
1170 void LIRGenerator::do_If(If* x) {
1171 assert(x->number_of_sux() == 2, "inconsistency");
1172 ValueTag tag = x->x()->type()->tag();
1173 LIRItem xitem(x->x(), this);
1174 LIRItem yitem(x->y(), this);
1175 LIRItem* xin = &xitem;
1176 LIRItem* yin = &yitem;
1177 If::Condition cond = x->cond();
1178
1179 LIR_Opr left = LIR_OprFact::illegalOpr;
1180 LIR_Opr right = LIR_OprFact::illegalOpr;
1181
1182 xin->load_item();
1183 left = xin->result();
1184
1185 if (yin->result()->is_constant() && yin->result()->type() == T_INT &&
1186 Assembler::is_simm16(yin->result()->as_constant_ptr()->as_jint())) {
1187 // Inline int constants which are small enough to be immediate operands.
1188 right = LIR_OprFact::value_type(yin->value()->type());
1189 } else if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 &&
1190 (cond == If::eql || cond == If::neq)) {
1191 // Inline long zero.
1192 right = LIR_OprFact::value_type(yin->value()->type());
1193 } else if (tag == objectTag && yin->is_constant() && (yin->get_jobject_constant()->is_null_object())) {
1194 right = LIR_OprFact::value_type(yin->value()->type());
1195 } else {
1196 yin->load_item();
1197 right = yin->result();
1198 }
1199 set_no_result(x);
1200
1201 // Add safepoint before generating condition code so it can be recomputed.
1202 if (x->is_safepoint()) {
1203 // Increment backedge counter if needed.
1204 increment_backedge_counter(state_for(x, x->state_before()), x->profiled_bci());
1205 __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1206 }
1207
1208 __ cmp(lir_cond(cond), left, right);
1209 // Generate branch profiling. Profiling code doesn't kill flags.
1210 profile_branch(x, cond);
1211 move_to_phi(x->state());
1212 if (x->x()->type()->is_float_kind()) {
1213 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1214 } else {
1215 __ branch(lir_cond(cond), right->type(), x->tsux());
1216 }
1217 assert(x->default_sux() == x->fsux(), "wrong destination above");
1218 __ jump(x->default_sux());
1219 }
1220
1221
1222 LIR_Opr LIRGenerator::getThreadPointer() {
1223 return FrameMap::as_pointer_opr(R16_thread);
1224 }
1225
1226
1227 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1228 LIR_Opr arg1 = FrameMap::R3_opr; // ARG1
1229 __ move(LIR_OprFact::intConst(block->block_id()), arg1);
1230 LIR_OprList* args = new LIR_OprList(1);
1231 args->append(arg1);
1232 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1233 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1234 }
1235
1236
1237 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1238 CodeEmitInfo* info) {
1239 #ifdef _LP64
1240 __ store(value, address, info);
1241 #else
1242 Unimplemented();
1243 // __ volatile_store_mem_reg(value, address, info);
1244 #endif
1245 }
1246
1247 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1248 CodeEmitInfo* info) {
1249 #ifdef _LP64
1250 __ load(address, result, info);
1251 #else
1252 Unimplemented();
1253 // __ volatile_load_mem_reg(address, result, info);
1254 #endif
1255 }
1256
1257
1258 void LIRGenerator::put_Object_unsafe(LIR_Opr src, LIR_Opr offset, LIR_Opr data,
1259 BasicType type, bool is_volatile) {
1260 LIR_Opr base_op = src;
1261 LIR_Opr index_op = offset;
1262
1263 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1264 #ifndef _LP64
1265 if (is_volatile && type == T_LONG) {
1266 __ volatile_store_unsafe_reg(data, src, offset, type, NULL, lir_patch_none);
1267 } else
1268 #endif
1269 {
1270 if (type == T_BOOLEAN) {
1271 type = T_BYTE;
1272 }
1273 LIR_Address* addr;
1274 if (type == T_ARRAY || type == T_OBJECT) {
1275 LIR_Opr tmp = new_pointer_register();
1276 __ add(base_op, index_op, tmp);
1277 addr = new LIR_Address(tmp, type);
1278 } else {
1279 addr = new LIR_Address(base_op, index_op, type);
1280 }
1281
1282 if (is_obj) {
1283 pre_barrier(LIR_OprFact::address(addr), LIR_OprFact::illegalOpr /* pre_val */,
1284 true /* do_load */, false /* patch */, NULL);
1285 // _bs->c1_write_barrier_pre(this, LIR_OprFact::address(addr));
1286 }
1287 __ move(data, addr);
1288 if (is_obj) {
1289 // This address is precise.
1290 post_barrier(LIR_OprFact::address(addr), data);
1291 }
1292 }
1293 }
1294
1295
1296 void LIRGenerator::get_Object_unsafe(LIR_Opr dst, LIR_Opr src, LIR_Opr offset,
1297 BasicType type, bool is_volatile) {
1298 #ifndef _LP64
1299 if (is_volatile && type == T_LONG) {
1300 __ volatile_load_unsafe_reg(src, offset, dst, type, NULL, lir_patch_none);
1301 } else
1302 #endif
1303 {
1304 LIR_Address* addr = new LIR_Address(src, offset, type);
1305 __ load(addr, dst);
1306 }
1307 }
1308
1309
1310 void LIRGenerator::do_UnsafeGetAndSetObject(UnsafeGetAndSetObject* x) {
1311 BasicType type = x->basic_type();
1312 LIRItem src(x->object(), this);
1313 LIRItem off(x->offset(), this);
1314 LIRItem value(x->value(), this);
1315
1316 src.load_item();
1317 value.load_item();
1318 off.load_nonconstant();
1319
1320 LIR_Opr dst = rlock_result(x, type);
1321 LIR_Opr data = value.result();
1322 bool is_obj = (type == T_ARRAY || type == T_OBJECT);
1323
1324 LIR_Opr tmp = FrameMap::R0_opr;
1325 LIR_Opr ptr = new_pointer_register();
1326 __ add(src.result(), off.result(), ptr);
1327
1328 if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
1329 __ membar();
1330 } else {
1331 __ membar_release();
1332 }
1333
1334 if (x->is_add()) {
1335 __ xadd(ptr, data, dst, tmp);
1336 } else {
1337 const bool can_move_barrier = true; // TODO: port GraphKit::can_move_pre_barrier() from C2
1338 if (!can_move_barrier && is_obj) {
1339 // Do the pre-write barrier, if any.
1340 pre_barrier(ptr, LIR_OprFact::illegalOpr /* pre_val */,
1341 true /* do_load */, false /* patch */, NULL);
1342 }
1343 __ xchg(ptr, data, dst, tmp);
1344 if (is_obj) {
1345 // Seems to be a precise address.
1346 post_barrier(ptr, data);
1347 if (can_move_barrier) {
1348 pre_barrier(LIR_OprFact::illegalOpr, dst /* pre_val */,
1349 false /* do_load */, false /* patch */, NULL);
1350 }
1351 }
1352 }
1353
1354 if (support_IRIW_for_not_multiple_copy_atomic_cpu) {
1355 __ membar_acquire();
1356 } else {
1357 __ membar();
1358 }
1359 }
1360
1361
1362 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
1363 assert(UseCRC32Intrinsics, "or should not be here");
1364 LIR_Opr result = rlock_result(x);
1365
1366 switch (x->id()) {
1367 case vmIntrinsics::_updateCRC32: {
1368 LIRItem crc(x->argument_at(0), this);
1369 LIRItem val(x->argument_at(1), this);
1370 // Registers destroyed by update_crc32.
1371 crc.set_destroys_register();
1372 val.set_destroys_register();
1373 crc.load_item();
1374 val.load_item();
1375 __ update_crc32(crc.result(), val.result(), result);
1376 break;
1377 }
1378 case vmIntrinsics::_updateBytesCRC32:
1379 case vmIntrinsics::_updateByteBufferCRC32: {
1380 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1381
1382 LIRItem crc(x->argument_at(0), this);
1383 LIRItem buf(x->argument_at(1), this);
1384 LIRItem off(x->argument_at(2), this);
1385 LIRItem len(x->argument_at(3), this);
1386 buf.load_item();
1387 off.load_nonconstant();
1388
1389 LIR_Opr index = off.result();
1390 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1391 if (off.result()->is_constant()) {
1392 index = LIR_OprFact::illegalOpr;
1393 offset += off.result()->as_jint();
1394 }
1395 LIR_Opr base_op = buf.result();
1396 LIR_Address* a = NULL;
1397
1398 if (index->is_valid()) {
1399 LIR_Opr tmp = new_register(T_LONG);
1400 __ convert(Bytecodes::_i2l, index, tmp);
1401 index = tmp;
1402 __ add(index, LIR_OprFact::intptrConst(offset), index);
1403 a = new LIR_Address(base_op, index, T_BYTE);
1404 } else {
1405 a = new LIR_Address(base_op, offset, T_BYTE);
1406 }
1407
1408 BasicTypeList signature(3);
1409 signature.append(T_INT);
1410 signature.append(T_ADDRESS);
1411 signature.append(T_INT);
1412 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1413 const LIR_Opr result_reg = result_register_for(x->type());
1414
1415 LIR_Opr arg1 = cc->at(0),
1416 arg2 = cc->at(1),
1417 arg3 = cc->at(2);
1418
1419 crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32 stub doesn't care about high bits.
1420 __ leal(LIR_OprFact::address(a), arg2);
1421 len.load_item_force(arg3); // We skip int->long conversion here, , because CRC32 stub expects int.
1422
1423 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1424 __ move(result_reg, result);
1425 break;
1426 }
1427 default: {
1428 ShouldNotReachHere();
1429 }
1430 }
1431 }
1432
1433 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1434 assert(UseCRC32CIntrinsics, "or should not be here");
1435 LIR_Opr result = rlock_result(x);
1436
1437 switch (x->id()) {
1438 case vmIntrinsics::_updateBytesCRC32C:
1439 case vmIntrinsics::_updateDirectByteBufferCRC32C: {
1440 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32C);
1441
1442 LIRItem crc(x->argument_at(0), this);
1443 LIRItem buf(x->argument_at(1), this);
1444 LIRItem off(x->argument_at(2), this);
1445 LIRItem end(x->argument_at(3), this);
1446 buf.load_item();
1447 off.load_nonconstant();
1448 end.load_nonconstant();
1449
1450 // len = end - off
1451 LIR_Opr len = end.result();
1452 LIR_Opr tmpA = new_register(T_INT);
1453 LIR_Opr tmpB = new_register(T_INT);
1454 __ move(end.result(), tmpA);
1455 __ move(off.result(), tmpB);
1456 __ sub(tmpA, tmpB, tmpA);
1457 len = tmpA;
1458
1459 LIR_Opr index = off.result();
1460 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1461 if (off.result()->is_constant()) {
1462 index = LIR_OprFact::illegalOpr;
1463 offset += off.result()->as_jint();
1464 }
1465 LIR_Opr base_op = buf.result();
1466 LIR_Address* a = NULL;
1467
1468 if (index->is_valid()) {
1469 LIR_Opr tmp = new_register(T_LONG);
1470 __ convert(Bytecodes::_i2l, index, tmp);
1471 index = tmp;
1472 __ add(index, LIR_OprFact::intptrConst(offset), index);
1473 a = new LIR_Address(base_op, index, T_BYTE);
1474 } else {
1475 a = new LIR_Address(base_op, offset, T_BYTE);
1476 }
1477
1478 BasicTypeList signature(3);
1479 signature.append(T_INT);
1480 signature.append(T_ADDRESS);
1481 signature.append(T_INT);
1482 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1483 const LIR_Opr result_reg = result_register_for(x->type());
1484
1485 LIR_Opr arg1 = cc->at(0),
1486 arg2 = cc->at(1),
1487 arg3 = cc->at(2);
1488
1489 crc.load_item_force(arg1); // We skip int->long conversion here, because CRC32C stub doesn't care about high bits.
1490 __ leal(LIR_OprFact::address(a), arg2);
1491 __ move(len, cc->at(2)); // We skip int->long conversion here, because CRC32C stub expects int.
1492
1493 __ call_runtime_leaf(StubRoutines::updateBytesCRC32C(), LIR_OprFact::illegalOpr, result_reg, cc->args());
1494 __ move(result_reg, result);
1495 break;
1496 }
1497 default: {
1498 ShouldNotReachHere();
1499 }
1500 }
1501 }
1502
1503 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
1504 assert(x->number_of_arguments() == 3, "wrong type");
1505 assert(UseFMA, "Needs FMA instructions support.");
1506 LIRItem value(x->argument_at(0), this);
1507 LIRItem value1(x->argument_at(1), this);
1508 LIRItem value2(x->argument_at(2), this);
1509
1510 value.load_item();
1511 value1.load_item();
1512 value2.load_item();
1513
1514 LIR_Opr calc_input = value.result();
1515 LIR_Opr calc_input1 = value1.result();
1516 LIR_Opr calc_input2 = value2.result();
1517 LIR_Opr calc_result = rlock_result(x);
1518
1519 switch (x->id()) {
1520 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
1521 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
1522 default: ShouldNotReachHere();
1523 }
1524 }
1525
1526 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1527 fatal("vectorizedMismatch intrinsic is not implemented on this platform");
1528 }