285 // LIR-instruction because spilling can occur anywhere between two
286 // instructions and so the debug information must be different.
287 CodeEmitInfo* range_check_info = state_for (x);
288 CodeEmitInfo* null_check_info = NULL;
289 if (x->needs_null_check()) {
290 null_check_info = new CodeEmitInfo(range_check_info);
291 }
292
293 // Emit array address setup early so it schedules better.
294 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
295 if (value.result()->is_constant() && array_addr->index()->is_valid()) {
296 // Constants cannot be stored with index register on ZARCH_64 (see LIR_Assembler::const2mem()).
297 LIR_Opr tmp = new_pointer_register();
298 __ leal(LIR_OprFact::address(array_addr), tmp);
299 array_addr = new LIR_Address(tmp, x->elt_type());
300 }
301
302 if (GenerateRangeChecks && needs_range_check) {
303 if (use_length) {
304 __ cmp(lir_cond_belowEqual, length.result(), index.result());
305 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result()));
306 } else {
307 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
308 // Range_check also does the null check.
309 null_check_info = NULL;
310 }
311 }
312
313 if (GenerateArrayStoreCheck && needs_store_check) {
314 LIR_Opr tmp1 = new_register(objectType);
315 LIR_Opr tmp2 = new_register(objectType);
316 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
317
318 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
319 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
320 }
321
322 if (obj_store) {
323 // Needs GC write barriers.
324 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
325 true /* do_load */, false /* patch */, NULL);
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285 // LIR-instruction because spilling can occur anywhere between two
286 // instructions and so the debug information must be different.
287 CodeEmitInfo* range_check_info = state_for (x);
288 CodeEmitInfo* null_check_info = NULL;
289 if (x->needs_null_check()) {
290 null_check_info = new CodeEmitInfo(range_check_info);
291 }
292
293 // Emit array address setup early so it schedules better.
294 LIR_Address* array_addr = emit_array_address(array.result(), index.result(), x->elt_type(), obj_store);
295 if (value.result()->is_constant() && array_addr->index()->is_valid()) {
296 // Constants cannot be stored with index register on ZARCH_64 (see LIR_Assembler::const2mem()).
297 LIR_Opr tmp = new_pointer_register();
298 __ leal(LIR_OprFact::address(array_addr), tmp);
299 array_addr = new LIR_Address(tmp, x->elt_type());
300 }
301
302 if (GenerateRangeChecks && needs_range_check) {
303 if (use_length) {
304 __ cmp(lir_cond_belowEqual, length.result(), index.result());
305 __ branch(lir_cond_belowEqual, T_INT, new RangeCheckStub(range_check_info, index.result(), array.result()));
306 } else {
307 array_range_check(array.result(), index.result(), null_check_info, range_check_info);
308 // Range_check also does the null check.
309 null_check_info = NULL;
310 }
311 }
312
313 if (GenerateArrayStoreCheck && needs_store_check) {
314 LIR_Opr tmp1 = new_register(objectType);
315 LIR_Opr tmp2 = new_register(objectType);
316 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
317
318 CodeEmitInfo* store_check_info = new CodeEmitInfo(range_check_info);
319 __ store_check(value.result(), array.result(), tmp1, tmp2, tmp3, store_check_info, x->profiled_method(), x->profiled_bci());
320 }
321
322 if (obj_store) {
323 // Needs GC write barriers.
324 pre_barrier(LIR_OprFact::address(array_addr), LIR_OprFact::illegalOpr /* pre_val */,
325 true /* do_load */, false /* patch */, NULL);
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