1 /*
2 * Copyright (c) 1999, 2012, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
142 static LIR_Opr g1_long_single_opr;
143
144 static LIR_Opr F0_opr;
145 static LIR_Opr F0_double_opr;
146
147 static LIR_Opr Oexception_opr;
148 static LIR_Opr Oissuing_pc_opr;
149
150 private:
151 static FloatRegister _fpu_regs [nof_fpu_regs];
152
153 static LIR_Opr as_long_single_opr(Register r) {
154 return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));
155 }
156 static LIR_Opr as_long_pair_opr(Register r) {
157 return LIR_OprFact::double_cpu(cpu_reg2rnr(r->successor()), cpu_reg2rnr(r));
158 }
159
160 public:
161
162 #ifdef _LP64
163 static LIR_Opr as_long_opr(Register r) {
164 return as_long_single_opr(r);
165 }
166 static LIR_Opr as_pointer_opr(Register r) {
167 return as_long_single_opr(r);
168 }
169 #else
170 static LIR_Opr as_long_opr(Register r) {
171 return as_long_pair_opr(r);
172 }
173 static LIR_Opr as_pointer_opr(Register r) {
174 return as_opr(r);
175 }
176 #endif
177 static LIR_Opr as_float_opr(FloatRegister r) {
178 return LIR_OprFact::single_fpu(r->encoding());
179 }
180 static LIR_Opr as_double_opr(FloatRegister r) {
181 return LIR_OprFact::double_fpu(r->successor()->encoding(), r->encoding());
182 }
183
184 static FloatRegister nr2floatreg (int rnr);
185
186 static VMReg fpu_regname (int n);
187
188 static bool is_caller_save_register (LIR_Opr reg);
189 static bool is_caller_save_register (Register r);
190
191 static int nof_caller_save_cpu_regs() { return pd_nof_caller_save_cpu_regs_frame_map; }
192 static int last_cpu_reg() { return pd_last_cpu_reg; }
193
194 #endif // CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP
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1 /*
2 * Copyright (c) 1999, 2017, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
142 static LIR_Opr g1_long_single_opr;
143
144 static LIR_Opr F0_opr;
145 static LIR_Opr F0_double_opr;
146
147 static LIR_Opr Oexception_opr;
148 static LIR_Opr Oissuing_pc_opr;
149
150 private:
151 static FloatRegister _fpu_regs [nof_fpu_regs];
152
153 static LIR_Opr as_long_single_opr(Register r) {
154 return LIR_OprFact::double_cpu(cpu_reg2rnr(r), cpu_reg2rnr(r));
155 }
156 static LIR_Opr as_long_pair_opr(Register r) {
157 return LIR_OprFact::double_cpu(cpu_reg2rnr(r->successor()), cpu_reg2rnr(r));
158 }
159
160 public:
161
162 static LIR_Opr as_long_opr(Register r) {
163 return as_long_single_opr(r);
164 }
165 static LIR_Opr as_pointer_opr(Register r) {
166 return as_long_single_opr(r);
167 }
168 static LIR_Opr as_float_opr(FloatRegister r) {
169 return LIR_OprFact::single_fpu(r->encoding());
170 }
171 static LIR_Opr as_double_opr(FloatRegister r) {
172 return LIR_OprFact::double_fpu(r->successor()->encoding(), r->encoding());
173 }
174
175 static FloatRegister nr2floatreg (int rnr);
176
177 static VMReg fpu_regname (int n);
178
179 static bool is_caller_save_register (LIR_Opr reg);
180 static bool is_caller_save_register (Register r);
181
182 static int nof_caller_save_cpu_regs() { return pd_nof_caller_save_cpu_regs_frame_map; }
183 static int last_cpu_reg() { return pd_last_cpu_reg; }
184
185 #endif // CPU_SPARC_VM_C1_FRAMEMAP_SPARC_HPP
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