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src/cpu/sparc/vm/nativeInst_sparc.hpp
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@@ -1,7 +1,7 @@
/*
- * Copyright (c) 1997, 2013, Oracle and/or its affiliates. All rights reserved.
+ * Copyright (c) 1997, 2017, Oracle and/or its affiliates. All rights reserved.
* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
*
* This code is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 only, as
* published by the Free Software Foundation.
@@ -119,15 +119,11 @@
(inv_rd(x) == G0) && (inv_rs1(x) == O7);
}
bool is_safepoint_poll() {
int x = long_at(0);
-#ifdef _LP64
return is_op3(x, Assembler::ldx_op3, Assembler::ldst_op) &&
-#else
- return is_op3(x, Assembler::lduw_op3, Assembler::ldst_op) &&
-#endif
(inv_rd(x) == G0) && (inv_immed(x) ? Assembler::inv_simm13(x) == 0 : inv_rs2(x) == G0);
}
bool is_zero_test(Register ®);
bool is_load_store_with_small_offset(Register reg);
@@ -430,26 +426,10 @@
// The NativeFarCall is an abstraction for accessing/manipulating native call-anywhere
// instructions in the sparcv9 vm. Used to call native methods which may be loaded
// anywhere in the address space, possibly out of reach of a call instruction.
-#ifndef _LP64
-
-// On 32-bit systems, a far call is the same as a near one.
-class NativeFarCall;
-inline NativeFarCall* nativeFarCall_at(address instr);
-class NativeFarCall : public NativeCall {
-public:
- friend inline NativeFarCall* nativeFarCall_at(address instr) { return (NativeFarCall*)nativeCall_at(instr); }
- friend NativeFarCall* nativeFarCall_overwriting_at(address instr, address destination = NULL)
- { return (NativeFarCall*)nativeCall_overwriting_at(instr, destination); }
- friend NativeFarCall* nativeFarCall_before(address return_address)
- { return (NativeFarCall*)nativeCall_before(return_address); }
-};
-
-#else
-
// The format of this extended-range call is:
// jumpl_to addr, lreg
// == sethi %hi54(addr), O7 ; jumpl O7, %lo10(addr), O7 ; <delay>
// That is, it is essentially the same as a NativeJump.
class NativeFarCall;
@@ -513,11 +493,10 @@
(void)nativeFarCall_overwriting_at(code_pos, entry);
}
static void replace_mt_safe(address instr_addr, address code_buffer);
};
-#endif // _LP64
// An interface for accessing/manipulating 32 bit native set_metadata imm, reg instructions
// (used to manipulate inlined data references, etc.)
// set_metadata imm, reg
// == sethi %hi22(imm), reg ; add reg, %lo10(imm), reg
@@ -565,17 +544,12 @@
inline NativeMovConstReg* nativeMovConstReg_at(address address);
class NativeMovConstReg: public NativeInstruction {
public:
enum Sparc_specific_constants {
sethi_offset = 0,
-#ifdef _LP64
add_offset = 7 * BytesPerInstWord,
instruction_size = 8 * BytesPerInstWord
-#else
- add_offset = 4,
- instruction_size = 8
-#endif
};
address instruction_address() const { return addr_at(0); }
address next_instruction_address() const { return addr_at(instruction_size); }
@@ -624,15 +598,11 @@
class NativeMovConstRegPatching;
inline NativeMovConstRegPatching* nativeMovConstRegPatching_at(address address);class NativeMovConstRegPatching: public NativeInstruction {
public:
enum Sparc_specific_constants {
sethi_offset = 0,
-#ifdef _LP64
nop_offset = 7 * BytesPerInstWord,
-#else
- nop_offset = sethi_offset + BytesPerInstWord,
-#endif
add_offset = nop_offset + BytesPerInstWord,
instruction_size = add_offset + BytesPerInstWord
};
address instruction_address() const { return addr_at(0); }
@@ -703,30 +673,22 @@
op3_mask_stf = 1 << (Assembler::stf_op3 - op3_ldst_int_limit) |
1 << (Assembler::stdf_op3 - op3_ldst_int_limit),
offset_width = 13,
sethi_offset = 0,
-#ifdef _LP64
add_offset = 7 * BytesPerInstWord,
-#else
- add_offset = 4,
-#endif
ldst_offset = add_offset + BytesPerInstWord
};
bool is_immediate() const {
// check if instruction is ld* [reg + offset], reg or st* reg, [reg + offset]
int i0 = long_at(0);
return (is_op(i0, Assembler::ldst_op));
}
address instruction_address() const { return addr_at(0); }
address next_instruction_address() const {
-#ifdef _LP64
return addr_at(is_immediate() ? 4 : (7 * BytesPerInstWord));
-#else
- return addr_at(is_immediate() ? 4 : 12);
-#endif
}
intptr_t offset() const {
return is_immediate()? inv_simm(long_at(0), offset_width) :
nativeMovConstReg_at(addr_at(0))->data();
}
@@ -775,39 +737,24 @@
}
public:
enum Sparc_specific_constants {
sethi_offset = 0,
-#ifdef _LP64
jmpl_offset = 7 * BytesPerInstWord,
instruction_size = 9 * BytesPerInstWord // includes delay slot
-#else
- jmpl_offset = 1 * BytesPerInstWord,
- instruction_size = 3 * BytesPerInstWord // includes delay slot
-#endif
};
address instruction_address() const { return addr_at(0); }
address next_instruction_address() const { return addr_at(instruction_size); }
-#ifdef _LP64
address jump_destination() const {
return (address) data64(instruction_address(), long_at(jmpl_offset));
}
void set_jump_destination(address dest) {
set_data64_sethi( instruction_address(), (intptr_t)dest);
set_long_at(jmpl_offset, set_data32_simm13( long_at(jmpl_offset), (intptr_t)dest));
}
-#else
- address jump_destination() const {
- return (address) data32(long_at(sethi_offset), long_at(jmpl_offset));
- }
- void set_jump_destination(address dest) {
- set_long_at(sethi_offset, set_data32_sethi( long_at(sethi_offset), (intptr_t)dest));
- set_long_at(jmpl_offset, set_data32_simm13( long_at(jmpl_offset), (intptr_t)dest));
- }
-#endif
// Creation
friend inline NativeJump* nativeJump_at(address address) {
NativeJump* jump = (NativeJump*)address;
#ifdef ASSERT
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