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src/cpu/sparc/vm/interp_masm_sparc.cpp

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 301   jmp( G3_scratch, 0 );
 302   if (bcp_incr != 0)  delayed()->inc(Lbcp, bcp_incr);
 303   else                delayed()->nop();
 304 }
 305 
 306 
 307 // Helpers for expression stack
 308 
 309 // Longs and doubles are Category 2 computational types in the
 310 // JVM specification (section 3.11.1) and take 2 expression stack or
 311 // local slots.
 312 // Aligning them on 32 bit with tagged stacks is hard because the code generated
 313 // for the dup* bytecodes depends on what types are already on the stack.
 314 // If the types are split into the two stack/local slots, that is much easier
 315 // (and we can use 0 for non-reference tags).
 316 
 317 // Known good alignment in _LP64 but unknown otherwise
 318 void InterpreterMacroAssembler::load_unaligned_double(Register r1, int offset, FloatRegister d) {
 319   assert_not_delayed();
 320 
 321 #ifdef _LP64
 322   ldf(FloatRegisterImpl::D, r1, offset, d);
 323 #else
 324   ldf(FloatRegisterImpl::S, r1, offset, d);
 325   ldf(FloatRegisterImpl::S, r1, offset + Interpreter::stackElementSize, d->successor());
 326 #endif
 327 }
 328 
 329 // Known good alignment in _LP64 but unknown otherwise
 330 void InterpreterMacroAssembler::store_unaligned_double(FloatRegister d, Register r1, int offset) {
 331   assert_not_delayed();
 332 
 333 #ifdef _LP64
 334   stf(FloatRegisterImpl::D, d, r1, offset);
 335   // store something more useful here
 336   debug_only(stx(G0, r1, offset+Interpreter::stackElementSize);)
 337 #else
 338   stf(FloatRegisterImpl::S, d, r1, offset);
 339   stf(FloatRegisterImpl::S, d->successor(), r1, offset + Interpreter::stackElementSize);
 340 #endif
 341 }
 342 
 343 
 344 // Known good alignment in _LP64 but unknown otherwise
 345 void InterpreterMacroAssembler::load_unaligned_long(Register r1, int offset, Register rd) {
 346   assert_not_delayed();
 347 #ifdef _LP64
 348   ldx(r1, offset, rd);
 349 #else
 350   ld(r1, offset, rd);
 351   ld(r1, offset + Interpreter::stackElementSize, rd->successor());
 352 #endif
 353 }
 354 
 355 // Known good alignment in _LP64 but unknown otherwise
 356 void InterpreterMacroAssembler::store_unaligned_long(Register l, Register r1, int offset) {
 357   assert_not_delayed();
 358 
 359 #ifdef _LP64
 360   stx(l, r1, offset);
 361   // store something more useful here
 362   stx(G0, r1, offset+Interpreter::stackElementSize);
 363 #else
 364   st(l, r1, offset);
 365   st(l->successor(), r1, offset + Interpreter::stackElementSize);
 366 #endif
 367 }
 368 
 369 void InterpreterMacroAssembler::pop_i(Register r) {
 370   assert_not_delayed();
 371   ld(Lesp, Interpreter::expr_offset_in_bytes(0), r);
 372   inc(Lesp, Interpreter::stackElementSize);
 373   debug_only(verify_esp(Lesp));
 374 }
 375 
 376 void InterpreterMacroAssembler::pop_ptr(Register r, Register scratch) {
 377   assert_not_delayed();
 378   ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(0), r);
 379   inc(Lesp, Interpreter::stackElementSize);
 380   debug_only(verify_esp(Lesp));
 381 }
 382 
 383 void InterpreterMacroAssembler::pop_l(Register r) {
 384   assert_not_delayed();
 385   load_unaligned_long(Lesp, Interpreter::expr_offset_in_bytes(0), r);
 386   inc(Lesp, 2*Interpreter::stackElementSize);


 510 
 511   // A native does not need to do this, since its callee does not change SP.
 512   ld(Lmethod, Method::access_flags_offset(), Gframe_size);  // Load access flags.
 513   btst(JVM_ACC_NATIVE, Gframe_size);
 514   br(Assembler::notZero, false, Assembler::pt, done);
 515   delayed()->nop();
 516 
 517   // Compute max expression stack+register save area
 518   ld_ptr(Lmethod, in_bytes(Method::const_offset()), Gframe_size);
 519   lduh(Gframe_size, in_bytes(ConstMethod::max_stack_offset()), Gframe_size);  // Load max stack.
 520   add(Gframe_size, frame::memory_parameter_word_sp_offset+Method::extra_stack_entries(), Gframe_size );
 521 
 522   //
 523   // now set up a stack frame with the size computed above
 524   //
 525   //round_to( Gframe_size, WordsPerLong ); // -- moved down to the "and" below
 526   sll( Gframe_size, LogBytesPerWord, Gframe_size );
 527   sub( Lesp, Gframe_size, Gframe_size );
 528   and3( Gframe_size, -(2 * wordSize), Gframe_size );          // align SP (downwards) to an 8/16-byte boundary
 529   debug_only(verify_sp(Gframe_size, G4_scratch));
 530 #ifdef _LP64
 531   sub(Gframe_size, STACK_BIAS, Gframe_size );
 532 #endif
 533   mov(Gframe_size, SP);
 534 
 535   bind(done);
 536 }
 537 
 538 
 539 #ifdef ASSERT
 540 void InterpreterMacroAssembler::verify_sp(Register Rsp, Register Rtemp) {
 541   Label Bad, OK;
 542 
 543   // Saved SP must be aligned.
 544 #ifdef _LP64
 545   btst(2*BytesPerWord-1, Rsp);
 546 #else
 547   btst(LongAlignmentMask, Rsp);
 548 #endif
 549   br(Assembler::notZero, false, Assembler::pn, Bad);
 550   delayed()->nop();
 551 
 552   // Saved SP, plus register window size, must not be above FP.
 553   add(Rsp, frame::register_save_words * wordSize, Rtemp);
 554 #ifdef _LP64
 555   sub(Rtemp, STACK_BIAS, Rtemp);  // Bias Rtemp before cmp to FP
 556 #endif
 557   cmp_and_brx_short(Rtemp, FP, Assembler::greaterUnsigned, Assembler::pn, Bad);
 558 
 559   // Saved SP must not be ridiculously below current SP.
 560   size_t maxstack = MAX2(JavaThread::stack_size_at_create(), (size_t) 4*K*K);
 561   set(maxstack, Rtemp);
 562   sub(SP, Rtemp, Rtemp);
 563 #ifdef _LP64
 564   add(Rtemp, STACK_BIAS, Rtemp);  // Unbias Rtemp before cmp to Rsp
 565 #endif
 566   cmp_and_brx_short(Rsp, Rtemp, Assembler::lessUnsigned, Assembler::pn, Bad);
 567 
 568   ba_short(OK);
 569 
 570   bind(Bad);
 571   stop("on return to interpreted call, restored SP is corrupted");
 572 
 573   bind(OK);
 574 }
 575 
 576 
 577 void InterpreterMacroAssembler::verify_esp(Register Resp) {
 578   // about to read or write Resp[0]
 579   // make sure it is not in the monitors or the register save area
 580   Label OK1, OK2;
 581 
 582   cmp(Resp, Lmonitors);
 583   brx(Assembler::lessUnsigned, true, Assembler::pt, OK1);
 584   delayed()->sub(Resp, frame::memory_parameter_word_sp_offset * wordSize, Resp);
 585   stop("too many pops:  Lesp points into monitor area");
 586   bind(OK1);
 587 #ifdef _LP64
 588   sub(Resp, STACK_BIAS, Resp);
 589 #endif
 590   cmp(Resp, SP);
 591   brx(Assembler::greaterEqualUnsigned, false, Assembler::pt, OK2);
 592   delayed()->add(Resp, STACK_BIAS + frame::memory_parameter_word_sp_offset * wordSize, Resp);
 593   stop("too many pushes:  Lesp points into register window");
 594   bind(OK2);
 595 }
 596 #endif // ASSERT
 597 
 598 // Load compiled (i2c) or interpreter entry when calling from interpreted and
 599 // do the call. Centralized so that all interpreter calls will do the same actions.
 600 // If jvmti single stepping is on for a thread we must not call compiled code.
 601 void InterpreterMacroAssembler::call_from_interpreter(Register target, Register scratch, Register Rret) {
 602 
 603   // Assume we want to go compiled if available
 604 
 605   ld_ptr(G5_method, in_bytes(Method::from_interpreted_offset()), target);
 606 
 607   if (JvmtiExport::can_post_interpreter_events()) {
 608     // JVMTI events, such as single-stepping, are implemented partly by avoiding running
 609     // compiled code in threads for which the event is enabled.  Check here for


 679 
 680 
 681 void InterpreterMacroAssembler::get_4_byte_integer_at_bcp(
 682                                   int        bcp_offset,
 683                                   Register   Rtmp,
 684                                   Register   Rdst,
 685                                   setCCOrNot should_set_CC ) {
 686   assert(Rtmp != Rdst, "need separate temp register");
 687   assert_not_delayed();
 688   add( Lbcp, bcp_offset, Rtmp);
 689   andcc( Rtmp, 3, G0);
 690   Label aligned;
 691   switch (should_set_CC ) {
 692    default: ShouldNotReachHere();
 693 
 694    case      set_CC: break;
 695    case dont_set_CC: break;
 696   }
 697 
 698   br(Assembler::zero, true, Assembler::pn, aligned);
 699 #ifdef _LP64
 700   delayed()->ldsw(Rtmp, 0, Rdst);
 701 #else
 702   delayed()->ld(Rtmp, 0, Rdst);
 703 #endif
 704 
 705   ldub(Lbcp, bcp_offset + 3, Rdst);
 706   ldub(Lbcp, bcp_offset + 2, Rtmp);  sll(Rtmp,  8, Rtmp);  or3(Rtmp, Rdst, Rdst);
 707   ldub(Lbcp, bcp_offset + 1, Rtmp);  sll(Rtmp, 16, Rtmp);  or3(Rtmp, Rdst, Rdst);
 708 #ifdef _LP64
 709   ldsb(Lbcp, bcp_offset + 0, Rtmp);  sll(Rtmp, 24, Rtmp);
 710 #else
 711   // Unsigned load is faster than signed on some implementations
 712   ldub(Lbcp, bcp_offset + 0, Rtmp);  sll(Rtmp, 24, Rtmp);
 713 #endif
 714   or3(Rtmp, Rdst, Rdst );
 715 
 716   bind(aligned);
 717   if (should_set_CC == set_CC) tst(Rdst);
 718 }
 719 
 720 void InterpreterMacroAssembler::get_cache_index_at_bcp(Register temp, Register index,
 721                                                        int bcp_offset, size_t index_size) {
 722   assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
 723   if (index_size == sizeof(u2)) {
 724     get_2_byte_integer_at_bcp(bcp_offset, temp, index, Unsigned);
 725   } else if (index_size == sizeof(u4)) {
 726     get_4_byte_integer_at_bcp(bcp_offset, temp, index);
 727     assert(ConstantPool::decode_invokedynamic_index(~123) == 123, "else change next line");
 728     xor3(index, -1, index);  // convert to plain index
 729   } else if (index_size == sizeof(u1)) {
 730     ldub(Lbcp, bcp_offset, index);
 731   } else {
 732     ShouldNotReachHere();
 733   }


 893   throw_if_not_2( throw_entry_point, Rscratch, ok);
 894 }
 895 void InterpreterMacroAssembler::throw_if_not_x( Condition ok_condition,
 896                                                 address   throw_entry_point,
 897                                                 Register  Rscratch ) {
 898   Label ok;
 899   if (ok_condition != never) {
 900     throw_if_not_1_x( ok_condition, ok);
 901     delayed()->nop();
 902   }
 903   throw_if_not_2( throw_entry_point, Rscratch, ok);
 904 }
 905 
 906 // Check that index is in range for array, then shift index by index_shift, and put arrayOop + shifted_index into res
 907 // Note: res is still shy of address by array offset into object.
 908 
 909 void InterpreterMacroAssembler::index_check_without_pop(Register array, Register index, int index_shift, Register tmp, Register res) {
 910   assert_not_delayed();
 911 
 912   verify_oop(array);
 913 #ifdef _LP64
 914   // sign extend since tos (index) can be a 32bit value
 915   sra(index, G0, index);
 916 #endif // _LP64
 917 
 918   // check array
 919   Label ptr_ok;
 920   tst(array);
 921   throw_if_not_1_x( notZero, ptr_ok );
 922   delayed()->ld( array, arrayOopDesc::length_offset_in_bytes(), tmp ); // check index
 923   throw_if_not_2( Interpreter::_throw_NullPointerException_entry, G3_scratch, ptr_ok);
 924 
 925   Label index_ok;
 926   cmp(index, tmp);
 927   throw_if_not_1_icc( lessUnsigned, index_ok );
 928   if (index_shift > 0)  delayed()->sll(index, index_shift, index);
 929   else                  delayed()->add(array, index, res); // addr - const offset in index
 930   // convention: move aberrant index into G3_scratch for exception message
 931   mov(index, G3_scratch);
 932   throw_if_not_2( Interpreter::_throw_ArrayIndexOutOfBoundsException_entry, G4_scratch, index_ok);
 933 
 934   // add offset if didn't do it in delay slot
 935   if (index_shift > 0)   add(array, index, res); // addr - const offset in index
 936 }


1174 
1175   if (StackReservedPages > 0) {
1176     // testing if Stack Reserved Area needs to be re-enabled
1177     Label no_reserved_zone_enabling;
1178     ld_ptr(G2_thread, JavaThread::reserved_stack_activation_offset(), G3_scratch);
1179     cmp_and_brx_short(SP, G3_scratch, Assembler::lessUnsigned, Assembler::pt, no_reserved_zone_enabling);
1180 
1181     call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, SharedRuntime::enable_stack_reserved_zone), G2_thread);
1182     call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_delayed_StackOverflowError), G2_thread);
1183     should_not_reach_here();
1184 
1185     bind(no_reserved_zone_enabling);
1186   }
1187 
1188   interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
1189   verify_thread();
1190 
1191   // return tos
1192   assert(Otos_l1 == Otos_i, "adjust code below");
1193   switch (state) {
1194 #ifdef _LP64
1195   case ltos: mov(Otos_l, Otos_l->after_save()); break; // O0 -> I0
1196 #else
1197   case ltos: mov(Otos_l2, Otos_l2->after_save()); // fall through  // O1 -> I1
1198 #endif
1199   case btos:                                      // fall through
1200   case ztos:                                      // fall through
1201   case ctos:
1202   case stos:                                      // fall through
1203   case atos:                                      // fall through
1204   case itos: mov(Otos_l1, Otos_l1->after_save());    break;        // O0 -> I0
1205   case ftos:                                      // fall through
1206   case dtos:                                      // fall through
1207   case vtos: /* nothing to do */                     break;
1208   default  : ShouldNotReachHere();
1209   }
1210 
1211 #if defined(COMPILER2) && !defined(_LP64)
1212   if (state == ltos) {
1213     // C2 expects long results in G1 we can't tell if we're returning to interpreted
1214     // or compiled so just be safe use G1 and O0/O1
1215 
1216     // Shift bits into high (msb) of G1
1217     sllx(Otos_l1->after_save(), 32, G1);
1218     // Zero extend low bits
1219     srl (Otos_l2->after_save(), 0, Otos_l2->after_save());
1220     or3 (Otos_l2->after_save(), G1, G1);
1221   }
1222 #endif /* COMPILER2 */
1223 
1224 }
1225 
1226 // Lock object
1227 //
1228 // Argument - lock_reg points to the BasicObjectLock to be used for locking,
1229 //            it must be initialized with the object to lock
1230 void InterpreterMacroAssembler::lock_object(Register lock_reg, Register Object) {
1231   if (UseHeavyMonitors) {
1232     call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorenter), lock_reg);
1233   }
1234   else {
1235     Register obj_reg = Object;
1236     Register mark_reg = G4_scratch;
1237     Register temp_reg = G1_scratch;
1238     Address  lock_addr(lock_reg, BasicObjectLock::lock_offset_in_bytes());
1239     Address  mark_addr(obj_reg, oopDesc::mark_offset_in_bytes());
1240     Label    done;
1241 
1242     Label slow_case;
1243 


1253     // get the address of basicLock on stack that will be stored in the object
1254     // we need a temporary register here as we do not want to clobber lock_reg
1255     // (cas clobbers the destination register)
1256     mov(lock_reg, temp_reg);
1257     // set mark reg to be (markOop of object | UNLOCK_VALUE)
1258     or3(mark_reg, markOopDesc::unlocked_value, mark_reg);
1259     // initialize the box  (Must happen before we update the object mark!)
1260     st_ptr(mark_reg, lock_addr, BasicLock::displaced_header_offset_in_bytes());
1261     // compare and exchange object_addr, markOop | 1, stack address of basicLock
1262     assert(mark_addr.disp() == 0, "cas must take a zero displacement");
1263     cas_ptr(mark_addr.base(), mark_reg, temp_reg);
1264 
1265     // if the compare and exchange succeeded we are done (we saw an unlocked object)
1266     cmp_and_brx_short(mark_reg, temp_reg, Assembler::equal, Assembler::pt, done);
1267 
1268     // We did not see an unlocked object so try the fast recursive case
1269 
1270     // Check if owner is self by comparing the value in the markOop of object
1271     // with the stack pointer
1272     sub(temp_reg, SP, temp_reg);
1273 #ifdef _LP64
1274     sub(temp_reg, STACK_BIAS, temp_reg);
1275 #endif
1276     assert(os::vm_page_size() > 0xfff, "page size too small - change the constant");
1277 
1278     // Composite "andcc" test:
1279     // (a) %sp -vs- markword proximity check, and,
1280     // (b) verify mark word LSBs == 0 (Stack-locked).
1281     //
1282     // FFFFF003/FFFFFFFFFFFF003 is (markOopDesc::lock_mask_in_place | -os::vm_page_size())
1283     // Note that the page size used for %sp proximity testing is arbitrary and is
1284     // unrelated to the actual MMU page size.  We use a 'logical' page size of
1285     // 4096 bytes.   F..FFF003 is designed to fit conveniently in the SIMM13 immediate
1286     // field of the andcc instruction.
1287     andcc (temp_reg, 0xFFFFF003, G0) ;
1288 
1289     // if condition is true we are done and hence we can store 0 in the displaced
1290     // header indicating it is a recursive lock and be done
1291     brx(Assembler::zero, true, Assembler::pt, done);
1292     delayed()->st_ptr(G0, lock_addr, BasicLock::displaced_header_offset_in_bytes());
1293 
1294     // none of the above fast optimizations worked so we have to get into the
1295     // slow case of monitor enter


2694     restore_return_value(state, is_native_method);
2695     bind(L);
2696   }
2697 
2698   {
2699     Register temp_reg = O5;
2700     // Dtrace notification
2701     SkipIfEqual skip_if(this, temp_reg, &DTraceMethodProbes, zero);
2702     save_return_value(state, is_native_method);
2703     call_VM_leaf(
2704       noreg,
2705       CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2706       G2_thread, Lmethod);
2707     restore_return_value(state, is_native_method);
2708   }
2709 }
2710 
2711 void InterpreterMacroAssembler::save_return_value(TosState state, bool is_native_call) {
2712   if (is_native_call) {
2713     stf(FloatRegisterImpl::D, F0, d_tmp);
2714 #ifdef _LP64
2715     stx(O0, l_tmp);
2716 #else
2717     std(O0, l_tmp);
2718 #endif
2719   } else {
2720     push(state);
2721   }
2722 }
2723 
2724 void InterpreterMacroAssembler::restore_return_value( TosState state, bool is_native_call) {
2725   if (is_native_call) {
2726     ldf(FloatRegisterImpl::D, d_tmp, F0);
2727 #ifdef _LP64
2728     ldx(l_tmp, O0);
2729 #else
2730     ldd(l_tmp, O0);
2731 #endif
2732   } else {
2733     pop(state);
2734   }
2735 }


 301   jmp( G3_scratch, 0 );
 302   if (bcp_incr != 0)  delayed()->inc(Lbcp, bcp_incr);
 303   else                delayed()->nop();
 304 }
 305 
 306 
 307 // Helpers for expression stack
 308 
 309 // Longs and doubles are Category 2 computational types in the
 310 // JVM specification (section 3.11.1) and take 2 expression stack or
 311 // local slots.
 312 // Aligning them on 32 bit with tagged stacks is hard because the code generated
 313 // for the dup* bytecodes depends on what types are already on the stack.
 314 // If the types are split into the two stack/local slots, that is much easier
 315 // (and we can use 0 for non-reference tags).
 316 
 317 // Known good alignment in _LP64 but unknown otherwise
 318 void InterpreterMacroAssembler::load_unaligned_double(Register r1, int offset, FloatRegister d) {
 319   assert_not_delayed();
 320 

 321   ldf(FloatRegisterImpl::D, r1, offset, d);




 322 }
 323 
 324 // Known good alignment in _LP64 but unknown otherwise
 325 void InterpreterMacroAssembler::store_unaligned_double(FloatRegister d, Register r1, int offset) {
 326   assert_not_delayed();
 327 

 328   stf(FloatRegisterImpl::D, d, r1, offset);
 329   // store something more useful here
 330   debug_only(stx(G0, r1, offset+Interpreter::stackElementSize);)




 331 }
 332 
 333 
 334 // Known good alignment in _LP64 but unknown otherwise
 335 void InterpreterMacroAssembler::load_unaligned_long(Register r1, int offset, Register rd) {
 336   assert_not_delayed();

 337   ldx(r1, offset, rd);




 338 }
 339 
 340 // Known good alignment in _LP64 but unknown otherwise
 341 void InterpreterMacroAssembler::store_unaligned_long(Register l, Register r1, int offset) {
 342   assert_not_delayed();
 343 

 344   stx(l, r1, offset);
 345   // store something more useful here
 346   stx(G0, r1, offset+Interpreter::stackElementSize);




 347 }
 348 
 349 void InterpreterMacroAssembler::pop_i(Register r) {
 350   assert_not_delayed();
 351   ld(Lesp, Interpreter::expr_offset_in_bytes(0), r);
 352   inc(Lesp, Interpreter::stackElementSize);
 353   debug_only(verify_esp(Lesp));
 354 }
 355 
 356 void InterpreterMacroAssembler::pop_ptr(Register r, Register scratch) {
 357   assert_not_delayed();
 358   ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(0), r);
 359   inc(Lesp, Interpreter::stackElementSize);
 360   debug_only(verify_esp(Lesp));
 361 }
 362 
 363 void InterpreterMacroAssembler::pop_l(Register r) {
 364   assert_not_delayed();
 365   load_unaligned_long(Lesp, Interpreter::expr_offset_in_bytes(0), r);
 366   inc(Lesp, 2*Interpreter::stackElementSize);


 490 
 491   // A native does not need to do this, since its callee does not change SP.
 492   ld(Lmethod, Method::access_flags_offset(), Gframe_size);  // Load access flags.
 493   btst(JVM_ACC_NATIVE, Gframe_size);
 494   br(Assembler::notZero, false, Assembler::pt, done);
 495   delayed()->nop();
 496 
 497   // Compute max expression stack+register save area
 498   ld_ptr(Lmethod, in_bytes(Method::const_offset()), Gframe_size);
 499   lduh(Gframe_size, in_bytes(ConstMethod::max_stack_offset()), Gframe_size);  // Load max stack.
 500   add(Gframe_size, frame::memory_parameter_word_sp_offset+Method::extra_stack_entries(), Gframe_size );
 501 
 502   //
 503   // now set up a stack frame with the size computed above
 504   //
 505   //round_to( Gframe_size, WordsPerLong ); // -- moved down to the "and" below
 506   sll( Gframe_size, LogBytesPerWord, Gframe_size );
 507   sub( Lesp, Gframe_size, Gframe_size );
 508   and3( Gframe_size, -(2 * wordSize), Gframe_size );          // align SP (downwards) to an 8/16-byte boundary
 509   debug_only(verify_sp(Gframe_size, G4_scratch));

 510   sub(Gframe_size, STACK_BIAS, Gframe_size );

 511   mov(Gframe_size, SP);
 512 
 513   bind(done);
 514 }
 515 
 516 
 517 #ifdef ASSERT
 518 void InterpreterMacroAssembler::verify_sp(Register Rsp, Register Rtemp) {
 519   Label Bad, OK;
 520 
 521   // Saved SP must be aligned.

 522   btst(2*BytesPerWord-1, Rsp);



 523   br(Assembler::notZero, false, Assembler::pn, Bad);
 524   delayed()->nop();
 525 
 526   // Saved SP, plus register window size, must not be above FP.
 527   add(Rsp, frame::register_save_words * wordSize, Rtemp);

 528   sub(Rtemp, STACK_BIAS, Rtemp);  // Bias Rtemp before cmp to FP

 529   cmp_and_brx_short(Rtemp, FP, Assembler::greaterUnsigned, Assembler::pn, Bad);
 530 
 531   // Saved SP must not be ridiculously below current SP.
 532   size_t maxstack = MAX2(JavaThread::stack_size_at_create(), (size_t) 4*K*K);
 533   set(maxstack, Rtemp);
 534   sub(SP, Rtemp, Rtemp);

 535   add(Rtemp, STACK_BIAS, Rtemp);  // Unbias Rtemp before cmp to Rsp

 536   cmp_and_brx_short(Rsp, Rtemp, Assembler::lessUnsigned, Assembler::pn, Bad);
 537 
 538   ba_short(OK);
 539 
 540   bind(Bad);
 541   stop("on return to interpreted call, restored SP is corrupted");
 542 
 543   bind(OK);
 544 }
 545 
 546 
 547 void InterpreterMacroAssembler::verify_esp(Register Resp) {
 548   // about to read or write Resp[0]
 549   // make sure it is not in the monitors or the register save area
 550   Label OK1, OK2;
 551 
 552   cmp(Resp, Lmonitors);
 553   brx(Assembler::lessUnsigned, true, Assembler::pt, OK1);
 554   delayed()->sub(Resp, frame::memory_parameter_word_sp_offset * wordSize, Resp);
 555   stop("too many pops:  Lesp points into monitor area");
 556   bind(OK1);

 557   sub(Resp, STACK_BIAS, Resp);

 558   cmp(Resp, SP);
 559   brx(Assembler::greaterEqualUnsigned, false, Assembler::pt, OK2);
 560   delayed()->add(Resp, STACK_BIAS + frame::memory_parameter_word_sp_offset * wordSize, Resp);
 561   stop("too many pushes:  Lesp points into register window");
 562   bind(OK2);
 563 }
 564 #endif // ASSERT
 565 
 566 // Load compiled (i2c) or interpreter entry when calling from interpreted and
 567 // do the call. Centralized so that all interpreter calls will do the same actions.
 568 // If jvmti single stepping is on for a thread we must not call compiled code.
 569 void InterpreterMacroAssembler::call_from_interpreter(Register target, Register scratch, Register Rret) {
 570 
 571   // Assume we want to go compiled if available
 572 
 573   ld_ptr(G5_method, in_bytes(Method::from_interpreted_offset()), target);
 574 
 575   if (JvmtiExport::can_post_interpreter_events()) {
 576     // JVMTI events, such as single-stepping, are implemented partly by avoiding running
 577     // compiled code in threads for which the event is enabled.  Check here for


 647 
 648 
 649 void InterpreterMacroAssembler::get_4_byte_integer_at_bcp(
 650                                   int        bcp_offset,
 651                                   Register   Rtmp,
 652                                   Register   Rdst,
 653                                   setCCOrNot should_set_CC ) {
 654   assert(Rtmp != Rdst, "need separate temp register");
 655   assert_not_delayed();
 656   add( Lbcp, bcp_offset, Rtmp);
 657   andcc( Rtmp, 3, G0);
 658   Label aligned;
 659   switch (should_set_CC ) {
 660    default: ShouldNotReachHere();
 661 
 662    case      set_CC: break;
 663    case dont_set_CC: break;
 664   }
 665 
 666   br(Assembler::zero, true, Assembler::pn, aligned);

 667   delayed()->ldsw(Rtmp, 0, Rdst);



 668 
 669   ldub(Lbcp, bcp_offset + 3, Rdst);
 670   ldub(Lbcp, bcp_offset + 2, Rtmp);  sll(Rtmp,  8, Rtmp);  or3(Rtmp, Rdst, Rdst);
 671   ldub(Lbcp, bcp_offset + 1, Rtmp);  sll(Rtmp, 16, Rtmp);  or3(Rtmp, Rdst, Rdst);

 672   ldsb(Lbcp, bcp_offset + 0, Rtmp);  sll(Rtmp, 24, Rtmp);




 673   or3(Rtmp, Rdst, Rdst );
 674 
 675   bind(aligned);
 676   if (should_set_CC == set_CC) tst(Rdst);
 677 }
 678 
 679 void InterpreterMacroAssembler::get_cache_index_at_bcp(Register temp, Register index,
 680                                                        int bcp_offset, size_t index_size) {
 681   assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
 682   if (index_size == sizeof(u2)) {
 683     get_2_byte_integer_at_bcp(bcp_offset, temp, index, Unsigned);
 684   } else if (index_size == sizeof(u4)) {
 685     get_4_byte_integer_at_bcp(bcp_offset, temp, index);
 686     assert(ConstantPool::decode_invokedynamic_index(~123) == 123, "else change next line");
 687     xor3(index, -1, index);  // convert to plain index
 688   } else if (index_size == sizeof(u1)) {
 689     ldub(Lbcp, bcp_offset, index);
 690   } else {
 691     ShouldNotReachHere();
 692   }


 852   throw_if_not_2( throw_entry_point, Rscratch, ok);
 853 }
 854 void InterpreterMacroAssembler::throw_if_not_x( Condition ok_condition,
 855                                                 address   throw_entry_point,
 856                                                 Register  Rscratch ) {
 857   Label ok;
 858   if (ok_condition != never) {
 859     throw_if_not_1_x( ok_condition, ok);
 860     delayed()->nop();
 861   }
 862   throw_if_not_2( throw_entry_point, Rscratch, ok);
 863 }
 864 
 865 // Check that index is in range for array, then shift index by index_shift, and put arrayOop + shifted_index into res
 866 // Note: res is still shy of address by array offset into object.
 867 
 868 void InterpreterMacroAssembler::index_check_without_pop(Register array, Register index, int index_shift, Register tmp, Register res) {
 869   assert_not_delayed();
 870 
 871   verify_oop(array);

 872   // sign extend since tos (index) can be a 32bit value
 873   sra(index, G0, index);

 874 
 875   // check array
 876   Label ptr_ok;
 877   tst(array);
 878   throw_if_not_1_x( notZero, ptr_ok );
 879   delayed()->ld( array, arrayOopDesc::length_offset_in_bytes(), tmp ); // check index
 880   throw_if_not_2( Interpreter::_throw_NullPointerException_entry, G3_scratch, ptr_ok);
 881 
 882   Label index_ok;
 883   cmp(index, tmp);
 884   throw_if_not_1_icc( lessUnsigned, index_ok );
 885   if (index_shift > 0)  delayed()->sll(index, index_shift, index);
 886   else                  delayed()->add(array, index, res); // addr - const offset in index
 887   // convention: move aberrant index into G3_scratch for exception message
 888   mov(index, G3_scratch);
 889   throw_if_not_2( Interpreter::_throw_ArrayIndexOutOfBoundsException_entry, G4_scratch, index_ok);
 890 
 891   // add offset if didn't do it in delay slot
 892   if (index_shift > 0)   add(array, index, res); // addr - const offset in index
 893 }


1131 
1132   if (StackReservedPages > 0) {
1133     // testing if Stack Reserved Area needs to be re-enabled
1134     Label no_reserved_zone_enabling;
1135     ld_ptr(G2_thread, JavaThread::reserved_stack_activation_offset(), G3_scratch);
1136     cmp_and_brx_short(SP, G3_scratch, Assembler::lessUnsigned, Assembler::pt, no_reserved_zone_enabling);
1137 
1138     call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, SharedRuntime::enable_stack_reserved_zone), G2_thread);
1139     call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_delayed_StackOverflowError), G2_thread);
1140     should_not_reach_here();
1141 
1142     bind(no_reserved_zone_enabling);
1143   }
1144 
1145   interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
1146   verify_thread();
1147 
1148   // return tos
1149   assert(Otos_l1 == Otos_i, "adjust code below");
1150   switch (state) {

1151   case ltos: mov(Otos_l, Otos_l->after_save()); break; // O0 -> I0



1152   case btos:                                      // fall through
1153   case ztos:                                      // fall through
1154   case ctos:
1155   case stos:                                      // fall through
1156   case atos:                                      // fall through
1157   case itos: mov(Otos_l1, Otos_l1->after_save());    break;        // O0 -> I0
1158   case ftos:                                      // fall through
1159   case dtos:                                      // fall through
1160   case vtos: /* nothing to do */                     break;
1161   default  : ShouldNotReachHere();
1162   }














1163 }
1164 
1165 // Lock object
1166 //
1167 // Argument - lock_reg points to the BasicObjectLock to be used for locking,
1168 //            it must be initialized with the object to lock
1169 void InterpreterMacroAssembler::lock_object(Register lock_reg, Register Object) {
1170   if (UseHeavyMonitors) {
1171     call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorenter), lock_reg);
1172   }
1173   else {
1174     Register obj_reg = Object;
1175     Register mark_reg = G4_scratch;
1176     Register temp_reg = G1_scratch;
1177     Address  lock_addr(lock_reg, BasicObjectLock::lock_offset_in_bytes());
1178     Address  mark_addr(obj_reg, oopDesc::mark_offset_in_bytes());
1179     Label    done;
1180 
1181     Label slow_case;
1182 


1192     // get the address of basicLock on stack that will be stored in the object
1193     // we need a temporary register here as we do not want to clobber lock_reg
1194     // (cas clobbers the destination register)
1195     mov(lock_reg, temp_reg);
1196     // set mark reg to be (markOop of object | UNLOCK_VALUE)
1197     or3(mark_reg, markOopDesc::unlocked_value, mark_reg);
1198     // initialize the box  (Must happen before we update the object mark!)
1199     st_ptr(mark_reg, lock_addr, BasicLock::displaced_header_offset_in_bytes());
1200     // compare and exchange object_addr, markOop | 1, stack address of basicLock
1201     assert(mark_addr.disp() == 0, "cas must take a zero displacement");
1202     cas_ptr(mark_addr.base(), mark_reg, temp_reg);
1203 
1204     // if the compare and exchange succeeded we are done (we saw an unlocked object)
1205     cmp_and_brx_short(mark_reg, temp_reg, Assembler::equal, Assembler::pt, done);
1206 
1207     // We did not see an unlocked object so try the fast recursive case
1208 
1209     // Check if owner is self by comparing the value in the markOop of object
1210     // with the stack pointer
1211     sub(temp_reg, SP, temp_reg);

1212     sub(temp_reg, STACK_BIAS, temp_reg);

1213     assert(os::vm_page_size() > 0xfff, "page size too small - change the constant");
1214 
1215     // Composite "andcc" test:
1216     // (a) %sp -vs- markword proximity check, and,
1217     // (b) verify mark word LSBs == 0 (Stack-locked).
1218     //
1219     // FFFFF003/FFFFFFFFFFFF003 is (markOopDesc::lock_mask_in_place | -os::vm_page_size())
1220     // Note that the page size used for %sp proximity testing is arbitrary and is
1221     // unrelated to the actual MMU page size.  We use a 'logical' page size of
1222     // 4096 bytes.   F..FFF003 is designed to fit conveniently in the SIMM13 immediate
1223     // field of the andcc instruction.
1224     andcc (temp_reg, 0xFFFFF003, G0) ;
1225 
1226     // if condition is true we are done and hence we can store 0 in the displaced
1227     // header indicating it is a recursive lock and be done
1228     brx(Assembler::zero, true, Assembler::pt, done);
1229     delayed()->st_ptr(G0, lock_addr, BasicLock::displaced_header_offset_in_bytes());
1230 
1231     // none of the above fast optimizations worked so we have to get into the
1232     // slow case of monitor enter


2631     restore_return_value(state, is_native_method);
2632     bind(L);
2633   }
2634 
2635   {
2636     Register temp_reg = O5;
2637     // Dtrace notification
2638     SkipIfEqual skip_if(this, temp_reg, &DTraceMethodProbes, zero);
2639     save_return_value(state, is_native_method);
2640     call_VM_leaf(
2641       noreg,
2642       CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2643       G2_thread, Lmethod);
2644     restore_return_value(state, is_native_method);
2645   }
2646 }
2647 
2648 void InterpreterMacroAssembler::save_return_value(TosState state, bool is_native_call) {
2649   if (is_native_call) {
2650     stf(FloatRegisterImpl::D, F0, d_tmp);

2651     stx(O0, l_tmp);



2652   } else {
2653     push(state);
2654   }
2655 }
2656 
2657 void InterpreterMacroAssembler::restore_return_value( TosState state, bool is_native_call) {
2658   if (is_native_call) {
2659     ldf(FloatRegisterImpl::D, d_tmp, F0);

2660     ldx(l_tmp, O0);



2661   } else {
2662     pop(state);
2663   }
2664 }
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