src/cpu/sparc/vm/nativeInst_sparc.cpp

*** 234,245 ****
  }
  // End code for unit testing implementation of NativeCall class
  
  //-------------------------------------------------------------------
  
- #ifdef _LP64
- 
  void NativeFarCall::set_destination(address dest) {
    // Address materialized in the instruction stream, so nothing to do.
    return;
  #if 0 // What we'd do if we really did want to change the destination
    if (destination() == dest) {
--- 234,243 ----
*** 288,299 ****
  void NativeFarCall::test() {
    Unimplemented();
  }
  // End code for unit testing implementation of NativeFarCall class
  
- #endif // _LP64
- 
  //-------------------------------------------------------------------
  
  
  void NativeMovConstReg::verify() {
    NativeInstruction::verify();
--- 286,295 ----
*** 302,348 ****
    int i0 = long_at(sethi_offset);
    int i1 = long_at(add_offset);
  
    // verify the pattern "sethi %hi22(imm), reg ;  add reg, %lo10(imm), reg"
    Register rd = inv_rd(i0);
- #ifndef _LP64
-   if (!(is_op2(i0, Assembler::sethi_op2) && rd != G0 &&
-         is_op3(i1, Assembler::add_op3, Assembler::arith_op) &&
-         inv_immed(i1) && (unsigned)get_simm13(i1) < (1 << 10) &&
-         rd == inv_rs1(i1) && rd == inv_rd(i1))) {
-     fatal("not a set_metadata");
-   }
- #else
    if (!is_op2(i0, Assembler::sethi_op2) && rd != G0 ) {
      fatal("not a set_metadata");
    }
- #endif
  }
  
  
  void NativeMovConstReg::print() {
    tty->print_cr(INTPTR_FORMAT ": mov reg, " INTPTR_FORMAT, p2i(instruction_address()), data());
  }
  
  
- #ifdef _LP64
  intptr_t NativeMovConstReg::data() const {
    return data64(addr_at(sethi_offset), long_at(add_offset));
  }
- #else
- intptr_t NativeMovConstReg::data() const {
-   return data32(long_at(sethi_offset), long_at(add_offset));
- }
- #endif
  
  
  void NativeMovConstReg::set_data(intptr_t x) {
- #ifdef _LP64
    set_data64_sethi(addr_at(sethi_offset), x);
- #else
-   set_long_at(sethi_offset, set_data32_sethi(  long_at(sethi_offset), x));
- #endif
    set_long_at(add_offset,   set_data32_simm13( long_at(add_offset),   x));
  
    // also store the value into an oop_Relocation cell, if any
    CodeBlob* cb = CodeCache::find_blob(instruction_address());
    nmethod*  nm = cb ? cb->as_nmethod_or_null() : NULL;
--- 298,325 ----
*** 506,529 ****
    tty->print_cr(INTPTR_FORMAT ": mov reg, 0x%x", p2i(instruction_address()), data());
  }
  
  
  int NativeMovConstRegPatching::data() const {
- #ifdef _LP64
    return data64(addr_at(sethi_offset), long_at(add_offset));
- #else
-   return data32(long_at(sethi_offset), long_at(add_offset));
- #endif
  }
  
  
  void NativeMovConstRegPatching::set_data(int x) {
- #ifdef _LP64
    set_data64_sethi(addr_at(sethi_offset), x);
- #else
-   set_long_at(sethi_offset, set_data32_sethi(long_at(sethi_offset), x));
- #endif
    set_long_at(add_offset, set_data32_simm13(long_at(add_offset), x));
  
    // also store the value into an oop_Relocation cell, if any
    CodeBlob* cb = CodeCache::find_blob(instruction_address());
    nmethod*  nm = cb ? cb->as_nmethod_or_null() : NULL;
--- 483,498 ----
*** 756,780 ****
    int i0 = long_at(sethi_offset);
    int i1 = long_at(jmpl_offset);
    assert((int)jmpl_offset == (int)NativeMovConstReg::add_offset, "sethi size ok");
    // verify the pattern "sethi %hi22(imm), treg ;  jmpl treg, %lo10(imm), lreg"
    Register rd = inv_rd(i0);
- #ifndef _LP64
-   if (!(is_op2(i0, Assembler::sethi_op2) && rd != G0 &&
-         (is_op3(i1, Assembler::jmpl_op3, Assembler::arith_op)) &&
-         inv_immed(i1) && (unsigned)get_simm13(i1) < (1 << 10) &&
-         rd == inv_rs1(i1))) {
-     fatal("not a jump_to instruction");
-   }
- #else
    // In LP64, the jump instruction location varies for non relocatable
    // jumps, for example is could be sethi, xor, jmp instead of the
    // 7 instructions for sethi.  So let's check sethi only.
    if (!is_op2(i0, Assembler::sethi_op2) && rd != G0 ) {
      fatal("not a jump_to instruction");
    }
- #endif
  }
  
  
  void NativeJump::print() {
    tty->print_cr(INTPTR_FORMAT ": jmpl reg, " INTPTR_FORMAT, p2i(instruction_address()), p2i(jump_destination()));
--- 725,740 ----