1 /*
2 * Copyright (c) 2000, 2011, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef SHARE_VM_C1_C1_LIR_HPP
26 #define SHARE_VM_C1_C1_LIR_HPP
27
28 #include "c1/c1_ValueType.hpp"
29
30 class BlockBegin;
31 class BlockList;
32 class LIR_Assembler;
33 class CodeEmitInfo;
34 class CodeStub;
35 class CodeStubList;
36 class ArrayCopyStub;
37 class LIR_Op;
38 class ciType;
39 class ValueType;
40 class LIR_OpVisitState;
41 class FpuStackSim;
42
43 //---------------------------------------------------------------------
44 // LIR Operands
45 // LIR_OprDesc
46 // LIR_OprPtr
47 // LIR_Const
48 // LIR_Address
49 //---------------------------------------------------------------------
50 class LIR_OprDesc;
51 class LIR_OprPtr;
52 class LIR_Const;
53 class LIR_Address;
54 class LIR_OprVisitor;
55
56
57 typedef LIR_OprDesc* LIR_Opr;
58 typedef int RegNr;
59
60 define_array(LIR_OprArray, LIR_Opr)
61 define_stack(LIR_OprList, LIR_OprArray)
62
63 define_array(LIR_OprRefArray, LIR_Opr*)
64 define_stack(LIR_OprRefList, LIR_OprRefArray)
65
66 define_array(CodeEmitInfoArray, CodeEmitInfo*)
67 define_stack(CodeEmitInfoList, CodeEmitInfoArray)
68
69 define_array(LIR_OpArray, LIR_Op*)
70 define_stack(LIR_OpList, LIR_OpArray)
71
72 // define LIR_OprPtr early so LIR_OprDesc can refer to it
73 class LIR_OprPtr: public CompilationResourceObj {
74 public:
75 bool is_oop_pointer() const { return (type() == T_OBJECT); }
76 bool is_float_kind() const { BasicType t = type(); return (t == T_FLOAT) || (t == T_DOUBLE); }
77
78 virtual LIR_Const* as_constant() { return NULL; }
79 virtual LIR_Address* as_address() { return NULL; }
80 virtual BasicType type() const = 0;
81 virtual void print_value_on(outputStream* out) const = 0;
82 };
83
84
85
86 // LIR constants
87 class LIR_Const: public LIR_OprPtr {
88 private:
89 JavaValue _value;
90
91 void type_check(BasicType t) const { assert(type() == t, "type check"); }
92 void type_check(BasicType t1, BasicType t2) const { assert(type() == t1 || type() == t2, "type check"); }
93 void type_check(BasicType t1, BasicType t2, BasicType t3) const { assert(type() == t1 || type() == t2 || type() == t3, "type check"); }
94
95 public:
96 LIR_Const(jint i, bool is_address=false) { _value.set_type(is_address?T_ADDRESS:T_INT); _value.set_jint(i); }
97 LIR_Const(jlong l) { _value.set_type(T_LONG); _value.set_jlong(l); }
98 LIR_Const(jfloat f) { _value.set_type(T_FLOAT); _value.set_jfloat(f); }
99 LIR_Const(jdouble d) { _value.set_type(T_DOUBLE); _value.set_jdouble(d); }
100 LIR_Const(jobject o) { _value.set_type(T_OBJECT); _value.set_jobject(o); }
101 LIR_Const(void* p) {
102 #ifdef _LP64
103 assert(sizeof(jlong) >= sizeof(p), "too small");;
104 _value.set_type(T_LONG); _value.set_jlong((jlong)p);
105 #else
106 assert(sizeof(jint) >= sizeof(p), "too small");;
107 _value.set_type(T_INT); _value.set_jint((jint)p);
108 #endif
109 }
110
111 virtual BasicType type() const { return _value.get_type(); }
112 virtual LIR_Const* as_constant() { return this; }
113
114 jint as_jint() const { type_check(T_INT, T_ADDRESS); return _value.get_jint(); }
115 jlong as_jlong() const { type_check(T_LONG ); return _value.get_jlong(); }
116 jfloat as_jfloat() const { type_check(T_FLOAT ); return _value.get_jfloat(); }
117 jdouble as_jdouble() const { type_check(T_DOUBLE); return _value.get_jdouble(); }
118 jobject as_jobject() const { type_check(T_OBJECT); return _value.get_jobject(); }
119 jint as_jint_lo() const { type_check(T_LONG ); return low(_value.get_jlong()); }
120 jint as_jint_hi() const { type_check(T_LONG ); return high(_value.get_jlong()); }
121
122 #ifdef _LP64
123 address as_pointer() const { type_check(T_LONG ); return (address)_value.get_jlong(); }
124 #else
125 address as_pointer() const { type_check(T_INT ); return (address)_value.get_jint(); }
126 #endif
127
128
129 jint as_jint_bits() const { type_check(T_FLOAT, T_INT, T_ADDRESS); return _value.get_jint(); }
130 jint as_jint_lo_bits() const {
131 if (type() == T_DOUBLE) {
132 return low(jlong_cast(_value.get_jdouble()));
133 } else {
134 return as_jint_lo();
135 }
136 }
137 jint as_jint_hi_bits() const {
138 if (type() == T_DOUBLE) {
139 return high(jlong_cast(_value.get_jdouble()));
140 } else {
141 return as_jint_hi();
142 }
143 }
144 jlong as_jlong_bits() const {
145 if (type() == T_DOUBLE) {
146 return jlong_cast(_value.get_jdouble());
147 } else {
148 return as_jlong();
149 }
150 }
151
152 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
153
154
155 bool is_zero_float() {
156 jfloat f = as_jfloat();
157 jfloat ok = 0.0f;
158 return jint_cast(f) == jint_cast(ok);
159 }
160
161 bool is_one_float() {
162 jfloat f = as_jfloat();
163 return !g_isnan(f) && g_isfinite(f) && f == 1.0;
164 }
165
166 bool is_zero_double() {
167 jdouble d = as_jdouble();
168 jdouble ok = 0.0;
169 return jlong_cast(d) == jlong_cast(ok);
170 }
171
172 bool is_one_double() {
173 jdouble d = as_jdouble();
174 return !g_isnan(d) && g_isfinite(d) && d == 1.0;
175 }
176 };
177
178
179 //---------------------LIR Operand descriptor------------------------------------
180 //
181 // The class LIR_OprDesc represents a LIR instruction operand;
182 // it can be a register (ALU/FPU), stack location or a constant;
183 // Constants and addresses are represented as resource area allocated
184 // structures (see above).
185 // Registers and stack locations are inlined into the this pointer
186 // (see value function).
187
188 class LIR_OprDesc: public CompilationResourceObj {
189 public:
190 // value structure:
191 // data opr-type opr-kind
192 // +--------------+-------+-------+
193 // [max...........|7 6 5 4|3 2 1 0]
194 // ^
195 // is_pointer bit
196 //
197 // lowest bit cleared, means it is a structure pointer
198 // we need 4 bits to represent types
199
200 private:
201 friend class LIR_OprFact;
202
203 // Conversion
204 intptr_t value() const { return (intptr_t) this; }
205
206 bool check_value_mask(intptr_t mask, intptr_t masked_value) const {
207 return (value() & mask) == masked_value;
208 }
209
210 enum OprKind {
211 pointer_value = 0
212 , stack_value = 1
213 , cpu_register = 3
214 , fpu_register = 5
215 , illegal_value = 7
216 };
217
218 enum OprBits {
219 pointer_bits = 1
220 , kind_bits = 3
221 , type_bits = 4
222 , size_bits = 2
223 , destroys_bits = 1
224 , virtual_bits = 1
225 , is_xmm_bits = 1
226 , last_use_bits = 1
227 , is_fpu_stack_offset_bits = 1 // used in assertion checking on x86 for FPU stack slot allocation
228 , non_data_bits = kind_bits + type_bits + size_bits + destroys_bits + last_use_bits +
229 is_fpu_stack_offset_bits + virtual_bits + is_xmm_bits
230 , data_bits = BitsPerInt - non_data_bits
231 , reg_bits = data_bits / 2 // for two registers in one value encoding
232 };
233
234 enum OprShift {
235 kind_shift = 0
236 , type_shift = kind_shift + kind_bits
237 , size_shift = type_shift + type_bits
238 , destroys_shift = size_shift + size_bits
239 , last_use_shift = destroys_shift + destroys_bits
240 , is_fpu_stack_offset_shift = last_use_shift + last_use_bits
241 , virtual_shift = is_fpu_stack_offset_shift + is_fpu_stack_offset_bits
242 , is_xmm_shift = virtual_shift + virtual_bits
243 , data_shift = is_xmm_shift + is_xmm_bits
244 , reg1_shift = data_shift
245 , reg2_shift = data_shift + reg_bits
246
247 };
248
249 enum OprSize {
250 single_size = 0 << size_shift
251 , double_size = 1 << size_shift
252 };
253
254 enum OprMask {
255 kind_mask = right_n_bits(kind_bits)
256 , type_mask = right_n_bits(type_bits) << type_shift
257 , size_mask = right_n_bits(size_bits) << size_shift
258 , last_use_mask = right_n_bits(last_use_bits) << last_use_shift
259 , is_fpu_stack_offset_mask = right_n_bits(is_fpu_stack_offset_bits) << is_fpu_stack_offset_shift
260 , virtual_mask = right_n_bits(virtual_bits) << virtual_shift
261 , is_xmm_mask = right_n_bits(is_xmm_bits) << is_xmm_shift
262 , pointer_mask = right_n_bits(pointer_bits)
263 , lower_reg_mask = right_n_bits(reg_bits)
264 , no_type_mask = (int)(~(type_mask | last_use_mask | is_fpu_stack_offset_mask))
265 };
266
267 uintptr_t data() const { return value() >> data_shift; }
268 int lo_reg_half() const { return data() & lower_reg_mask; }
269 int hi_reg_half() const { return (data() >> reg_bits) & lower_reg_mask; }
270 OprKind kind_field() const { return (OprKind)(value() & kind_mask); }
271 OprSize size_field() const { return (OprSize)(value() & size_mask); }
272
273 static char type_char(BasicType t);
274
275 public:
276 enum {
277 vreg_base = ConcreteRegisterImpl::number_of_registers,
278 vreg_max = (1 << data_bits) - 1
279 };
280
281 static inline LIR_Opr illegalOpr();
282
283 enum OprType {
284 unknown_type = 0 << type_shift // means: not set (catch uninitialized types)
285 , int_type = 1 << type_shift
286 , long_type = 2 << type_shift
287 , object_type = 3 << type_shift
288 , address_type = 4 << type_shift
289 , float_type = 5 << type_shift
290 , double_type = 6 << type_shift
291 };
292 friend OprType as_OprType(BasicType t);
293 friend BasicType as_BasicType(OprType t);
294
295 OprType type_field_valid() const { assert(is_register() || is_stack(), "should not be called otherwise"); return (OprType)(value() & type_mask); }
296 OprType type_field() const { return is_illegal() ? unknown_type : (OprType)(value() & type_mask); }
297
298 static OprSize size_for(BasicType t) {
299 switch (t) {
300 case T_LONG:
301 case T_DOUBLE:
302 return double_size;
303 break;
304
305 case T_FLOAT:
306 case T_BOOLEAN:
307 case T_CHAR:
308 case T_BYTE:
309 case T_SHORT:
310 case T_INT:
311 case T_ADDRESS:
312 case T_OBJECT:
313 case T_ARRAY:
314 return single_size;
315 break;
316
317 default:
318 ShouldNotReachHere();
319 return single_size;
320 }
321 }
322
323
324 void validate_type() const PRODUCT_RETURN;
325
326 BasicType type() const {
327 if (is_pointer()) {
328 return pointer()->type();
329 }
330 return as_BasicType(type_field());
331 }
332
333
334 ValueType* value_type() const { return as_ValueType(type()); }
335
336 char type_char() const { return type_char((is_pointer()) ? pointer()->type() : type()); }
337
338 bool is_equal(LIR_Opr opr) const { return this == opr; }
339 // checks whether types are same
340 bool is_same_type(LIR_Opr opr) const {
341 assert(type_field() != unknown_type &&
342 opr->type_field() != unknown_type, "shouldn't see unknown_type");
343 return type_field() == opr->type_field();
344 }
345 bool is_same_register(LIR_Opr opr) {
346 return (is_register() && opr->is_register() &&
347 kind_field() == opr->kind_field() &&
348 (value() & no_type_mask) == (opr->value() & no_type_mask));
349 }
350
351 bool is_pointer() const { return check_value_mask(pointer_mask, pointer_value); }
352 bool is_illegal() const { return kind_field() == illegal_value; }
353 bool is_valid() const { return kind_field() != illegal_value; }
354
355 bool is_register() const { return is_cpu_register() || is_fpu_register(); }
356 bool is_virtual() const { return is_virtual_cpu() || is_virtual_fpu(); }
357
358 bool is_constant() const { return is_pointer() && pointer()->as_constant() != NULL; }
359 bool is_address() const { return is_pointer() && pointer()->as_address() != NULL; }
360
361 bool is_float_kind() const { return is_pointer() ? pointer()->is_float_kind() : (kind_field() == fpu_register); }
362 bool is_oop() const;
363
364 // semantic for fpu- and xmm-registers:
365 // * is_float and is_double return true for xmm_registers
366 // (so is_single_fpu and is_single_xmm are true)
367 // * So you must always check for is_???_xmm prior to is_???_fpu to
368 // distinguish between fpu- and xmm-registers
369
370 bool is_stack() const { validate_type(); return check_value_mask(kind_mask, stack_value); }
371 bool is_single_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | single_size); }
372 bool is_double_stack() const { validate_type(); return check_value_mask(kind_mask | size_mask, stack_value | double_size); }
373
374 bool is_cpu_register() const { validate_type(); return check_value_mask(kind_mask, cpu_register); }
375 bool is_virtual_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register | virtual_mask); }
376 bool is_fixed_cpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, cpu_register); }
377 bool is_single_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | single_size); }
378 bool is_double_cpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, cpu_register | double_size); }
379
380 bool is_fpu_register() const { validate_type(); return check_value_mask(kind_mask, fpu_register); }
381 bool is_virtual_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register | virtual_mask); }
382 bool is_fixed_fpu() const { validate_type(); return check_value_mask(kind_mask | virtual_mask, fpu_register); }
383 bool is_single_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | single_size); }
384 bool is_double_fpu() const { validate_type(); return check_value_mask(kind_mask | size_mask, fpu_register | double_size); }
385
386 bool is_xmm_register() const { validate_type(); return check_value_mask(kind_mask | is_xmm_mask, fpu_register | is_xmm_mask); }
387 bool is_single_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | single_size | is_xmm_mask); }
388 bool is_double_xmm() const { validate_type(); return check_value_mask(kind_mask | size_mask | is_xmm_mask, fpu_register | double_size | is_xmm_mask); }
389
390 // fast accessor functions for special bits that do not work for pointers
391 // (in this functions, the check for is_pointer() is omitted)
392 bool is_single_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, single_size); }
393 bool is_double_word() const { assert(is_register() || is_stack(), "type check"); return check_value_mask(size_mask, double_size); }
394 bool is_virtual_register() const { assert(is_register(), "type check"); return check_value_mask(virtual_mask, virtual_mask); }
395 bool is_oop_register() const { assert(is_register() || is_stack(), "type check"); return type_field_valid() == object_type; }
396 BasicType type_register() const { assert(is_register() || is_stack(), "type check"); return as_BasicType(type_field_valid()); }
397
398 bool is_last_use() const { assert(is_register(), "only works for registers"); return (value() & last_use_mask) != 0; }
399 bool is_fpu_stack_offset() const { assert(is_register(), "only works for registers"); return (value() & is_fpu_stack_offset_mask) != 0; }
400 LIR_Opr make_last_use() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | last_use_mask); }
401 LIR_Opr make_fpu_stack_offset() { assert(is_register(), "only works for registers"); return (LIR_Opr)(value() | is_fpu_stack_offset_mask); }
402
403
404 int single_stack_ix() const { assert(is_single_stack() && !is_virtual(), "type check"); return (int)data(); }
405 int double_stack_ix() const { assert(is_double_stack() && !is_virtual(), "type check"); return (int)data(); }
406 RegNr cpu_regnr() const { assert(is_single_cpu() && !is_virtual(), "type check"); return (RegNr)data(); }
407 RegNr cpu_regnrLo() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
408 RegNr cpu_regnrHi() const { assert(is_double_cpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
409 RegNr fpu_regnr() const { assert(is_single_fpu() && !is_virtual(), "type check"); return (RegNr)data(); }
410 RegNr fpu_regnrLo() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
411 RegNr fpu_regnrHi() const { assert(is_double_fpu() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
412 RegNr xmm_regnr() const { assert(is_single_xmm() && !is_virtual(), "type check"); return (RegNr)data(); }
413 RegNr xmm_regnrLo() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)lo_reg_half(); }
414 RegNr xmm_regnrHi() const { assert(is_double_xmm() && !is_virtual(), "type check"); return (RegNr)hi_reg_half(); }
415 int vreg_number() const { assert(is_virtual(), "type check"); return (RegNr)data(); }
416
417 LIR_OprPtr* pointer() const { assert(is_pointer(), "type check"); return (LIR_OprPtr*)this; }
418 LIR_Const* as_constant_ptr() const { return pointer()->as_constant(); }
419 LIR_Address* as_address_ptr() const { return pointer()->as_address(); }
420
421 Register as_register() const;
422 Register as_register_lo() const;
423 Register as_register_hi() const;
424
425 Register as_pointer_register() {
426 #ifdef _LP64
427 if (is_double_cpu()) {
428 assert(as_register_lo() == as_register_hi(), "should be a single register");
429 return as_register_lo();
430 }
431 #endif
432 return as_register();
433 }
434
435 #ifdef X86
436 XMMRegister as_xmm_float_reg() const;
437 XMMRegister as_xmm_double_reg() const;
438 // for compatibility with RInfo
439 int fpu () const { return lo_reg_half(); }
440 #endif // X86
441 #if defined(SPARC) || defined(ARM) || defined(PPC)
442 FloatRegister as_float_reg () const;
443 FloatRegister as_double_reg () const;
444 #endif
445
446 jint as_jint() const { return as_constant_ptr()->as_jint(); }
447 jlong as_jlong() const { return as_constant_ptr()->as_jlong(); }
448 jfloat as_jfloat() const { return as_constant_ptr()->as_jfloat(); }
449 jdouble as_jdouble() const { return as_constant_ptr()->as_jdouble(); }
450 jobject as_jobject() const { return as_constant_ptr()->as_jobject(); }
451
452 void print() const PRODUCT_RETURN;
453 void print(outputStream* out) const PRODUCT_RETURN;
454 };
455
456
457 inline LIR_OprDesc::OprType as_OprType(BasicType type) {
458 switch (type) {
459 case T_INT: return LIR_OprDesc::int_type;
460 case T_LONG: return LIR_OprDesc::long_type;
461 case T_FLOAT: return LIR_OprDesc::float_type;
462 case T_DOUBLE: return LIR_OprDesc::double_type;
463 case T_OBJECT:
464 case T_ARRAY: return LIR_OprDesc::object_type;
465 case T_ADDRESS: return LIR_OprDesc::address_type;
466 case T_ILLEGAL: // fall through
467 default: ShouldNotReachHere(); return LIR_OprDesc::unknown_type;
468 }
469 }
470
471 inline BasicType as_BasicType(LIR_OprDesc::OprType t) {
472 switch (t) {
473 case LIR_OprDesc::int_type: return T_INT;
474 case LIR_OprDesc::long_type: return T_LONG;
475 case LIR_OprDesc::float_type: return T_FLOAT;
476 case LIR_OprDesc::double_type: return T_DOUBLE;
477 case LIR_OprDesc::object_type: return T_OBJECT;
478 case LIR_OprDesc::address_type: return T_ADDRESS;
479 case LIR_OprDesc::unknown_type: // fall through
480 default: ShouldNotReachHere(); return T_ILLEGAL;
481 }
482 }
483
484
485 // LIR_Address
486 class LIR_Address: public LIR_OprPtr {
487 friend class LIR_OpVisitState;
488
489 public:
490 // NOTE: currently these must be the log2 of the scale factor (and
491 // must also be equivalent to the ScaleFactor enum in
492 // assembler_i486.hpp)
493 enum Scale {
494 times_1 = 0,
495 times_2 = 1,
496 times_4 = 2,
497 times_8 = 3
498 };
499
500 private:
501 LIR_Opr _base;
502 LIR_Opr _index;
503 Scale _scale;
504 intx _disp;
505 BasicType _type;
506
507 public:
508 LIR_Address(LIR_Opr base, LIR_Opr index, BasicType type):
509 _base(base)
510 , _index(index)
511 , _scale(times_1)
512 , _type(type)
513 , _disp(0) { verify(); }
514
515 LIR_Address(LIR_Opr base, intx disp, BasicType type):
516 _base(base)
517 , _index(LIR_OprDesc::illegalOpr())
518 , _scale(times_1)
519 , _type(type)
520 , _disp(disp) { verify(); }
521
522 LIR_Address(LIR_Opr base, BasicType type):
523 _base(base)
524 , _index(LIR_OprDesc::illegalOpr())
525 , _scale(times_1)
526 , _type(type)
527 , _disp(0) { verify(); }
528
529 #if defined(X86) || defined(ARM)
530 LIR_Address(LIR_Opr base, LIR_Opr index, Scale scale, intx disp, BasicType type):
531 _base(base)
532 , _index(index)
533 , _scale(scale)
534 , _type(type)
535 , _disp(disp) { verify(); }
536 #endif // X86 || ARM
537
538 LIR_Opr base() const { return _base; }
539 LIR_Opr index() const { return _index; }
540 Scale scale() const { return _scale; }
541 intx disp() const { return _disp; }
542
543 bool equals(LIR_Address* other) const { return base() == other->base() && index() == other->index() && disp() == other->disp() && scale() == other->scale(); }
544
545 virtual LIR_Address* as_address() { return this; }
546 virtual BasicType type() const { return _type; }
547 virtual void print_value_on(outputStream* out) const PRODUCT_RETURN;
548
549 void verify() const PRODUCT_RETURN;
550
551 static Scale scale(BasicType type);
552 };
553
554
555 // operand factory
556 class LIR_OprFact: public AllStatic {
557 public:
558
559 static LIR_Opr illegalOpr;
560
561 static LIR_Opr single_cpu(int reg) {
562 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
563 LIR_OprDesc::int_type |
564 LIR_OprDesc::cpu_register |
565 LIR_OprDesc::single_size);
566 }
567 static LIR_Opr single_cpu_oop(int reg) {
568 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
569 LIR_OprDesc::object_type |
570 LIR_OprDesc::cpu_register |
571 LIR_OprDesc::single_size);
572 }
573 static LIR_Opr single_cpu_address(int reg) {
574 return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
575 LIR_OprDesc::address_type |
576 LIR_OprDesc::cpu_register |
577 LIR_OprDesc::single_size);
578 }
579 static LIR_Opr double_cpu(int reg1, int reg2) {
580 LP64_ONLY(assert(reg1 == reg2, "must be identical"));
581 return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
582 (reg2 << LIR_OprDesc::reg2_shift) |
583 LIR_OprDesc::long_type |
584 LIR_OprDesc::cpu_register |
585 LIR_OprDesc::double_size);
586 }
587
588 static LIR_Opr single_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
589 LIR_OprDesc::float_type |
590 LIR_OprDesc::fpu_register |
591 LIR_OprDesc::single_size); }
592 #if defined(ARM)
593 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::fpu_register | LIR_OprDesc::double_size); }
594 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) | LIR_OprDesc::float_type | LIR_OprDesc::cpu_register | LIR_OprDesc::single_size); }
595 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg1 << LIR_OprDesc::reg1_shift) | (reg2 << LIR_OprDesc::reg2_shift) | LIR_OprDesc::double_type | LIR_OprDesc::cpu_register | LIR_OprDesc::double_size); }
596 #endif
597 #ifdef SPARC
598 static LIR_Opr double_fpu(int reg1, int reg2) { return (LIR_Opr)(intptr_t)((reg1 << LIR_OprDesc::reg1_shift) |
599 (reg2 << LIR_OprDesc::reg2_shift) |
600 LIR_OprDesc::double_type |
601 LIR_OprDesc::fpu_register |
602 LIR_OprDesc::double_size); }
603 #endif
604 #ifdef X86
605 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
606 (reg << LIR_OprDesc::reg2_shift) |
607 LIR_OprDesc::double_type |
608 LIR_OprDesc::fpu_register |
609 LIR_OprDesc::double_size); }
610
611 static LIR_Opr single_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
612 LIR_OprDesc::float_type |
613 LIR_OprDesc::fpu_register |
614 LIR_OprDesc::single_size |
615 LIR_OprDesc::is_xmm_mask); }
616 static LIR_Opr double_xmm(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
617 (reg << LIR_OprDesc::reg2_shift) |
618 LIR_OprDesc::double_type |
619 LIR_OprDesc::fpu_register |
620 LIR_OprDesc::double_size |
621 LIR_OprDesc::is_xmm_mask); }
622 #endif // X86
623 #ifdef PPC
624 static LIR_Opr double_fpu(int reg) { return (LIR_Opr)(intptr_t)((reg << LIR_OprDesc::reg1_shift) |
625 (reg << LIR_OprDesc::reg2_shift) |
626 LIR_OprDesc::double_type |
627 LIR_OprDesc::fpu_register |
628 LIR_OprDesc::double_size); }
629 static LIR_Opr single_softfp(int reg) { return (LIR_Opr)((reg << LIR_OprDesc::reg1_shift) |
630 LIR_OprDesc::float_type |
631 LIR_OprDesc::cpu_register |
632 LIR_OprDesc::single_size); }
633 static LIR_Opr double_softfp(int reg1, int reg2) { return (LIR_Opr)((reg2 << LIR_OprDesc::reg1_shift) |
634 (reg1 << LIR_OprDesc::reg2_shift) |
635 LIR_OprDesc::double_type |
636 LIR_OprDesc::cpu_register |
637 LIR_OprDesc::double_size); }
638 #endif // PPC
639
640 static LIR_Opr virtual_register(int index, BasicType type) {
641 LIR_Opr res;
642 switch (type) {
643 case T_OBJECT: // fall through
644 case T_ARRAY:
645 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
646 LIR_OprDesc::object_type |
647 LIR_OprDesc::cpu_register |
648 LIR_OprDesc::single_size |
649 LIR_OprDesc::virtual_mask);
650 break;
651
652 case T_INT:
653 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
654 LIR_OprDesc::int_type |
655 LIR_OprDesc::cpu_register |
656 LIR_OprDesc::single_size |
657 LIR_OprDesc::virtual_mask);
658 break;
659
660 case T_ADDRESS:
661 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
662 LIR_OprDesc::address_type |
663 LIR_OprDesc::cpu_register |
664 LIR_OprDesc::single_size |
665 LIR_OprDesc::virtual_mask);
666 break;
667
668 case T_LONG:
669 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
670 LIR_OprDesc::long_type |
671 LIR_OprDesc::cpu_register |
672 LIR_OprDesc::double_size |
673 LIR_OprDesc::virtual_mask);
674 break;
675
676 #ifdef __SOFTFP__
677 case T_FLOAT:
678 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
679 LIR_OprDesc::float_type |
680 LIR_OprDesc::cpu_register |
681 LIR_OprDesc::single_size |
682 LIR_OprDesc::virtual_mask);
683 break;
684 case T_DOUBLE:
685 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
686 LIR_OprDesc::double_type |
687 LIR_OprDesc::cpu_register |
688 LIR_OprDesc::double_size |
689 LIR_OprDesc::virtual_mask);
690 break;
691 #else // __SOFTFP__
692 case T_FLOAT:
693 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
694 LIR_OprDesc::float_type |
695 LIR_OprDesc::fpu_register |
696 LIR_OprDesc::single_size |
697 LIR_OprDesc::virtual_mask);
698 break;
699
700 case
701 T_DOUBLE: res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
702 LIR_OprDesc::double_type |
703 LIR_OprDesc::fpu_register |
704 LIR_OprDesc::double_size |
705 LIR_OprDesc::virtual_mask);
706 break;
707 #endif // __SOFTFP__
708 default: ShouldNotReachHere(); res = illegalOpr;
709 }
710
711 #ifdef ASSERT
712 res->validate_type();
713 assert(res->vreg_number() == index, "conversion check");
714 assert(index >= LIR_OprDesc::vreg_base, "must start at vreg_base");
715 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
716
717 // old-style calculation; check if old and new method are equal
718 LIR_OprDesc::OprType t = as_OprType(type);
719 #ifdef __SOFTFP__
720 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
721 t |
722 LIR_OprDesc::cpu_register |
723 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
724 #else // __SOFTFP__
725 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) | t |
726 ((type == T_FLOAT || type == T_DOUBLE) ? LIR_OprDesc::fpu_register : LIR_OprDesc::cpu_register) |
727 LIR_OprDesc::size_for(type) | LIR_OprDesc::virtual_mask);
728 assert(res == old_res, "old and new method not equal");
729 #endif // __SOFTFP__
730 #endif // ASSERT
731
732 return res;
733 }
734
735 // 'index' is computed by FrameMap::local_stack_pos(index); do not use other parameters as
736 // the index is platform independent; a double stack useing indeces 2 and 3 has always
737 // index 2.
738 static LIR_Opr stack(int index, BasicType type) {
739 LIR_Opr res;
740 switch (type) {
741 case T_OBJECT: // fall through
742 case T_ARRAY:
743 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
744 LIR_OprDesc::object_type |
745 LIR_OprDesc::stack_value |
746 LIR_OprDesc::single_size);
747 break;
748
749 case T_INT:
750 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
751 LIR_OprDesc::int_type |
752 LIR_OprDesc::stack_value |
753 LIR_OprDesc::single_size);
754 break;
755
756 case T_ADDRESS:
757 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
758 LIR_OprDesc::address_type |
759 LIR_OprDesc::stack_value |
760 LIR_OprDesc::single_size);
761 break;
762
763 case T_LONG:
764 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
765 LIR_OprDesc::long_type |
766 LIR_OprDesc::stack_value |
767 LIR_OprDesc::double_size);
768 break;
769
770 case T_FLOAT:
771 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
772 LIR_OprDesc::float_type |
773 LIR_OprDesc::stack_value |
774 LIR_OprDesc::single_size);
775 break;
776 case T_DOUBLE:
777 res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
778 LIR_OprDesc::double_type |
779 LIR_OprDesc::stack_value |
780 LIR_OprDesc::double_size);
781 break;
782
783 default: ShouldNotReachHere(); res = illegalOpr;
784 }
785
786 #ifdef ASSERT
787 assert(index >= 0, "index must be positive");
788 assert(index <= (max_jint >> LIR_OprDesc::data_shift), "index is too big");
789
790 LIR_Opr old_res = (LIR_Opr)(intptr_t)((index << LIR_OprDesc::data_shift) |
791 LIR_OprDesc::stack_value |
792 as_OprType(type) |
793 LIR_OprDesc::size_for(type));
794 assert(res == old_res, "old and new method not equal");
795 #endif
796
797 return res;
798 }
799
800 static LIR_Opr intConst(jint i) { return (LIR_Opr)(new LIR_Const(i)); }
801 static LIR_Opr longConst(jlong l) { return (LIR_Opr)(new LIR_Const(l)); }
802 static LIR_Opr floatConst(jfloat f) { return (LIR_Opr)(new LIR_Const(f)); }
803 static LIR_Opr doubleConst(jdouble d) { return (LIR_Opr)(new LIR_Const(d)); }
804 static LIR_Opr oopConst(jobject o) { return (LIR_Opr)(new LIR_Const(o)); }
805 static LIR_Opr address(LIR_Address* a) { return (LIR_Opr)a; }
806 static LIR_Opr intptrConst(void* p) { return (LIR_Opr)(new LIR_Const(p)); }
807 static LIR_Opr intptrConst(intptr_t v) { return (LIR_Opr)(new LIR_Const((void*)v)); }
808 static LIR_Opr illegal() { return (LIR_Opr)-1; }
809 static LIR_Opr addressConst(jint i) { return (LIR_Opr)(new LIR_Const(i, true)); }
810
811 static LIR_Opr value_type(ValueType* type);
812 static LIR_Opr dummy_value_type(ValueType* type);
813 };
814
815
816 //-------------------------------------------------------------------------------
817 // LIR Instructions
818 //-------------------------------------------------------------------------------
819 //
820 // Note:
821 // - every instruction has a result operand
822 // - every instruction has an CodeEmitInfo operand (can be revisited later)
823 // - every instruction has a LIR_OpCode operand
824 // - LIR_OpN, means an instruction that has N input operands
825 //
826 // class hierarchy:
827 //
828 class LIR_Op;
829 class LIR_Op0;
830 class LIR_OpLabel;
831 class LIR_Op1;
832 class LIR_OpBranch;
833 class LIR_OpConvert;
834 class LIR_OpAllocObj;
835 class LIR_OpRoundFP;
836 class LIR_Op2;
837 class LIR_OpDelay;
838 class LIR_Op3;
839 class LIR_OpAllocArray;
840 class LIR_OpCall;
841 class LIR_OpJavaCall;
842 class LIR_OpRTCall;
843 class LIR_OpArrayCopy;
844 class LIR_OpLock;
845 class LIR_OpTypeCheck;
846 class LIR_OpCompareAndSwap;
847 class LIR_OpProfileCall;
848
849
850 // LIR operation codes
851 enum LIR_Code {
852 lir_none
853 , begin_op0
854 , lir_word_align
855 , lir_label
856 , lir_nop
857 , lir_backwardbranch_target
858 , lir_std_entry
859 , lir_osr_entry
860 , lir_build_frame
861 , lir_fpop_raw
862 , lir_24bit_FPU
863 , lir_reset_FPU
864 , lir_breakpoint
865 , lir_rtcall
866 , lir_membar
867 , lir_membar_acquire
868 , lir_membar_release
869 , lir_membar_loadload
870 , lir_membar_storestore
871 , lir_membar_loadstore
872 , lir_membar_storeload
873 , lir_get_thread
874 , end_op0
875 , begin_op1
876 , lir_fxch
877 , lir_fld
878 , lir_ffree
879 , lir_push
880 , lir_pop
881 , lir_null_check
882 , lir_return
883 , lir_leal
884 , lir_neg
885 , lir_branch
886 , lir_cond_float_branch
887 , lir_move
888 , lir_prefetchr
889 , lir_prefetchw
890 , lir_convert
891 , lir_alloc_object
892 , lir_monaddr
893 , lir_roundfp
894 , lir_safepoint
895 , lir_pack64
896 , lir_unpack64
897 , lir_unwind
898 , end_op1
899 , begin_op2
900 , lir_cmp
901 , lir_cmp_l2i
902 , lir_ucmp_fd2i
903 , lir_cmp_fd2i
904 , lir_cmove
905 , lir_add
906 , lir_sub
907 , lir_mul
908 , lir_mul_strictfp
909 , lir_div
910 , lir_div_strictfp
911 , lir_rem
912 , lir_sqrt
913 , lir_abs
914 , lir_sin
915 , lir_cos
916 , lir_tan
917 , lir_log
918 , lir_log10
919 , lir_logic_and
920 , lir_logic_or
921 , lir_logic_xor
922 , lir_shl
923 , lir_shr
924 , lir_ushr
925 , lir_alloc_array
926 , lir_throw
927 , lir_compare_to
928 , end_op2
929 , begin_op3
930 , lir_idiv
931 , lir_irem
932 , end_op3
933 , begin_opJavaCall
934 , lir_static_call
935 , lir_optvirtual_call
936 , lir_icvirtual_call
937 , lir_virtual_call
938 , lir_dynamic_call
939 , end_opJavaCall
940 , begin_opArrayCopy
941 , lir_arraycopy
942 , end_opArrayCopy
943 , begin_opLock
944 , lir_lock
945 , lir_unlock
946 , end_opLock
947 , begin_delay_slot
948 , lir_delay_slot
949 , end_delay_slot
950 , begin_opTypeCheck
951 , lir_instanceof
952 , lir_checkcast
953 , lir_store_check
954 , end_opTypeCheck
955 , begin_opCompareAndSwap
956 , lir_cas_long
957 , lir_cas_obj
958 , lir_cas_int
959 , end_opCompareAndSwap
960 , begin_opMDOProfile
961 , lir_profile_call
962 , end_opMDOProfile
963 };
964
965
966 enum LIR_Condition {
967 lir_cond_equal
968 , lir_cond_notEqual
969 , lir_cond_less
970 , lir_cond_lessEqual
971 , lir_cond_greaterEqual
972 , lir_cond_greater
973 , lir_cond_belowEqual
974 , lir_cond_aboveEqual
975 , lir_cond_always
976 , lir_cond_unknown = -1
977 };
978
979
980 enum LIR_PatchCode {
981 lir_patch_none,
982 lir_patch_low,
983 lir_patch_high,
984 lir_patch_normal
985 };
986
987
988 enum LIR_MoveKind {
989 lir_move_normal,
990 lir_move_volatile,
991 lir_move_unaligned,
992 lir_move_wide,
993 lir_move_max_flag
994 };
995
996
997 // --------------------------------------------------
998 // LIR_Op
999 // --------------------------------------------------
1000 class LIR_Op: public CompilationResourceObj {
1001 friend class LIR_OpVisitState;
1002
1003 #ifdef ASSERT
1004 private:
1005 const char * _file;
1006 int _line;
1007 #endif
1008
1009 protected:
1010 LIR_Opr _result;
1011 unsigned short _code;
1012 unsigned short _flags;
1013 CodeEmitInfo* _info;
1014 int _id; // value id for register allocation
1015 int _fpu_pop_count;
1016 Instruction* _source; // for debugging
1017
1018 static void print_condition(outputStream* out, LIR_Condition cond) PRODUCT_RETURN;
1019
1020 protected:
1021 static bool is_in_range(LIR_Code test, LIR_Code start, LIR_Code end) { return start < test && test < end; }
1022
1023 public:
1024 LIR_Op()
1025 : _result(LIR_OprFact::illegalOpr)
1026 , _code(lir_none)
1027 , _flags(0)
1028 , _info(NULL)
1029 #ifdef ASSERT
1030 , _file(NULL)
1031 , _line(0)
1032 #endif
1033 , _fpu_pop_count(0)
1034 , _source(NULL)
1035 , _id(-1) {}
1036
1037 LIR_Op(LIR_Code code, LIR_Opr result, CodeEmitInfo* info)
1038 : _result(result)
1039 , _code(code)
1040 , _flags(0)
1041 , _info(info)
1042 #ifdef ASSERT
1043 , _file(NULL)
1044 , _line(0)
1045 #endif
1046 , _fpu_pop_count(0)
1047 , _source(NULL)
1048 , _id(-1) {}
1049
1050 CodeEmitInfo* info() const { return _info; }
1051 LIR_Code code() const { return (LIR_Code)_code; }
1052 LIR_Opr result_opr() const { return _result; }
1053 void set_result_opr(LIR_Opr opr) { _result = opr; }
1054
1055 #ifdef ASSERT
1056 void set_file_and_line(const char * file, int line) {
1057 _file = file;
1058 _line = line;
1059 }
1060 #endif
1061
1062 virtual const char * name() const PRODUCT_RETURN0;
1063
1064 int id() const { return _id; }
1065 void set_id(int id) { _id = id; }
1066
1067 // FPU stack simulation helpers -- only used on Intel
1068 void set_fpu_pop_count(int count) { assert(count >= 0 && count <= 1, "currently only 0 and 1 are valid"); _fpu_pop_count = count; }
1069 int fpu_pop_count() const { return _fpu_pop_count; }
1070 bool pop_fpu_stack() { return _fpu_pop_count > 0; }
1071
1072 Instruction* source() const { return _source; }
1073 void set_source(Instruction* ins) { _source = ins; }
1074
1075 virtual void emit_code(LIR_Assembler* masm) = 0;
1076 virtual void print_instr(outputStream* out) const = 0;
1077 virtual void print_on(outputStream* st) const PRODUCT_RETURN;
1078
1079 virtual LIR_OpCall* as_OpCall() { return NULL; }
1080 virtual LIR_OpJavaCall* as_OpJavaCall() { return NULL; }
1081 virtual LIR_OpLabel* as_OpLabel() { return NULL; }
1082 virtual LIR_OpDelay* as_OpDelay() { return NULL; }
1083 virtual LIR_OpLock* as_OpLock() { return NULL; }
1084 virtual LIR_OpAllocArray* as_OpAllocArray() { return NULL; }
1085 virtual LIR_OpAllocObj* as_OpAllocObj() { return NULL; }
1086 virtual LIR_OpRoundFP* as_OpRoundFP() { return NULL; }
1087 virtual LIR_OpBranch* as_OpBranch() { return NULL; }
1088 virtual LIR_OpRTCall* as_OpRTCall() { return NULL; }
1089 virtual LIR_OpConvert* as_OpConvert() { return NULL; }
1090 virtual LIR_Op0* as_Op0() { return NULL; }
1091 virtual LIR_Op1* as_Op1() { return NULL; }
1092 virtual LIR_Op2* as_Op2() { return NULL; }
1093 virtual LIR_Op3* as_Op3() { return NULL; }
1094 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return NULL; }
1095 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return NULL; }
1096 virtual LIR_OpCompareAndSwap* as_OpCompareAndSwap() { return NULL; }
1097 virtual LIR_OpProfileCall* as_OpProfileCall() { return NULL; }
1098
1099 virtual void verify() const {}
1100 };
1101
1102 // for calls
1103 class LIR_OpCall: public LIR_Op {
1104 friend class LIR_OpVisitState;
1105
1106 protected:
1107 address _addr;
1108 LIR_OprList* _arguments;
1109 protected:
1110 LIR_OpCall(LIR_Code code, address addr, LIR_Opr result,
1111 LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1112 : LIR_Op(code, result, info)
1113 , _arguments(arguments)
1114 , _addr(addr) {}
1115
1116 public:
1117 address addr() const { return _addr; }
1118 const LIR_OprList* arguments() const { return _arguments; }
1119 virtual LIR_OpCall* as_OpCall() { return this; }
1120 };
1121
1122
1123 // --------------------------------------------------
1124 // LIR_OpJavaCall
1125 // --------------------------------------------------
1126 class LIR_OpJavaCall: public LIR_OpCall {
1127 friend class LIR_OpVisitState;
1128
1129 private:
1130 ciMethod* _method;
1131 LIR_Opr _receiver;
1132 LIR_Opr _method_handle_invoke_SP_save_opr; // Used in LIR_OpVisitState::visit to store the reference to FrameMap::method_handle_invoke_SP_save_opr.
1133
1134 public:
1135 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1136 LIR_Opr receiver, LIR_Opr result,
1137 address addr, LIR_OprList* arguments,
1138 CodeEmitInfo* info)
1139 : LIR_OpCall(code, addr, result, arguments, info)
1140 , _receiver(receiver)
1141 , _method(method)
1142 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1143 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1144
1145 LIR_OpJavaCall(LIR_Code code, ciMethod* method,
1146 LIR_Opr receiver, LIR_Opr result, intptr_t vtable_offset,
1147 LIR_OprList* arguments, CodeEmitInfo* info)
1148 : LIR_OpCall(code, (address)vtable_offset, result, arguments, info)
1149 , _receiver(receiver)
1150 , _method(method)
1151 , _method_handle_invoke_SP_save_opr(LIR_OprFact::illegalOpr)
1152 { assert(is_in_range(code, begin_opJavaCall, end_opJavaCall), "code check"); }
1153
1154 LIR_Opr receiver() const { return _receiver; }
1155 ciMethod* method() const { return _method; }
1156
1157 // JSR 292 support.
1158 bool is_invokedynamic() const { return code() == lir_dynamic_call; }
1159 bool is_method_handle_invoke() const {
1160 return
1161 is_invokedynamic() // An invokedynamic is always a MethodHandle call site.
1162 ||
1163 (method()->holder()->name() == ciSymbol::java_lang_invoke_MethodHandle() &&
1164 methodOopDesc::is_method_handle_invoke_name(method()->name()->sid()));
1165 }
1166
1167 intptr_t vtable_offset() const {
1168 assert(_code == lir_virtual_call, "only have vtable for real vcall");
1169 return (intptr_t) addr();
1170 }
1171
1172 virtual void emit_code(LIR_Assembler* masm);
1173 virtual LIR_OpJavaCall* as_OpJavaCall() { return this; }
1174 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1175 };
1176
1177 // --------------------------------------------------
1178 // LIR_OpLabel
1179 // --------------------------------------------------
1180 // Location where a branch can continue
1181 class LIR_OpLabel: public LIR_Op {
1182 friend class LIR_OpVisitState;
1183
1184 private:
1185 Label* _label;
1186 public:
1187 LIR_OpLabel(Label* lbl)
1188 : LIR_Op(lir_label, LIR_OprFact::illegalOpr, NULL)
1189 , _label(lbl) {}
1190 Label* label() const { return _label; }
1191
1192 virtual void emit_code(LIR_Assembler* masm);
1193 virtual LIR_OpLabel* as_OpLabel() { return this; }
1194 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1195 };
1196
1197 // LIR_OpArrayCopy
1198 class LIR_OpArrayCopy: public LIR_Op {
1199 friend class LIR_OpVisitState;
1200
1201 private:
1202 ArrayCopyStub* _stub;
1203 LIR_Opr _src;
1204 LIR_Opr _src_pos;
1205 LIR_Opr _dst;
1206 LIR_Opr _dst_pos;
1207 LIR_Opr _length;
1208 LIR_Opr _tmp;
1209 ciArrayKlass* _expected_type;
1210 int _flags;
1211
1212 public:
1213 enum Flags {
1214 src_null_check = 1 << 0,
1215 dst_null_check = 1 << 1,
1216 src_pos_positive_check = 1 << 2,
1217 dst_pos_positive_check = 1 << 3,
1218 length_positive_check = 1 << 4,
1219 src_range_check = 1 << 5,
1220 dst_range_check = 1 << 6,
1221 type_check = 1 << 7,
1222 overlapping = 1 << 8,
1223 unaligned = 1 << 9,
1224 src_objarray = 1 << 10,
1225 dst_objarray = 1 << 11,
1226 all_flags = (1 << 12) - 1
1227 };
1228
1229 LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp,
1230 ciArrayKlass* expected_type, int flags, CodeEmitInfo* info);
1231
1232 LIR_Opr src() const { return _src; }
1233 LIR_Opr src_pos() const { return _src_pos; }
1234 LIR_Opr dst() const { return _dst; }
1235 LIR_Opr dst_pos() const { return _dst_pos; }
1236 LIR_Opr length() const { return _length; }
1237 LIR_Opr tmp() const { return _tmp; }
1238 int flags() const { return _flags; }
1239 ciArrayKlass* expected_type() const { return _expected_type; }
1240 ArrayCopyStub* stub() const { return _stub; }
1241
1242 virtual void emit_code(LIR_Assembler* masm);
1243 virtual LIR_OpArrayCopy* as_OpArrayCopy() { return this; }
1244 void print_instr(outputStream* out) const PRODUCT_RETURN;
1245 };
1246
1247
1248 // --------------------------------------------------
1249 // LIR_Op0
1250 // --------------------------------------------------
1251 class LIR_Op0: public LIR_Op {
1252 friend class LIR_OpVisitState;
1253
1254 public:
1255 LIR_Op0(LIR_Code code)
1256 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1257 LIR_Op0(LIR_Code code, LIR_Opr result, CodeEmitInfo* info = NULL)
1258 : LIR_Op(code, result, info) { assert(is_in_range(code, begin_op0, end_op0), "code check"); }
1259
1260 virtual void emit_code(LIR_Assembler* masm);
1261 virtual LIR_Op0* as_Op0() { return this; }
1262 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1263 };
1264
1265
1266 // --------------------------------------------------
1267 // LIR_Op1
1268 // --------------------------------------------------
1269
1270 class LIR_Op1: public LIR_Op {
1271 friend class LIR_OpVisitState;
1272
1273 protected:
1274 LIR_Opr _opr; // input operand
1275 BasicType _type; // Operand types
1276 LIR_PatchCode _patch; // only required with patchin (NEEDS_CLEANUP: do we want a special instruction for patching?)
1277
1278 static void print_patch_code(outputStream* out, LIR_PatchCode code);
1279
1280 void set_kind(LIR_MoveKind kind) {
1281 assert(code() == lir_move, "must be");
1282 _flags = kind;
1283 }
1284
1285 public:
1286 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result = LIR_OprFact::illegalOpr, BasicType type = T_ILLEGAL, LIR_PatchCode patch = lir_patch_none, CodeEmitInfo* info = NULL)
1287 : LIR_Op(code, result, info)
1288 , _opr(opr)
1289 , _patch(patch)
1290 , _type(type) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1291
1292 LIR_Op1(LIR_Code code, LIR_Opr opr, LIR_Opr result, BasicType type, LIR_PatchCode patch, CodeEmitInfo* info, LIR_MoveKind kind)
1293 : LIR_Op(code, result, info)
1294 , _opr(opr)
1295 , _patch(patch)
1296 , _type(type) {
1297 assert(code == lir_move, "must be");
1298 set_kind(kind);
1299 }
1300
1301 LIR_Op1(LIR_Code code, LIR_Opr opr, CodeEmitInfo* info)
1302 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1303 , _opr(opr)
1304 , _patch(lir_patch_none)
1305 , _type(T_ILLEGAL) { assert(is_in_range(code, begin_op1, end_op1), "code check"); }
1306
1307 LIR_Opr in_opr() const { return _opr; }
1308 LIR_PatchCode patch_code() const { return _patch; }
1309 BasicType type() const { return _type; }
1310
1311 LIR_MoveKind move_kind() const {
1312 assert(code() == lir_move, "must be");
1313 return (LIR_MoveKind)_flags;
1314 }
1315
1316 virtual void emit_code(LIR_Assembler* masm);
1317 virtual LIR_Op1* as_Op1() { return this; }
1318 virtual const char * name() const PRODUCT_RETURN0;
1319
1320 void set_in_opr(LIR_Opr opr) { _opr = opr; }
1321
1322 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1323 virtual void verify() const;
1324 };
1325
1326
1327 // for runtime calls
1328 class LIR_OpRTCall: public LIR_OpCall {
1329 friend class LIR_OpVisitState;
1330
1331 private:
1332 LIR_Opr _tmp;
1333 public:
1334 LIR_OpRTCall(address addr, LIR_Opr tmp,
1335 LIR_Opr result, LIR_OprList* arguments, CodeEmitInfo* info = NULL)
1336 : LIR_OpCall(lir_rtcall, addr, result, arguments, info)
1337 , _tmp(tmp) {}
1338
1339 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1340 virtual void emit_code(LIR_Assembler* masm);
1341 virtual LIR_OpRTCall* as_OpRTCall() { return this; }
1342
1343 LIR_Opr tmp() const { return _tmp; }
1344
1345 virtual void verify() const;
1346 };
1347
1348
1349 class LIR_OpBranch: public LIR_Op {
1350 friend class LIR_OpVisitState;
1351
1352 private:
1353 LIR_Condition _cond;
1354 BasicType _type;
1355 Label* _label;
1356 BlockBegin* _block; // if this is a branch to a block, this is the block
1357 BlockBegin* _ublock; // if this is a float-branch, this is the unorderd block
1358 CodeStub* _stub; // if this is a branch to a stub, this is the stub
1359
1360 public:
1361 LIR_OpBranch(LIR_Condition cond, BasicType type, Label* lbl)
1362 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*) NULL)
1363 , _cond(cond)
1364 , _type(type)
1365 , _label(lbl)
1366 , _block(NULL)
1367 , _ublock(NULL)
1368 , _stub(NULL) { }
1369
1370 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block);
1371 LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub);
1372
1373 // for unordered comparisons
1374 LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock);
1375
1376 LIR_Condition cond() const { return _cond; }
1377 BasicType type() const { return _type; }
1378 Label* label() const { return _label; }
1379 BlockBegin* block() const { return _block; }
1380 BlockBegin* ublock() const { return _ublock; }
1381 CodeStub* stub() const { return _stub; }
1382
1383 void change_block(BlockBegin* b);
1384 void change_ublock(BlockBegin* b);
1385 void negate_cond();
1386
1387 virtual void emit_code(LIR_Assembler* masm);
1388 virtual LIR_OpBranch* as_OpBranch() { return this; }
1389 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1390 };
1391
1392
1393 class ConversionStub;
1394
1395 class LIR_OpConvert: public LIR_Op1 {
1396 friend class LIR_OpVisitState;
1397
1398 private:
1399 Bytecodes::Code _bytecode;
1400 ConversionStub* _stub;
1401 #ifdef PPC
1402 LIR_Opr _tmp1;
1403 LIR_Opr _tmp2;
1404 #endif
1405
1406 public:
1407 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub)
1408 : LIR_Op1(lir_convert, opr, result)
1409 , _stub(stub)
1410 #ifdef PPC
1411 , _tmp1(LIR_OprDesc::illegalOpr())
1412 , _tmp2(LIR_OprDesc::illegalOpr())
1413 #endif
1414 , _bytecode(code) {}
1415
1416 #ifdef PPC
1417 LIR_OpConvert(Bytecodes::Code code, LIR_Opr opr, LIR_Opr result, ConversionStub* stub
1418 ,LIR_Opr tmp1, LIR_Opr tmp2)
1419 : LIR_Op1(lir_convert, opr, result)
1420 , _stub(stub)
1421 , _tmp1(tmp1)
1422 , _tmp2(tmp2)
1423 , _bytecode(code) {}
1424 #endif
1425
1426 Bytecodes::Code bytecode() const { return _bytecode; }
1427 ConversionStub* stub() const { return _stub; }
1428 #ifdef PPC
1429 LIR_Opr tmp1() const { return _tmp1; }
1430 LIR_Opr tmp2() const { return _tmp2; }
1431 #endif
1432
1433 virtual void emit_code(LIR_Assembler* masm);
1434 virtual LIR_OpConvert* as_OpConvert() { return this; }
1435 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1436
1437 static void print_bytecode(outputStream* out, Bytecodes::Code code) PRODUCT_RETURN;
1438 };
1439
1440
1441 // LIR_OpAllocObj
1442 class LIR_OpAllocObj : public LIR_Op1 {
1443 friend class LIR_OpVisitState;
1444
1445 private:
1446 LIR_Opr _tmp1;
1447 LIR_Opr _tmp2;
1448 LIR_Opr _tmp3;
1449 LIR_Opr _tmp4;
1450 int _hdr_size;
1451 int _obj_size;
1452 CodeStub* _stub;
1453 bool _init_check;
1454
1455 public:
1456 LIR_OpAllocObj(LIR_Opr klass, LIR_Opr result,
1457 LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4,
1458 int hdr_size, int obj_size, bool init_check, CodeStub* stub)
1459 : LIR_Op1(lir_alloc_object, klass, result)
1460 , _tmp1(t1)
1461 , _tmp2(t2)
1462 , _tmp3(t3)
1463 , _tmp4(t4)
1464 , _hdr_size(hdr_size)
1465 , _obj_size(obj_size)
1466 , _init_check(init_check)
1467 , _stub(stub) { }
1468
1469 LIR_Opr klass() const { return in_opr(); }
1470 LIR_Opr obj() const { return result_opr(); }
1471 LIR_Opr tmp1() const { return _tmp1; }
1472 LIR_Opr tmp2() const { return _tmp2; }
1473 LIR_Opr tmp3() const { return _tmp3; }
1474 LIR_Opr tmp4() const { return _tmp4; }
1475 int header_size() const { return _hdr_size; }
1476 int object_size() const { return _obj_size; }
1477 bool init_check() const { return _init_check; }
1478 CodeStub* stub() const { return _stub; }
1479
1480 virtual void emit_code(LIR_Assembler* masm);
1481 virtual LIR_OpAllocObj * as_OpAllocObj () { return this; }
1482 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1483 };
1484
1485
1486 // LIR_OpRoundFP
1487 class LIR_OpRoundFP : public LIR_Op1 {
1488 friend class LIR_OpVisitState;
1489
1490 private:
1491 LIR_Opr _tmp;
1492
1493 public:
1494 LIR_OpRoundFP(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result)
1495 : LIR_Op1(lir_roundfp, reg, result)
1496 , _tmp(stack_loc_temp) {}
1497
1498 LIR_Opr tmp() const { return _tmp; }
1499 virtual LIR_OpRoundFP* as_OpRoundFP() { return this; }
1500 void print_instr(outputStream* out) const PRODUCT_RETURN;
1501 };
1502
1503 // LIR_OpTypeCheck
1504 class LIR_OpTypeCheck: public LIR_Op {
1505 friend class LIR_OpVisitState;
1506
1507 private:
1508 LIR_Opr _object;
1509 LIR_Opr _array;
1510 ciKlass* _klass;
1511 LIR_Opr _tmp1;
1512 LIR_Opr _tmp2;
1513 LIR_Opr _tmp3;
1514 bool _fast_check;
1515 CodeEmitInfo* _info_for_patch;
1516 CodeEmitInfo* _info_for_exception;
1517 CodeStub* _stub;
1518 ciMethod* _profiled_method;
1519 int _profiled_bci;
1520 bool _should_profile;
1521
1522 public:
1523 LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass,
1524 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
1525 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub);
1526 LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array,
1527 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception);
1528
1529 LIR_Opr object() const { return _object; }
1530 LIR_Opr array() const { assert(code() == lir_store_check, "not valid"); return _array; }
1531 LIR_Opr tmp1() const { return _tmp1; }
1532 LIR_Opr tmp2() const { return _tmp2; }
1533 LIR_Opr tmp3() const { return _tmp3; }
1534 ciKlass* klass() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _klass; }
1535 bool fast_check() const { assert(code() == lir_instanceof || code() == lir_checkcast, "not valid"); return _fast_check; }
1536 CodeEmitInfo* info_for_patch() const { return _info_for_patch; }
1537 CodeEmitInfo* info_for_exception() const { return _info_for_exception; }
1538 CodeStub* stub() const { return _stub; }
1539
1540 // methodDataOop profiling
1541 void set_profiled_method(ciMethod *method) { _profiled_method = method; }
1542 void set_profiled_bci(int bci) { _profiled_bci = bci; }
1543 void set_should_profile(bool b) { _should_profile = b; }
1544 ciMethod* profiled_method() const { return _profiled_method; }
1545 int profiled_bci() const { return _profiled_bci; }
1546 bool should_profile() const { return _should_profile; }
1547
1548 virtual void emit_code(LIR_Assembler* masm);
1549 virtual LIR_OpTypeCheck* as_OpTypeCheck() { return this; }
1550 void print_instr(outputStream* out) const PRODUCT_RETURN;
1551 };
1552
1553 // LIR_Op2
1554 class LIR_Op2: public LIR_Op {
1555 friend class LIR_OpVisitState;
1556
1557 int _fpu_stack_size; // for sin/cos implementation on Intel
1558
1559 protected:
1560 LIR_Opr _opr1;
1561 LIR_Opr _opr2;
1562 BasicType _type;
1563 LIR_Opr _tmp;
1564 LIR_Condition _condition;
1565
1566 void verify() const;
1567
1568 public:
1569 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, CodeEmitInfo* info = NULL)
1570 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1571 , _opr1(opr1)
1572 , _opr2(opr2)
1573 , _type(T_ILLEGAL)
1574 , _condition(condition)
1575 , _fpu_stack_size(0)
1576 , _tmp(LIR_OprFact::illegalOpr) {
1577 assert(code == lir_cmp, "code check");
1578 }
1579
1580 LIR_Op2(LIR_Code code, LIR_Condition condition, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, BasicType type)
1581 : LIR_Op(code, result, NULL)
1582 , _opr1(opr1)
1583 , _opr2(opr2)
1584 , _type(type)
1585 , _condition(condition)
1586 , _fpu_stack_size(0)
1587 , _tmp(LIR_OprFact::illegalOpr) {
1588 assert(code == lir_cmove, "code check");
1589 assert(type != T_ILLEGAL, "cmove should have type");
1590 }
1591
1592 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result = LIR_OprFact::illegalOpr,
1593 CodeEmitInfo* info = NULL, BasicType type = T_ILLEGAL)
1594 : LIR_Op(code, result, info)
1595 , _opr1(opr1)
1596 , _opr2(opr2)
1597 , _type(type)
1598 , _condition(lir_cond_unknown)
1599 , _fpu_stack_size(0)
1600 , _tmp(LIR_OprFact::illegalOpr) {
1601 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1602 }
1603
1604 LIR_Op2(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr result, LIR_Opr tmp)
1605 : LIR_Op(code, result, NULL)
1606 , _opr1(opr1)
1607 , _opr2(opr2)
1608 , _type(T_ILLEGAL)
1609 , _condition(lir_cond_unknown)
1610 , _fpu_stack_size(0)
1611 , _tmp(tmp) {
1612 assert(code != lir_cmp && is_in_range(code, begin_op2, end_op2), "code check");
1613 }
1614
1615 LIR_Opr in_opr1() const { return _opr1; }
1616 LIR_Opr in_opr2() const { return _opr2; }
1617 BasicType type() const { return _type; }
1618 LIR_Opr tmp_opr() const { return _tmp; }
1619 LIR_Condition condition() const {
1620 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); return _condition;
1621 }
1622 void set_condition(LIR_Condition condition) {
1623 assert(code() == lir_cmp || code() == lir_cmove, "only valid for cmp and cmove"); _condition = condition;
1624 }
1625
1626 void set_fpu_stack_size(int size) { _fpu_stack_size = size; }
1627 int fpu_stack_size() const { return _fpu_stack_size; }
1628
1629 void set_in_opr1(LIR_Opr opr) { _opr1 = opr; }
1630 void set_in_opr2(LIR_Opr opr) { _opr2 = opr; }
1631
1632 virtual void emit_code(LIR_Assembler* masm);
1633 virtual LIR_Op2* as_Op2() { return this; }
1634 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1635 };
1636
1637 class LIR_OpAllocArray : public LIR_Op {
1638 friend class LIR_OpVisitState;
1639
1640 private:
1641 LIR_Opr _klass;
1642 LIR_Opr _len;
1643 LIR_Opr _tmp1;
1644 LIR_Opr _tmp2;
1645 LIR_Opr _tmp3;
1646 LIR_Opr _tmp4;
1647 BasicType _type;
1648 CodeStub* _stub;
1649
1650 public:
1651 LIR_OpAllocArray(LIR_Opr klass, LIR_Opr len, LIR_Opr result, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, BasicType type, CodeStub* stub)
1652 : LIR_Op(lir_alloc_array, result, NULL)
1653 , _klass(klass)
1654 , _len(len)
1655 , _tmp1(t1)
1656 , _tmp2(t2)
1657 , _tmp3(t3)
1658 , _tmp4(t4)
1659 , _type(type)
1660 , _stub(stub) {}
1661
1662 LIR_Opr klass() const { return _klass; }
1663 LIR_Opr len() const { return _len; }
1664 LIR_Opr obj() const { return result_opr(); }
1665 LIR_Opr tmp1() const { return _tmp1; }
1666 LIR_Opr tmp2() const { return _tmp2; }
1667 LIR_Opr tmp3() const { return _tmp3; }
1668 LIR_Opr tmp4() const { return _tmp4; }
1669 BasicType type() const { return _type; }
1670 CodeStub* stub() const { return _stub; }
1671
1672 virtual void emit_code(LIR_Assembler* masm);
1673 virtual LIR_OpAllocArray * as_OpAllocArray () { return this; }
1674 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1675 };
1676
1677
1678 class LIR_Op3: public LIR_Op {
1679 friend class LIR_OpVisitState;
1680
1681 private:
1682 LIR_Opr _opr1;
1683 LIR_Opr _opr2;
1684 LIR_Opr _opr3;
1685 public:
1686 LIR_Op3(LIR_Code code, LIR_Opr opr1, LIR_Opr opr2, LIR_Opr opr3, LIR_Opr result, CodeEmitInfo* info = NULL)
1687 : LIR_Op(code, result, info)
1688 , _opr1(opr1)
1689 , _opr2(opr2)
1690 , _opr3(opr3) { assert(is_in_range(code, begin_op3, end_op3), "code check"); }
1691 LIR_Opr in_opr1() const { return _opr1; }
1692 LIR_Opr in_opr2() const { return _opr2; }
1693 LIR_Opr in_opr3() const { return _opr3; }
1694
1695 virtual void emit_code(LIR_Assembler* masm);
1696 virtual LIR_Op3* as_Op3() { return this; }
1697 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1698 };
1699
1700
1701 //--------------------------------
1702 class LabelObj: public CompilationResourceObj {
1703 private:
1704 Label _label;
1705 public:
1706 LabelObj() {}
1707 Label* label() { return &_label; }
1708 };
1709
1710
1711 class LIR_OpLock: public LIR_Op {
1712 friend class LIR_OpVisitState;
1713
1714 private:
1715 LIR_Opr _hdr;
1716 LIR_Opr _obj;
1717 LIR_Opr _lock;
1718 LIR_Opr _scratch;
1719 CodeStub* _stub;
1720 public:
1721 LIR_OpLock(LIR_Code code, LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info)
1722 : LIR_Op(code, LIR_OprFact::illegalOpr, info)
1723 , _hdr(hdr)
1724 , _obj(obj)
1725 , _lock(lock)
1726 , _scratch(scratch)
1727 , _stub(stub) {}
1728
1729 LIR_Opr hdr_opr() const { return _hdr; }
1730 LIR_Opr obj_opr() const { return _obj; }
1731 LIR_Opr lock_opr() const { return _lock; }
1732 LIR_Opr scratch_opr() const { return _scratch; }
1733 CodeStub* stub() const { return _stub; }
1734
1735 virtual void emit_code(LIR_Assembler* masm);
1736 virtual LIR_OpLock* as_OpLock() { return this; }
1737 void print_instr(outputStream* out) const PRODUCT_RETURN;
1738 };
1739
1740
1741 class LIR_OpDelay: public LIR_Op {
1742 friend class LIR_OpVisitState;
1743
1744 private:
1745 LIR_Op* _op;
1746
1747 public:
1748 LIR_OpDelay(LIR_Op* op, CodeEmitInfo* info):
1749 LIR_Op(lir_delay_slot, LIR_OprFact::illegalOpr, info),
1750 _op(op) {
1751 assert(op->code() == lir_nop || LIRFillDelaySlots, "should be filling with nops");
1752 }
1753 virtual void emit_code(LIR_Assembler* masm);
1754 virtual LIR_OpDelay* as_OpDelay() { return this; }
1755 void print_instr(outputStream* out) const PRODUCT_RETURN;
1756 LIR_Op* delay_op() const { return _op; }
1757 CodeEmitInfo* call_info() const { return info(); }
1758 };
1759
1760
1761 // LIR_OpCompareAndSwap
1762 class LIR_OpCompareAndSwap : public LIR_Op {
1763 friend class LIR_OpVisitState;
1764
1765 private:
1766 LIR_Opr _addr;
1767 LIR_Opr _cmp_value;
1768 LIR_Opr _new_value;
1769 LIR_Opr _tmp1;
1770 LIR_Opr _tmp2;
1771
1772 public:
1773 LIR_OpCompareAndSwap(LIR_Code code, LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
1774 LIR_Opr t1, LIR_Opr t2, LIR_Opr result)
1775 : LIR_Op(code, result, NULL) // no result, no info
1776 , _addr(addr)
1777 , _cmp_value(cmp_value)
1778 , _new_value(new_value)
1779 , _tmp1(t1)
1780 , _tmp2(t2) { }
1781
1782 LIR_Opr addr() const { return _addr; }
1783 LIR_Opr cmp_value() const { return _cmp_value; }
1784 LIR_Opr new_value() const { return _new_value; }
1785 LIR_Opr tmp1() const { return _tmp1; }
1786 LIR_Opr tmp2() const { return _tmp2; }
1787
1788 virtual void emit_code(LIR_Assembler* masm);
1789 virtual LIR_OpCompareAndSwap * as_OpCompareAndSwap () { return this; }
1790 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1791 };
1792
1793 // LIR_OpProfileCall
1794 class LIR_OpProfileCall : public LIR_Op {
1795 friend class LIR_OpVisitState;
1796
1797 private:
1798 ciMethod* _profiled_method;
1799 int _profiled_bci;
1800 LIR_Opr _mdo;
1801 LIR_Opr _recv;
1802 LIR_Opr _tmp1;
1803 ciKlass* _known_holder;
1804
1805 public:
1806 // Destroys recv
1807 LIR_OpProfileCall(LIR_Code code, ciMethod* profiled_method, int profiled_bci, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* known_holder)
1808 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) // no result, no info
1809 , _profiled_method(profiled_method)
1810 , _profiled_bci(profiled_bci)
1811 , _mdo(mdo)
1812 , _recv(recv)
1813 , _tmp1(t1)
1814 , _known_holder(known_holder) { }
1815
1816 ciMethod* profiled_method() const { return _profiled_method; }
1817 int profiled_bci() const { return _profiled_bci; }
1818 LIR_Opr mdo() const { return _mdo; }
1819 LIR_Opr recv() const { return _recv; }
1820 LIR_Opr tmp1() const { return _tmp1; }
1821 ciKlass* known_holder() const { return _known_holder; }
1822
1823 virtual void emit_code(LIR_Assembler* masm);
1824 virtual LIR_OpProfileCall* as_OpProfileCall() { return this; }
1825 virtual void print_instr(outputStream* out) const PRODUCT_RETURN;
1826 };
1827
1828 class LIR_InsertionBuffer;
1829
1830 //--------------------------------LIR_List---------------------------------------------------
1831 // Maintains a list of LIR instructions (one instance of LIR_List per basic block)
1832 // The LIR instructions are appended by the LIR_List class itself;
1833 //
1834 // Notes:
1835 // - all offsets are(should be) in bytes
1836 // - local positions are specified with an offset, with offset 0 being local 0
1837
1838 class LIR_List: public CompilationResourceObj {
1839 private:
1840 LIR_OpList _operations;
1841
1842 Compilation* _compilation;
1843 #ifndef PRODUCT
1844 BlockBegin* _block;
1845 #endif
1846 #ifdef ASSERT
1847 const char * _file;
1848 int _line;
1849 #endif
1850
1851 void append(LIR_Op* op) {
1852 if (op->source() == NULL)
1853 op->set_source(_compilation->current_instruction());
1854 #ifndef PRODUCT
1855 if (PrintIRWithLIR) {
1856 _compilation->maybe_print_current_instruction();
1857 op->print(); tty->cr();
1858 }
1859 #endif // PRODUCT
1860
1861 _operations.append(op);
1862
1863 #ifdef ASSERT
1864 op->verify();
1865 op->set_file_and_line(_file, _line);
1866 _file = NULL;
1867 _line = 0;
1868 #endif
1869 }
1870
1871 public:
1872 LIR_List(Compilation* compilation, BlockBegin* block = NULL);
1873
1874 #ifdef ASSERT
1875 void set_file_and_line(const char * file, int line);
1876 #endif
1877
1878 //---------- accessors ---------------
1879 LIR_OpList* instructions_list() { return &_operations; }
1880 int length() const { return _operations.length(); }
1881 LIR_Op* at(int i) const { return _operations.at(i); }
1882
1883 NOT_PRODUCT(BlockBegin* block() const { return _block; });
1884
1885 // insert LIR_Ops in buffer to right places in LIR_List
1886 void append(LIR_InsertionBuffer* buffer);
1887
1888 //---------- mutators ---------------
1889 void insert_before(int i, LIR_List* op_list) { _operations.insert_before(i, op_list->instructions_list()); }
1890 void insert_before(int i, LIR_Op* op) { _operations.insert_before(i, op); }
1891 void remove_at(int i) { _operations.remove_at(i); }
1892
1893 //---------- printing -------------
1894 void print_instructions() PRODUCT_RETURN;
1895
1896
1897 //---------- instructions -------------
1898 void call_opt_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
1899 address dest, LIR_OprList* arguments,
1900 CodeEmitInfo* info) {
1901 append(new LIR_OpJavaCall(lir_optvirtual_call, method, receiver, result, dest, arguments, info));
1902 }
1903 void call_static(ciMethod* method, LIR_Opr result,
1904 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
1905 append(new LIR_OpJavaCall(lir_static_call, method, LIR_OprFact::illegalOpr, result, dest, arguments, info));
1906 }
1907 void call_icvirtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
1908 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
1909 append(new LIR_OpJavaCall(lir_icvirtual_call, method, receiver, result, dest, arguments, info));
1910 }
1911 void call_virtual(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
1912 intptr_t vtable_offset, LIR_OprList* arguments, CodeEmitInfo* info) {
1913 append(new LIR_OpJavaCall(lir_virtual_call, method, receiver, result, vtable_offset, arguments, info));
1914 }
1915 void call_dynamic(ciMethod* method, LIR_Opr receiver, LIR_Opr result,
1916 address dest, LIR_OprList* arguments, CodeEmitInfo* info) {
1917 append(new LIR_OpJavaCall(lir_dynamic_call, method, receiver, result, dest, arguments, info));
1918 }
1919
1920 void get_thread(LIR_Opr result) { append(new LIR_Op0(lir_get_thread, result)); }
1921 void word_align() { append(new LIR_Op0(lir_word_align)); }
1922 void membar() { append(new LIR_Op0(lir_membar)); }
1923 void membar_acquire() { append(new LIR_Op0(lir_membar_acquire)); }
1924 void membar_release() { append(new LIR_Op0(lir_membar_release)); }
1925 void membar_loadload() { append(new LIR_Op0(lir_membar_loadload)); }
1926 void membar_storestore() { append(new LIR_Op0(lir_membar_storestore)); }
1927 void membar_loadstore() { append(new LIR_Op0(lir_membar_loadstore)); }
1928 void membar_storeload() { append(new LIR_Op0(lir_membar_storeload)); }
1929
1930 void nop() { append(new LIR_Op0(lir_nop)); }
1931 void build_frame() { append(new LIR_Op0(lir_build_frame)); }
1932
1933 void std_entry(LIR_Opr receiver) { append(new LIR_Op0(lir_std_entry, receiver)); }
1934 void osr_entry(LIR_Opr osrPointer) { append(new LIR_Op0(lir_osr_entry, osrPointer)); }
1935
1936 void branch_destination(Label* lbl) { append(new LIR_OpLabel(lbl)); }
1937
1938 void negate(LIR_Opr from, LIR_Opr to) { append(new LIR_Op1(lir_neg, from, to)); }
1939 void leal(LIR_Opr from, LIR_Opr result_reg) { append(new LIR_Op1(lir_leal, from, result_reg)); }
1940
1941 // result is a stack location for old backend and vreg for UseLinearScan
1942 // stack_loc_temp is an illegal register for old backend
1943 void roundfp(LIR_Opr reg, LIR_Opr stack_loc_temp, LIR_Opr result) { append(new LIR_OpRoundFP(reg, stack_loc_temp, result)); }
1944 void unaligned_move(LIR_Address* src, LIR_Opr dst) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
1945 void unaligned_move(LIR_Opr src, LIR_Address* dst) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), src->type(), lir_patch_none, NULL, lir_move_unaligned)); }
1946 void unaligned_move(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, NULL, lir_move_unaligned)); }
1947 void move(LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
1948 void move(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info)); }
1949 void move(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) { append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info)); }
1950 void move_wide(LIR_Address* src, LIR_Opr dst, CodeEmitInfo* info = NULL) {
1951 if (UseCompressedOops) {
1952 append(new LIR_Op1(lir_move, LIR_OprFact::address(src), dst, src->type(), lir_patch_none, info, lir_move_wide));
1953 } else {
1954 move(src, dst, info);
1955 }
1956 }
1957 void move_wide(LIR_Opr src, LIR_Address* dst, CodeEmitInfo* info = NULL) {
1958 if (UseCompressedOops) {
1959 append(new LIR_Op1(lir_move, src, LIR_OprFact::address(dst), dst->type(), lir_patch_none, info, lir_move_wide));
1960 } else {
1961 move(src, dst, info);
1962 }
1963 }
1964 void volatile_move(LIR_Opr src, LIR_Opr dst, BasicType type, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none) { append(new LIR_Op1(lir_move, src, dst, type, patch_code, info, lir_move_volatile)); }
1965
1966 void oop2reg (jobject o, LIR_Opr reg) { append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg)); }
1967 void oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info);
1968
1969 void return_op(LIR_Opr result) { append(new LIR_Op1(lir_return, result)); }
1970
1971 void safepoint(LIR_Opr tmp, CodeEmitInfo* info) { append(new LIR_Op1(lir_safepoint, tmp, info)); }
1972
1973 #ifdef PPC
1974 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_OpConvert(code, left, dst, NULL, tmp1, tmp2)); }
1975 #endif
1976 void convert(Bytecodes::Code code, LIR_Opr left, LIR_Opr dst, ConversionStub* stub = NULL/*, bool is_32bit = false*/) { append(new LIR_OpConvert(code, left, dst, stub)); }
1977
1978 void logical_and (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_and, left, right, dst)); }
1979 void logical_or (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_or, left, right, dst)); }
1980 void logical_xor (LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_logic_xor, left, right, dst)); }
1981
1982 void pack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_pack64, src, dst, T_LONG, lir_patch_none, NULL)); }
1983 void unpack64(LIR_Opr src, LIR_Opr dst) { append(new LIR_Op1(lir_unpack64, src, dst, T_LONG, lir_patch_none, NULL)); }
1984
1985 void null_check(LIR_Opr opr, CodeEmitInfo* info) { append(new LIR_Op1(lir_null_check, opr, info)); }
1986 void throw_exception(LIR_Opr exceptionPC, LIR_Opr exceptionOop, CodeEmitInfo* info) {
1987 append(new LIR_Op2(lir_throw, exceptionPC, exceptionOop, LIR_OprFact::illegalOpr, info));
1988 }
1989 void unwind_exception(LIR_Opr exceptionOop) {
1990 append(new LIR_Op1(lir_unwind, exceptionOop));
1991 }
1992
1993 void compare_to (LIR_Opr left, LIR_Opr right, LIR_Opr dst) {
1994 append(new LIR_Op2(lir_compare_to, left, right, dst));
1995 }
1996
1997 void push(LIR_Opr opr) { append(new LIR_Op1(lir_push, opr)); }
1998 void pop(LIR_Opr reg) { append(new LIR_Op1(lir_pop, reg)); }
1999
2000 void cmp(LIR_Condition condition, LIR_Opr left, LIR_Opr right, CodeEmitInfo* info = NULL) {
2001 append(new LIR_Op2(lir_cmp, condition, left, right, info));
2002 }
2003 void cmp(LIR_Condition condition, LIR_Opr left, int right, CodeEmitInfo* info = NULL) {
2004 cmp(condition, left, LIR_OprFact::intConst(right), info);
2005 }
2006
2007 void cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info);
2008 void cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info);
2009
2010 void cmove(LIR_Condition condition, LIR_Opr src1, LIR_Opr src2, LIR_Opr dst, BasicType type) {
2011 append(new LIR_Op2(lir_cmove, condition, src1, src2, dst, type));
2012 }
2013
2014 void cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2015 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2016 void cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2017 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2018 void cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value,
2019 LIR_Opr t1, LIR_Opr t2, LIR_Opr result = LIR_OprFact::illegalOpr);
2020
2021 void abs (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_abs , from, tmp, to)); }
2022 void sqrt(LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_sqrt, from, tmp, to)); }
2023 void log (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log, from, LIR_OprFact::illegalOpr, to, tmp)); }
2024 void log10 (LIR_Opr from, LIR_Opr to, LIR_Opr tmp) { append(new LIR_Op2(lir_log10, from, LIR_OprFact::illegalOpr, to, tmp)); }
2025 void sin (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_sin , from, tmp1, to, tmp2)); }
2026 void cos (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_cos , from, tmp1, to, tmp2)); }
2027 void tan (LIR_Opr from, LIR_Opr to, LIR_Opr tmp1, LIR_Opr tmp2) { append(new LIR_Op2(lir_tan , from, tmp1, to, tmp2)); }
2028
2029 void add (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_add, left, right, res)); }
2030 void sub (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_sub, left, right, res, info)); }
2031 void mul (LIR_Opr left, LIR_Opr right, LIR_Opr res) { append(new LIR_Op2(lir_mul, left, right, res)); }
2032 void mul_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_mul_strictfp, left, right, res, tmp)); }
2033 void div (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_div, left, right, res, info)); }
2034 void div_strictfp (LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp) { append(new LIR_Op2(lir_div_strictfp, left, right, res, tmp)); }
2035 void rem (LIR_Opr left, LIR_Opr right, LIR_Opr res, CodeEmitInfo* info = NULL) { append(new LIR_Op2(lir_rem, left, right, res, info)); }
2036
2037 void volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2038 void volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2039
2040 void load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2041
2042 void prefetch(LIR_Address* addr, bool is_store);
2043
2044 void store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2045 void store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2046 void store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info = NULL, LIR_PatchCode patch_code = lir_patch_none);
2047 void volatile_store_mem_reg(LIR_Opr src, LIR_Address* address, CodeEmitInfo* info, LIR_PatchCode patch_code = lir_patch_none);
2048 void volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code);
2049
2050 void idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2051 void idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2052 void irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2053 void irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info);
2054
2055 void allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub);
2056 void allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub);
2057
2058 // jump is an unconditional branch
2059 void jump(BlockBegin* block) {
2060 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, block));
2061 }
2062 void jump(CodeStub* stub) {
2063 append(new LIR_OpBranch(lir_cond_always, T_ILLEGAL, stub));
2064 }
2065 void branch(LIR_Condition cond, BasicType type, Label* lbl) { append(new LIR_OpBranch(cond, type, lbl)); }
2066 void branch(LIR_Condition cond, BasicType type, BlockBegin* block) {
2067 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2068 append(new LIR_OpBranch(cond, type, block));
2069 }
2070 void branch(LIR_Condition cond, BasicType type, CodeStub* stub) {
2071 assert(type != T_FLOAT && type != T_DOUBLE, "no fp comparisons");
2072 append(new LIR_OpBranch(cond, type, stub));
2073 }
2074 void branch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* unordered) {
2075 assert(type == T_FLOAT || type == T_DOUBLE, "fp comparisons only");
2076 append(new LIR_OpBranch(cond, type, block, unordered));
2077 }
2078
2079 void shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2080 void shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2081 void unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp);
2082
2083 void shift_left(LIR_Opr value, int count, LIR_Opr dst) { shift_left(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2084 void shift_right(LIR_Opr value, int count, LIR_Opr dst) { shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2085 void unsigned_shift_right(LIR_Opr value, int count, LIR_Opr dst) { unsigned_shift_right(value, LIR_OprFact::intConst(count), dst, LIR_OprFact::illegalOpr); }
2086
2087 void lcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst) { append(new LIR_Op2(lir_cmp_l2i, left, right, dst)); }
2088 void fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less);
2089
2090 void call_runtime_leaf(address routine, LIR_Opr tmp, LIR_Opr result, LIR_OprList* arguments) {
2091 append(new LIR_OpRTCall(routine, tmp, result, arguments));
2092 }
2093
2094 void call_runtime(address routine, LIR_Opr tmp, LIR_Opr result,
2095 LIR_OprList* arguments, CodeEmitInfo* info) {
2096 append(new LIR_OpRTCall(routine, tmp, result, arguments, info));
2097 }
2098
2099 void load_stack_address_monitor(int monitor_ix, LIR_Opr dst) { append(new LIR_Op1(lir_monaddr, LIR_OprFact::intConst(monitor_ix), dst)); }
2100 void unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub);
2101 void lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info);
2102
2103 void set_24bit_fpu() { append(new LIR_Op0(lir_24bit_FPU )); }
2104 void restore_fpu() { append(new LIR_Op0(lir_reset_FPU )); }
2105 void breakpoint() { append(new LIR_Op0(lir_breakpoint)); }
2106
2107 void arraycopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) { append(new LIR_OpArrayCopy(src, src_pos, dst, dst_pos, length, tmp, expected_type, flags, info)); }
2108
2109 void fpop_raw() { append(new LIR_Op0(lir_fpop_raw)); }
2110
2111 void instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci);
2112 void store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci);
2113
2114 void checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass,
2115 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check,
2116 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub,
2117 ciMethod* profiled_method, int profiled_bci);
2118 // methodDataOop profiling
2119 void profile_call(ciMethod* method, int bci, LIR_Opr mdo, LIR_Opr recv, LIR_Opr t1, ciKlass* cha_klass) {
2120 append(new LIR_OpProfileCall(lir_profile_call, method, bci, mdo, recv, t1, cha_klass));
2121 }
2122 };
2123
2124 void print_LIR(BlockList* blocks);
2125
2126 class LIR_InsertionBuffer : public CompilationResourceObj {
2127 private:
2128 LIR_List* _lir; // the lir list where ops of this buffer should be inserted later (NULL when uninitialized)
2129
2130 // list of insertion points. index and count are stored alternately:
2131 // _index_and_count[i * 2]: the index into lir list where "count" ops should be inserted
2132 // _index_and_count[i * 2 + 1]: the number of ops to be inserted at index
2133 intStack _index_and_count;
2134
2135 // the LIR_Ops to be inserted
2136 LIR_OpList _ops;
2137
2138 void append_new(int index, int count) { _index_and_count.append(index); _index_and_count.append(count); }
2139 void set_index_at(int i, int value) { _index_and_count.at_put((i << 1), value); }
2140 void set_count_at(int i, int value) { _index_and_count.at_put((i << 1) + 1, value); }
2141
2142 #ifdef ASSERT
2143 void verify();
2144 #endif
2145 public:
2146 LIR_InsertionBuffer() : _lir(NULL), _index_and_count(8), _ops(8) { }
2147
2148 // must be called before using the insertion buffer
2149 void init(LIR_List* lir) { assert(!initialized(), "already initialized"); _lir = lir; _index_and_count.clear(); _ops.clear(); }
2150 bool initialized() const { return _lir != NULL; }
2151 // called automatically when the buffer is appended to the LIR_List
2152 void finish() { _lir = NULL; }
2153
2154 // accessors
2155 LIR_List* lir_list() const { return _lir; }
2156 int number_of_insertion_points() const { return _index_and_count.length() >> 1; }
2157 int index_at(int i) const { return _index_and_count.at((i << 1)); }
2158 int count_at(int i) const { return _index_and_count.at((i << 1) + 1); }
2159
2160 int number_of_ops() const { return _ops.length(); }
2161 LIR_Op* op_at(int i) const { return _ops.at(i); }
2162
2163 // append an instruction to the buffer
2164 void append(int index, LIR_Op* op);
2165
2166 // instruction
2167 void move(int index, LIR_Opr src, LIR_Opr dst, CodeEmitInfo* info = NULL) { append(index, new LIR_Op1(lir_move, src, dst, dst->type(), lir_patch_none, info)); }
2168 };
2169
2170
2171 //
2172 // LIR_OpVisitState is used for manipulating LIR_Ops in an abstract way.
2173 // Calling a LIR_Op's visit function with a LIR_OpVisitState causes
2174 // information about the input, output and temporaries used by the
2175 // op to be recorded. It also records whether the op has call semantics
2176 // and also records all the CodeEmitInfos used by this op.
2177 //
2178
2179
2180 class LIR_OpVisitState: public StackObj {
2181 public:
2182 typedef enum { inputMode, firstMode = inputMode, tempMode, outputMode, numModes, invalidMode = -1 } OprMode;
2183
2184 enum {
2185 maxNumberOfOperands = 16,
2186 maxNumberOfInfos = 4
2187 };
2188
2189 private:
2190 LIR_Op* _op;
2191
2192 // optimization: the operands and infos are not stored in a variable-length
2193 // list, but in a fixed-size array to save time of size checks and resizing
2194 int _oprs_len[numModes];
2195 LIR_Opr* _oprs_new[numModes][maxNumberOfOperands];
2196 int _info_len;
2197 CodeEmitInfo* _info_new[maxNumberOfInfos];
2198
2199 bool _has_call;
2200 bool _has_slow_case;
2201
2202
2203 // only include register operands
2204 // addresses are decomposed to the base and index registers
2205 // constants and stack operands are ignored
2206 void append(LIR_Opr& opr, OprMode mode) {
2207 assert(opr->is_valid(), "should not call this otherwise");
2208 assert(mode >= 0 && mode < numModes, "bad mode");
2209
2210 if (opr->is_register()) {
2211 assert(_oprs_len[mode] < maxNumberOfOperands, "array overflow");
2212 _oprs_new[mode][_oprs_len[mode]++] = &opr;
2213
2214 } else if (opr->is_pointer()) {
2215 LIR_Address* address = opr->as_address_ptr();
2216 if (address != NULL) {
2217 // special handling for addresses: add base and index register of the address
2218 // both are always input operands!
2219 if (address->_base->is_valid()) {
2220 assert(address->_base->is_register(), "must be");
2221 assert(_oprs_len[inputMode] < maxNumberOfOperands, "array overflow");
2222 _oprs_new[inputMode][_oprs_len[inputMode]++] = &address->_base;
2223 }
2224 if (address->_index->is_valid()) {
2225 assert(address->_index->is_register(), "must be");
2226 assert(_oprs_len[inputMode] < maxNumberOfOperands, "array overflow");
2227 _oprs_new[inputMode][_oprs_len[inputMode]++] = &address->_index;
2228 }
2229
2230 } else {
2231 assert(opr->is_constant(), "constant operands are not processed");
2232 }
2233 } else {
2234 assert(opr->is_stack(), "stack operands are not processed");
2235 }
2236 }
2237
2238 void append(CodeEmitInfo* info) {
2239 assert(info != NULL, "should not call this otherwise");
2240 assert(_info_len < maxNumberOfInfos, "array overflow");
2241 _info_new[_info_len++] = info;
2242 }
2243
2244 public:
2245 LIR_OpVisitState() { reset(); }
2246
2247 LIR_Op* op() const { return _op; }
2248 void set_op(LIR_Op* op) { reset(); _op = op; }
2249
2250 bool has_call() const { return _has_call; }
2251 bool has_slow_case() const { return _has_slow_case; }
2252
2253 void reset() {
2254 _op = NULL;
2255 _has_call = false;
2256 _has_slow_case = false;
2257
2258 _oprs_len[inputMode] = 0;
2259 _oprs_len[tempMode] = 0;
2260 _oprs_len[outputMode] = 0;
2261 _info_len = 0;
2262 }
2263
2264
2265 int opr_count(OprMode mode) const {
2266 assert(mode >= 0 && mode < numModes, "bad mode");
2267 return _oprs_len[mode];
2268 }
2269
2270 LIR_Opr opr_at(OprMode mode, int index) const {
2271 assert(mode >= 0 && mode < numModes, "bad mode");
2272 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2273 return *_oprs_new[mode][index];
2274 }
2275
2276 void set_opr_at(OprMode mode, int index, LIR_Opr opr) const {
2277 assert(mode >= 0 && mode < numModes, "bad mode");
2278 assert(index >= 0 && index < _oprs_len[mode], "index out of bound");
2279 *_oprs_new[mode][index] = opr;
2280 }
2281
2282 int info_count() const {
2283 return _info_len;
2284 }
2285
2286 CodeEmitInfo* info_at(int index) const {
2287 assert(index < _info_len, "index out of bounds");
2288 return _info_new[index];
2289 }
2290
2291 XHandlers* all_xhandler();
2292
2293 // collects all register operands of the instruction
2294 void visit(LIR_Op* op);
2295
2296 #if ASSERT
2297 // check that an operation has no operands
2298 bool no_operands(LIR_Op* op);
2299 #endif
2300
2301 // LIR_Op visitor functions use these to fill in the state
2302 void do_input(LIR_Opr& opr) { append(opr, LIR_OpVisitState::inputMode); }
2303 void do_output(LIR_Opr& opr) { append(opr, LIR_OpVisitState::outputMode); }
2304 void do_temp(LIR_Opr& opr) { append(opr, LIR_OpVisitState::tempMode); }
2305 void do_info(CodeEmitInfo* info) { append(info); }
2306
2307 void do_stub(CodeStub* stub);
2308 void do_call() { _has_call = true; }
2309 void do_slow_case() { _has_slow_case = true; }
2310 void do_slow_case(CodeEmitInfo* info) {
2311 _has_slow_case = true;
2312 append(info);
2313 }
2314 };
2315
2316
2317 inline LIR_Opr LIR_OprDesc::illegalOpr() { return LIR_OprFact::illegalOpr; };
2318
2319 #endif // SHARE_VM_C1_C1_LIR_HPP