1 /*
2 * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
3 * Copyright (c) 2012, 2019 SAP SE. All rights reserved.
4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
5 *
6 * This code is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 only, as
8 * published by the Free Software Foundation.
9 *
10 * This code is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #include "precompiled.hpp"
27 #include "asm/macroAssembler.inline.hpp"
28 #include "code/debugInfoRec.hpp"
29 #include "code/icBuffer.hpp"
30 #include "code/vtableStubs.hpp"
31 #include "frame_ppc.hpp"
32 #include "gc/shared/gcLocker.hpp"
33 #include "interpreter/interpreter.hpp"
34 #include "interpreter/interp_masm.hpp"
35 #include "memory/resourceArea.hpp"
36 #include "oops/compiledICHolder.hpp"
37 #include "oops/klass.inline.hpp"
38 #include "runtime/safepointMechanism.hpp"
39 #include "runtime/sharedRuntime.hpp"
40 #include "runtime/vframeArray.hpp"
41 #include "utilities/align.hpp"
42 #include "vmreg_ppc.inline.hpp"
43 #ifdef COMPILER1
44 #include "c1/c1_Runtime1.hpp"
45 #endif
46 #ifdef COMPILER2
47 #include "opto/ad.hpp"
48 #include "opto/runtime.hpp"
49 #endif
50
51 #include <alloca.h>
52
53 #define __ masm->
54
55 #ifdef PRODUCT
56 #define BLOCK_COMMENT(str) // nothing
57 #else
58 #define BLOCK_COMMENT(str) __ block_comment(str)
59 #endif
60
61 #define BIND(label) bind(label); BLOCK_COMMENT(#label ":")
62
63
64 class RegisterSaver {
65 // Used for saving volatile registers.
66 public:
67
68 // Support different return pc locations.
69 enum ReturnPCLocation {
70 return_pc_is_lr,
71 return_pc_is_pre_saved,
72 return_pc_is_thread_saved_exception_pc
73 };
74
75 static OopMap* push_frame_reg_args_and_save_live_registers(MacroAssembler* masm,
76 int* out_frame_size_in_bytes,
77 bool generate_oop_map,
78 int return_pc_adjustment,
79 ReturnPCLocation return_pc_location,
80 bool save_vectors = false);
81 static void restore_live_registers_and_pop_frame(MacroAssembler* masm,
82 int frame_size_in_bytes,
83 bool restore_ctr,
84 bool save_vectors = false);
85
86 static void push_frame_and_save_argument_registers(MacroAssembler* masm,
87 Register r_temp,
88 int frame_size,
89 int total_args,
90 const VMRegPair *regs, const VMRegPair *regs2 = NULL);
91 static void restore_argument_registers_and_pop_frame(MacroAssembler*masm,
92 int frame_size,
93 int total_args,
94 const VMRegPair *regs, const VMRegPair *regs2 = NULL);
95
96 // During deoptimization only the result registers need to be restored
97 // all the other values have already been extracted.
98 static void restore_result_registers(MacroAssembler* masm, int frame_size_in_bytes);
99
100 // Constants and data structures:
101
102 typedef enum {
103 int_reg,
104 float_reg,
105 special_reg,
106 vs_reg
107 } RegisterType;
108
109 typedef enum {
110 reg_size = 8,
111 half_reg_size = reg_size / 2,
112 vs_reg_size = 16
113 } RegisterConstants;
114
115 typedef struct {
116 RegisterType reg_type;
117 int reg_num;
118 VMReg vmreg;
119 } LiveRegType;
120 };
121
122
123 #define RegisterSaver_LiveIntReg(regname) \
124 { RegisterSaver::int_reg, regname->encoding(), regname->as_VMReg() }
125
126 #define RegisterSaver_LiveFloatReg(regname) \
127 { RegisterSaver::float_reg, regname->encoding(), regname->as_VMReg() }
128
129 #define RegisterSaver_LiveSpecialReg(regname) \
130 { RegisterSaver::special_reg, regname->encoding(), regname->as_VMReg() }
131
132 #define RegisterSaver_LiveVSReg(regname) \
133 { RegisterSaver::vs_reg, regname->encoding(), regname->as_VMReg() }
134
135 static const RegisterSaver::LiveRegType RegisterSaver_LiveRegs[] = {
136 // Live registers which get spilled to the stack. Register
137 // positions in this array correspond directly to the stack layout.
138
139 //
140 // live special registers:
141 //
142 RegisterSaver_LiveSpecialReg(SR_CTR),
143 //
144 // live float registers:
145 //
146 RegisterSaver_LiveFloatReg( F0 ),
147 RegisterSaver_LiveFloatReg( F1 ),
148 RegisterSaver_LiveFloatReg( F2 ),
149 RegisterSaver_LiveFloatReg( F3 ),
150 RegisterSaver_LiveFloatReg( F4 ),
151 RegisterSaver_LiveFloatReg( F5 ),
152 RegisterSaver_LiveFloatReg( F6 ),
153 RegisterSaver_LiveFloatReg( F7 ),
154 RegisterSaver_LiveFloatReg( F8 ),
155 RegisterSaver_LiveFloatReg( F9 ),
156 RegisterSaver_LiveFloatReg( F10 ),
157 RegisterSaver_LiveFloatReg( F11 ),
158 RegisterSaver_LiveFloatReg( F12 ),
159 RegisterSaver_LiveFloatReg( F13 ),
160 RegisterSaver_LiveFloatReg( F14 ),
161 RegisterSaver_LiveFloatReg( F15 ),
162 RegisterSaver_LiveFloatReg( F16 ),
163 RegisterSaver_LiveFloatReg( F17 ),
164 RegisterSaver_LiveFloatReg( F18 ),
165 RegisterSaver_LiveFloatReg( F19 ),
166 RegisterSaver_LiveFloatReg( F20 ),
167 RegisterSaver_LiveFloatReg( F21 ),
168 RegisterSaver_LiveFloatReg( F22 ),
169 RegisterSaver_LiveFloatReg( F23 ),
170 RegisterSaver_LiveFloatReg( F24 ),
171 RegisterSaver_LiveFloatReg( F25 ),
172 RegisterSaver_LiveFloatReg( F26 ),
173 RegisterSaver_LiveFloatReg( F27 ),
174 RegisterSaver_LiveFloatReg( F28 ),
175 RegisterSaver_LiveFloatReg( F29 ),
176 RegisterSaver_LiveFloatReg( F30 ),
177 RegisterSaver_LiveFloatReg( F31 ),
178 //
179 // live integer registers:
180 //
181 RegisterSaver_LiveIntReg( R0 ),
182 //RegisterSaver_LiveIntReg( R1 ), // stack pointer
183 RegisterSaver_LiveIntReg( R2 ),
184 RegisterSaver_LiveIntReg( R3 ),
185 RegisterSaver_LiveIntReg( R4 ),
186 RegisterSaver_LiveIntReg( R5 ),
187 RegisterSaver_LiveIntReg( R6 ),
188 RegisterSaver_LiveIntReg( R7 ),
189 RegisterSaver_LiveIntReg( R8 ),
190 RegisterSaver_LiveIntReg( R9 ),
191 RegisterSaver_LiveIntReg( R10 ),
192 RegisterSaver_LiveIntReg( R11 ),
193 RegisterSaver_LiveIntReg( R12 ),
194 //RegisterSaver_LiveIntReg( R13 ), // system thread id
195 RegisterSaver_LiveIntReg( R14 ),
196 RegisterSaver_LiveIntReg( R15 ),
197 RegisterSaver_LiveIntReg( R16 ),
198 RegisterSaver_LiveIntReg( R17 ),
199 RegisterSaver_LiveIntReg( R18 ),
200 RegisterSaver_LiveIntReg( R19 ),
201 RegisterSaver_LiveIntReg( R20 ),
202 RegisterSaver_LiveIntReg( R21 ),
203 RegisterSaver_LiveIntReg( R22 ),
204 RegisterSaver_LiveIntReg( R23 ),
205 RegisterSaver_LiveIntReg( R24 ),
206 RegisterSaver_LiveIntReg( R25 ),
207 RegisterSaver_LiveIntReg( R26 ),
208 RegisterSaver_LiveIntReg( R27 ),
209 RegisterSaver_LiveIntReg( R28 ),
210 RegisterSaver_LiveIntReg( R29 ),
211 RegisterSaver_LiveIntReg( R30 ),
212 RegisterSaver_LiveIntReg( R31 ) // must be the last register (see save/restore functions below)
213 };
214
215 static const RegisterSaver::LiveRegType RegisterSaver_LiveVSRegs[] = {
216 //
217 // live vector scalar registers (optional, only these ones are used by C2):
218 //
219 RegisterSaver_LiveVSReg( VSR32 ),
220 RegisterSaver_LiveVSReg( VSR33 ),
221 RegisterSaver_LiveVSReg( VSR34 ),
222 RegisterSaver_LiveVSReg( VSR35 ),
223 RegisterSaver_LiveVSReg( VSR36 ),
224 RegisterSaver_LiveVSReg( VSR37 ),
225 RegisterSaver_LiveVSReg( VSR38 ),
226 RegisterSaver_LiveVSReg( VSR39 ),
227 RegisterSaver_LiveVSReg( VSR40 ),
228 RegisterSaver_LiveVSReg( VSR41 ),
229 RegisterSaver_LiveVSReg( VSR42 ),
230 RegisterSaver_LiveVSReg( VSR43 ),
231 RegisterSaver_LiveVSReg( VSR44 ),
232 RegisterSaver_LiveVSReg( VSR45 ),
233 RegisterSaver_LiveVSReg( VSR46 ),
234 RegisterSaver_LiveVSReg( VSR47 ),
235 RegisterSaver_LiveVSReg( VSR48 ),
236 RegisterSaver_LiveVSReg( VSR49 ),
237 RegisterSaver_LiveVSReg( VSR50 ),
238 RegisterSaver_LiveVSReg( VSR51 )
239 };
240
241
242 OopMap* RegisterSaver::push_frame_reg_args_and_save_live_registers(MacroAssembler* masm,
243 int* out_frame_size_in_bytes,
244 bool generate_oop_map,
245 int return_pc_adjustment,
246 ReturnPCLocation return_pc_location,
247 bool save_vectors) {
248 // Push an abi_reg_args-frame and store all registers which may be live.
249 // If requested, create an OopMap: Record volatile registers as
250 // callee-save values in an OopMap so their save locations will be
251 // propagated to the RegisterMap of the caller frame during
252 // StackFrameStream construction (needed for deoptimization; see
253 // compiledVFrame::create_stack_value).
254 // If return_pc_adjustment != 0 adjust the return pc by return_pc_adjustment.
255 // Updated return pc is returned in R31 (if not return_pc_is_pre_saved).
256
257 // calcualte frame size
258 const int regstosave_num = sizeof(RegisterSaver_LiveRegs) /
259 sizeof(RegisterSaver::LiveRegType);
260 const int vsregstosave_num = save_vectors ? (sizeof(RegisterSaver_LiveVSRegs) /
261 sizeof(RegisterSaver::LiveRegType))
262 : 0;
263 const int register_save_size = regstosave_num * reg_size + vsregstosave_num * vs_reg_size;
264 const int frame_size_in_bytes = align_up(register_save_size, frame::alignment_in_bytes)
265 + frame::abi_reg_args_size;
266
267 *out_frame_size_in_bytes = frame_size_in_bytes;
268 const int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
269 const int register_save_offset = frame_size_in_bytes - register_save_size;
270
271 // OopMap frame size is in c2 stack slots (sizeof(jint)) not bytes or words.
272 OopMap* map = generate_oop_map ? new OopMap(frame_size_in_slots, 0) : NULL;
273
274 BLOCK_COMMENT("push_frame_reg_args_and_save_live_registers {");
275
276 // push a new frame
277 __ push_frame(frame_size_in_bytes, noreg);
278
279 // Save some registers in the last (non-vector) slots of the new frame so we
280 // can use them as scratch regs or to determine the return pc.
281 __ std(R31, frame_size_in_bytes - reg_size - vsregstosave_num * vs_reg_size, R1_SP);
282 __ std(R30, frame_size_in_bytes - 2*reg_size - vsregstosave_num * vs_reg_size, R1_SP);
283
284 // save the flags
285 // Do the save_LR_CR by hand and adjust the return pc if requested.
286 __ mfcr(R30);
287 __ std(R30, frame_size_in_bytes + _abi(cr), R1_SP);
288 switch (return_pc_location) {
289 case return_pc_is_lr: __ mflr(R31); break;
290 case return_pc_is_pre_saved: assert(return_pc_adjustment == 0, "unsupported"); break;
291 case return_pc_is_thread_saved_exception_pc: __ ld(R31, thread_(saved_exception_pc)); break;
292 default: ShouldNotReachHere();
293 }
294 if (return_pc_location != return_pc_is_pre_saved) {
295 if (return_pc_adjustment != 0) {
296 __ addi(R31, R31, return_pc_adjustment);
297 }
298 __ std(R31, frame_size_in_bytes + _abi(lr), R1_SP);
299 }
300
301 // save all registers (ints and floats)
302 int offset = register_save_offset;
303
304 for (int i = 0; i < regstosave_num; i++) {
305 int reg_num = RegisterSaver_LiveRegs[i].reg_num;
306 int reg_type = RegisterSaver_LiveRegs[i].reg_type;
307
308 switch (reg_type) {
309 case RegisterSaver::int_reg: {
310 if (reg_num < 30) { // We spilled R30-31 right at the beginning.
311 __ std(as_Register(reg_num), offset, R1_SP);
312 }
313 break;
314 }
315 case RegisterSaver::float_reg: {
316 __ stfd(as_FloatRegister(reg_num), offset, R1_SP);
317 break;
318 }
319 case RegisterSaver::special_reg: {
320 if (reg_num == SR_CTR_SpecialRegisterEnumValue) {
321 __ mfctr(R30);
322 __ std(R30, offset, R1_SP);
323 } else {
324 Unimplemented();
325 }
326 break;
327 }
328 default:
329 ShouldNotReachHere();
330 }
331
332 if (generate_oop_map) {
333 map->set_callee_saved(VMRegImpl::stack2reg(offset>>2),
334 RegisterSaver_LiveRegs[i].vmreg);
335 map->set_callee_saved(VMRegImpl::stack2reg((offset + half_reg_size)>>2),
336 RegisterSaver_LiveRegs[i].vmreg->next());
337 }
338 offset += reg_size;
339 }
340
341 for (int i = 0; i < vsregstosave_num; i++) {
342 int reg_num = RegisterSaver_LiveVSRegs[i].reg_num;
343 int reg_type = RegisterSaver_LiveVSRegs[i].reg_type;
344
345 __ li(R30, offset);
346 __ stxvd2x(as_VectorSRegister(reg_num), R30, R1_SP);
347
348 if (generate_oop_map) {
349 map->set_callee_saved(VMRegImpl::stack2reg(offset>>2),
350 RegisterSaver_LiveVSRegs[i].vmreg);
351 }
352 offset += vs_reg_size;
353 }
354
355 assert(offset == frame_size_in_bytes, "consistency check");
356
357 BLOCK_COMMENT("} push_frame_reg_args_and_save_live_registers");
358
359 // And we're done.
360 return map;
361 }
362
363
364 // Pop the current frame and restore all the registers that we
365 // saved.
366 void RegisterSaver::restore_live_registers_and_pop_frame(MacroAssembler* masm,
367 int frame_size_in_bytes,
368 bool restore_ctr,
369 bool save_vectors) {
370 const int regstosave_num = sizeof(RegisterSaver_LiveRegs) /
371 sizeof(RegisterSaver::LiveRegType);
372 const int vsregstosave_num = save_vectors ? (sizeof(RegisterSaver_LiveVSRegs) /
373 sizeof(RegisterSaver::LiveRegType))
374 : 0;
375 const int register_save_size = regstosave_num * reg_size + vsregstosave_num * vs_reg_size;
376
377 const int register_save_offset = frame_size_in_bytes - register_save_size;
378
379 BLOCK_COMMENT("restore_live_registers_and_pop_frame {");
380
381 // restore all registers (ints and floats)
382 int offset = register_save_offset;
383
384 for (int i = 0; i < regstosave_num; i++) {
385 int reg_num = RegisterSaver_LiveRegs[i].reg_num;
386 int reg_type = RegisterSaver_LiveRegs[i].reg_type;
387
388 switch (reg_type) {
389 case RegisterSaver::int_reg: {
390 if (reg_num != 31) // R31 restored at the end, it's the tmp reg!
391 __ ld(as_Register(reg_num), offset, R1_SP);
392 break;
393 }
394 case RegisterSaver::float_reg: {
395 __ lfd(as_FloatRegister(reg_num), offset, R1_SP);
396 break;
397 }
398 case RegisterSaver::special_reg: {
399 if (reg_num == SR_CTR_SpecialRegisterEnumValue) {
400 if (restore_ctr) { // Nothing to do here if ctr already contains the next address.
401 __ ld(R31, offset, R1_SP);
402 __ mtctr(R31);
403 }
404 } else {
405 Unimplemented();
406 }
407 break;
408 }
409 default:
410 ShouldNotReachHere();
411 }
412 offset += reg_size;
413 }
414
415 for (int i = 0; i < vsregstosave_num; i++) {
416 int reg_num = RegisterSaver_LiveVSRegs[i].reg_num;
417 int reg_type = RegisterSaver_LiveVSRegs[i].reg_type;
418
419 __ li(R31, offset);
420 __ lxvd2x(as_VectorSRegister(reg_num), R31, R1_SP);
421
422 offset += vs_reg_size;
423 }
424
425 assert(offset == frame_size_in_bytes, "consistency check");
426
427 // restore link and the flags
428 __ ld(R31, frame_size_in_bytes + _abi(lr), R1_SP);
429 __ mtlr(R31);
430
431 __ ld(R31, frame_size_in_bytes + _abi(cr), R1_SP);
432 __ mtcr(R31);
433
434 // restore scratch register's value
435 __ ld(R31, frame_size_in_bytes - reg_size - vsregstosave_num * vs_reg_size, R1_SP);
436
437 // pop the frame
438 __ addi(R1_SP, R1_SP, frame_size_in_bytes);
439
440 BLOCK_COMMENT("} restore_live_registers_and_pop_frame");
441 }
442
443 void RegisterSaver::push_frame_and_save_argument_registers(MacroAssembler* masm, Register r_temp,
444 int frame_size,int total_args, const VMRegPair *regs,
445 const VMRegPair *regs2) {
446 __ push_frame(frame_size, r_temp);
447 int st_off = frame_size - wordSize;
448 for (int i = 0; i < total_args; i++) {
449 VMReg r_1 = regs[i].first();
450 VMReg r_2 = regs[i].second();
451 if (!r_1->is_valid()) {
452 assert(!r_2->is_valid(), "");
453 continue;
454 }
455 if (r_1->is_Register()) {
456 Register r = r_1->as_Register();
457 __ std(r, st_off, R1_SP);
458 st_off -= wordSize;
459 } else if (r_1->is_FloatRegister()) {
460 FloatRegister f = r_1->as_FloatRegister();
461 __ stfd(f, st_off, R1_SP);
462 st_off -= wordSize;
463 }
464 }
465 if (regs2 != NULL) {
466 for (int i = 0; i < total_args; i++) {
467 VMReg r_1 = regs2[i].first();
468 VMReg r_2 = regs2[i].second();
469 if (!r_1->is_valid()) {
470 assert(!r_2->is_valid(), "");
471 continue;
472 }
473 if (r_1->is_Register()) {
474 Register r = r_1->as_Register();
475 __ std(r, st_off, R1_SP);
476 st_off -= wordSize;
477 } else if (r_1->is_FloatRegister()) {
478 FloatRegister f = r_1->as_FloatRegister();
479 __ stfd(f, st_off, R1_SP);
480 st_off -= wordSize;
481 }
482 }
483 }
484 }
485
486 void RegisterSaver::restore_argument_registers_and_pop_frame(MacroAssembler*masm, int frame_size,
487 int total_args, const VMRegPair *regs,
488 const VMRegPair *regs2) {
489 int st_off = frame_size - wordSize;
490 for (int i = 0; i < total_args; i++) {
491 VMReg r_1 = regs[i].first();
492 VMReg r_2 = regs[i].second();
493 if (r_1->is_Register()) {
494 Register r = r_1->as_Register();
495 __ ld(r, st_off, R1_SP);
496 st_off -= wordSize;
497 } else if (r_1->is_FloatRegister()) {
498 FloatRegister f = r_1->as_FloatRegister();
499 __ lfd(f, st_off, R1_SP);
500 st_off -= wordSize;
501 }
502 }
503 if (regs2 != NULL)
504 for (int i = 0; i < total_args; i++) {
505 VMReg r_1 = regs2[i].first();
506 VMReg r_2 = regs2[i].second();
507 if (r_1->is_Register()) {
508 Register r = r_1->as_Register();
509 __ ld(r, st_off, R1_SP);
510 st_off -= wordSize;
511 } else if (r_1->is_FloatRegister()) {
512 FloatRegister f = r_1->as_FloatRegister();
513 __ lfd(f, st_off, R1_SP);
514 st_off -= wordSize;
515 }
516 }
517 __ pop_frame();
518 }
519
520 // Restore the registers that might be holding a result.
521 void RegisterSaver::restore_result_registers(MacroAssembler* masm, int frame_size_in_bytes) {
522 const int regstosave_num = sizeof(RegisterSaver_LiveRegs) /
523 sizeof(RegisterSaver::LiveRegType);
524 const int register_save_size = regstosave_num * reg_size; // VS registers not relevant here.
525 const int register_save_offset = frame_size_in_bytes - register_save_size;
526
527 // restore all result registers (ints and floats)
528 int offset = register_save_offset;
529 for (int i = 0; i < regstosave_num; i++) {
530 int reg_num = RegisterSaver_LiveRegs[i].reg_num;
531 int reg_type = RegisterSaver_LiveRegs[i].reg_type;
532 switch (reg_type) {
533 case RegisterSaver::int_reg: {
534 if (as_Register(reg_num)==R3_RET) // int result_reg
535 __ ld(as_Register(reg_num), offset, R1_SP);
536 break;
537 }
538 case RegisterSaver::float_reg: {
539 if (as_FloatRegister(reg_num)==F1_RET) // float result_reg
540 __ lfd(as_FloatRegister(reg_num), offset, R1_SP);
541 break;
542 }
543 case RegisterSaver::special_reg: {
544 // Special registers don't hold a result.
545 break;
546 }
547 default:
548 ShouldNotReachHere();
549 }
550 offset += reg_size;
551 }
552
553 assert(offset == frame_size_in_bytes, "consistency check");
554 }
555
556 // Is vector's size (in bytes) bigger than a size saved by default?
557 bool SharedRuntime::is_wide_vector(int size) {
558 // Note, MaxVectorSize == 8/16 on PPC64.
559 assert(size <= (SuperwordUseVSX ? 16 : 8), "%d bytes vectors are not supported", size);
560 return size > 8;
561 }
562
563 size_t SharedRuntime::trampoline_size() {
564 return Assembler::load_const_size + 8;
565 }
566
567 void SharedRuntime::generate_trampoline(MacroAssembler *masm, address destination) {
568 Register Rtemp = R12;
569 __ load_const(Rtemp, destination);
570 __ mtctr(Rtemp);
571 __ bctr();
572 }
573
574 #ifdef COMPILER2
575 static int reg2slot(VMReg r) {
576 return r->reg2stack() + SharedRuntime::out_preserve_stack_slots();
577 }
578
579 static int reg2offset(VMReg r) {
580 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
581 }
582 #endif
583
584 // ---------------------------------------------------------------------------
585 // Read the array of BasicTypes from a signature, and compute where the
586 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
587 // quantities. Values less than VMRegImpl::stack0 are registers, those above
588 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
589 // as framesizes are fixed.
590 // VMRegImpl::stack0 refers to the first slot 0(sp).
591 // and VMRegImpl::stack0+1 refers to the memory word 4-bytes higher. Register
592 // up to RegisterImpl::number_of_registers) are the 64-bit
593 // integer registers.
594
595 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
596 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
597 // units regardless of build. Of course for i486 there is no 64 bit build
598
599 // The Java calling convention is a "shifted" version of the C ABI.
600 // By skipping the first C ABI register we can call non-static jni methods
601 // with small numbers of arguments without having to shuffle the arguments
602 // at all. Since we control the java ABI we ought to at least get some
603 // advantage out of it.
604
605 const VMReg java_iarg_reg[8] = {
606 R3->as_VMReg(),
607 R4->as_VMReg(),
608 R5->as_VMReg(),
609 R6->as_VMReg(),
610 R7->as_VMReg(),
611 R8->as_VMReg(),
612 R9->as_VMReg(),
613 R10->as_VMReg()
614 };
615
616 const VMReg java_farg_reg[13] = {
617 F1->as_VMReg(),
618 F2->as_VMReg(),
619 F3->as_VMReg(),
620 F4->as_VMReg(),
621 F5->as_VMReg(),
622 F6->as_VMReg(),
623 F7->as_VMReg(),
624 F8->as_VMReg(),
625 F9->as_VMReg(),
626 F10->as_VMReg(),
627 F11->as_VMReg(),
628 F12->as_VMReg(),
629 F13->as_VMReg()
630 };
631
632 const int num_java_iarg_registers = sizeof(java_iarg_reg) / sizeof(java_iarg_reg[0]);
633 const int num_java_farg_registers = sizeof(java_farg_reg) / sizeof(java_farg_reg[0]);
634
635 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
636 VMRegPair *regs,
637 int total_args_passed,
638 int is_outgoing) {
639 // C2c calling conventions for compiled-compiled calls.
640 // Put 8 ints/longs into registers _AND_ 13 float/doubles into
641 // registers _AND_ put the rest on the stack.
642
643 const int inc_stk_for_intfloat = 1; // 1 slots for ints and floats
644 const int inc_stk_for_longdouble = 2; // 2 slots for longs and doubles
645
646 int i;
647 VMReg reg;
648 int stk = 0;
649 int ireg = 0;
650 int freg = 0;
651
652 // We put the first 8 arguments into registers and the rest on the
653 // stack, float arguments are already in their argument registers
654 // due to c2c calling conventions (see calling_convention).
655 for (int i = 0; i < total_args_passed; ++i) {
656 switch(sig_bt[i]) {
657 case T_BOOLEAN:
658 case T_CHAR:
659 case T_BYTE:
660 case T_SHORT:
661 case T_INT:
662 if (ireg < num_java_iarg_registers) {
663 // Put int/ptr in register
664 reg = java_iarg_reg[ireg];
665 ++ireg;
666 } else {
667 // Put int/ptr on stack.
668 reg = VMRegImpl::stack2reg(stk);
669 stk += inc_stk_for_intfloat;
670 }
671 regs[i].set1(reg);
672 break;
673 case T_LONG:
674 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "expecting half");
675 if (ireg < num_java_iarg_registers) {
676 // Put long in register.
677 reg = java_iarg_reg[ireg];
678 ++ireg;
679 } else {
680 // Put long on stack. They must be aligned to 2 slots.
681 if (stk & 0x1) ++stk;
682 reg = VMRegImpl::stack2reg(stk);
683 stk += inc_stk_for_longdouble;
684 }
685 regs[i].set2(reg);
686 break;
687 case T_OBJECT:
688 case T_ARRAY:
689 case T_ADDRESS:
690 if (ireg < num_java_iarg_registers) {
691 // Put ptr in register.
692 reg = java_iarg_reg[ireg];
693 ++ireg;
694 } else {
695 // Put ptr on stack. Objects must be aligned to 2 slots too,
696 // because "64-bit pointers record oop-ishness on 2 aligned
697 // adjacent registers." (see OopFlow::build_oop_map).
698 if (stk & 0x1) ++stk;
699 reg = VMRegImpl::stack2reg(stk);
700 stk += inc_stk_for_longdouble;
701 }
702 regs[i].set2(reg);
703 break;
704 case T_FLOAT:
705 if (freg < num_java_farg_registers) {
706 // Put float in register.
707 reg = java_farg_reg[freg];
708 ++freg;
709 } else {
710 // Put float on stack.
711 reg = VMRegImpl::stack2reg(stk);
712 stk += inc_stk_for_intfloat;
713 }
714 regs[i].set1(reg);
715 break;
716 case T_DOUBLE:
717 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "expecting half");
718 if (freg < num_java_farg_registers) {
719 // Put double in register.
720 reg = java_farg_reg[freg];
721 ++freg;
722 } else {
723 // Put double on stack. They must be aligned to 2 slots.
724 if (stk & 0x1) ++stk;
725 reg = VMRegImpl::stack2reg(stk);
726 stk += inc_stk_for_longdouble;
727 }
728 regs[i].set2(reg);
729 break;
730 case T_VOID:
731 // Do not count halves.
732 regs[i].set_bad();
733 break;
734 default:
735 ShouldNotReachHere();
736 }
737 }
738 return align_up(stk, 2);
739 }
740
741 #if defined(COMPILER1) || defined(COMPILER2)
742 // Calling convention for calling C code.
743 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
744 VMRegPair *regs,
745 VMRegPair *regs2,
746 int total_args_passed) {
747 // Calling conventions for C runtime calls and calls to JNI native methods.
748 //
749 // PPC64 convention: Hoist the first 8 int/ptr/long's in the first 8
750 // int regs, leaving int regs undefined if the arg is flt/dbl. Hoist
751 // the first 13 flt/dbl's in the first 13 fp regs but additionally
752 // copy flt/dbl to the stack if they are beyond the 8th argument.
753
754 const VMReg iarg_reg[8] = {
755 R3->as_VMReg(),
756 R4->as_VMReg(),
757 R5->as_VMReg(),
758 R6->as_VMReg(),
759 R7->as_VMReg(),
760 R8->as_VMReg(),
761 R9->as_VMReg(),
762 R10->as_VMReg()
763 };
764
765 const VMReg farg_reg[13] = {
766 F1->as_VMReg(),
767 F2->as_VMReg(),
768 F3->as_VMReg(),
769 F4->as_VMReg(),
770 F5->as_VMReg(),
771 F6->as_VMReg(),
772 F7->as_VMReg(),
773 F8->as_VMReg(),
774 F9->as_VMReg(),
775 F10->as_VMReg(),
776 F11->as_VMReg(),
777 F12->as_VMReg(),
778 F13->as_VMReg()
779 };
780
781 // Check calling conventions consistency.
782 assert(sizeof(iarg_reg) / sizeof(iarg_reg[0]) == Argument::n_int_register_parameters_c &&
783 sizeof(farg_reg) / sizeof(farg_reg[0]) == Argument::n_float_register_parameters_c,
784 "consistency");
785
786 // `Stk' counts stack slots. Due to alignment, 32 bit values occupy
787 // 2 such slots, like 64 bit values do.
788 const int inc_stk_for_intfloat = 2; // 2 slots for ints and floats
789 const int inc_stk_for_longdouble = 2; // 2 slots for longs and doubles
790
791 int i;
792 VMReg reg;
793 // Leave room for C-compatible ABI_REG_ARGS.
794 int stk = (frame::abi_reg_args_size - frame::jit_out_preserve_size) / VMRegImpl::stack_slot_size;
795 int arg = 0;
796 int freg = 0;
797
798 // Avoid passing C arguments in the wrong stack slots.
799 #if defined(ABI_ELFv2)
800 assert((SharedRuntime::out_preserve_stack_slots() + stk) * VMRegImpl::stack_slot_size == 96,
801 "passing C arguments in wrong stack slots");
802 #else
803 assert((SharedRuntime::out_preserve_stack_slots() + stk) * VMRegImpl::stack_slot_size == 112,
804 "passing C arguments in wrong stack slots");
805 #endif
806 // We fill-out regs AND regs2 if an argument must be passed in a
807 // register AND in a stack slot. If regs2 is NULL in such a
808 // situation, we bail-out with a fatal error.
809 for (int i = 0; i < total_args_passed; ++i, ++arg) {
810 // Initialize regs2 to BAD.
811 if (regs2 != NULL) regs2[i].set_bad();
812
813 switch(sig_bt[i]) {
814
815 //
816 // If arguments 0-7 are integers, they are passed in integer registers.
817 // Argument i is placed in iarg_reg[i].
818 //
819 case T_BOOLEAN:
820 case T_CHAR:
821 case T_BYTE:
822 case T_SHORT:
823 case T_INT:
824 // We must cast ints to longs and use full 64 bit stack slots
825 // here. Thus fall through, handle as long.
826 case T_LONG:
827 case T_OBJECT:
828 case T_ARRAY:
829 case T_ADDRESS:
830 case T_METADATA:
831 // Oops are already boxed if required (JNI).
832 if (arg < Argument::n_int_register_parameters_c) {
833 reg = iarg_reg[arg];
834 } else {
835 reg = VMRegImpl::stack2reg(stk);
836 stk += inc_stk_for_longdouble;
837 }
838 regs[i].set2(reg);
839 break;
840
841 //
842 // Floats are treated differently from int regs: The first 13 float arguments
843 // are passed in registers (not the float args among the first 13 args).
844 // Thus argument i is NOT passed in farg_reg[i] if it is float. It is passed
845 // in farg_reg[j] if argument i is the j-th float argument of this call.
846 //
847 case T_FLOAT:
848 #if defined(LINUX)
849 // Linux uses ELF ABI. Both original ELF and ELFv2 ABIs have float
850 // in the least significant word of an argument slot.
851 #if defined(VM_LITTLE_ENDIAN)
852 #define FLOAT_WORD_OFFSET_IN_SLOT 0
853 #else
854 #define FLOAT_WORD_OFFSET_IN_SLOT 1
855 #endif
856 #elif defined(AIX)
857 // Although AIX runs on big endian CPU, float is in the most
858 // significant word of an argument slot.
859 #define FLOAT_WORD_OFFSET_IN_SLOT 0
860 #else
861 #error "unknown OS"
862 #endif
863 if (freg < Argument::n_float_register_parameters_c) {
864 // Put float in register ...
865 reg = farg_reg[freg];
866 ++freg;
867
868 // Argument i for i > 8 is placed on the stack even if it's
869 // placed in a register (if it's a float arg). Aix disassembly
870 // shows that xlC places these float args on the stack AND in
871 // a register. This is not documented, but we follow this
872 // convention, too.
873 if (arg >= Argument::n_regs_not_on_stack_c) {
874 // ... and on the stack.
875 guarantee(regs2 != NULL, "must pass float in register and stack slot");
876 VMReg reg2 = VMRegImpl::stack2reg(stk + FLOAT_WORD_OFFSET_IN_SLOT);
877 regs2[i].set1(reg2);
878 stk += inc_stk_for_intfloat;
879 }
880
881 } else {
882 // Put float on stack.
883 reg = VMRegImpl::stack2reg(stk + FLOAT_WORD_OFFSET_IN_SLOT);
884 stk += inc_stk_for_intfloat;
885 }
886 regs[i].set1(reg);
887 break;
888 case T_DOUBLE:
889 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "expecting half");
890 if (freg < Argument::n_float_register_parameters_c) {
891 // Put double in register ...
892 reg = farg_reg[freg];
893 ++freg;
894
895 // Argument i for i > 8 is placed on the stack even if it's
896 // placed in a register (if it's a double arg). Aix disassembly
897 // shows that xlC places these float args on the stack AND in
898 // a register. This is not documented, but we follow this
899 // convention, too.
900 if (arg >= Argument::n_regs_not_on_stack_c) {
901 // ... and on the stack.
902 guarantee(regs2 != NULL, "must pass float in register and stack slot");
903 VMReg reg2 = VMRegImpl::stack2reg(stk);
904 regs2[i].set2(reg2);
905 stk += inc_stk_for_longdouble;
906 }
907 } else {
908 // Put double on stack.
909 reg = VMRegImpl::stack2reg(stk);
910 stk += inc_stk_for_longdouble;
911 }
912 regs[i].set2(reg);
913 break;
914
915 case T_VOID:
916 // Do not count halves.
917 regs[i].set_bad();
918 --arg;
919 break;
920 default:
921 ShouldNotReachHere();
922 }
923 }
924
925 return align_up(stk, 2);
926 }
927 #endif // COMPILER2
928
929 static address gen_c2i_adapter(MacroAssembler *masm,
930 int total_args_passed,
931 int comp_args_on_stack,
932 const BasicType *sig_bt,
933 const VMRegPair *regs,
934 Label& call_interpreter,
935 const Register& ientry) {
936
937 address c2i_entrypoint;
938
939 const Register sender_SP = R21_sender_SP; // == R21_tmp1
940 const Register code = R22_tmp2;
941 //const Register ientry = R23_tmp3;
942 const Register value_regs[] = { R24_tmp4, R25_tmp5, R26_tmp6 };
943 const int num_value_regs = sizeof(value_regs) / sizeof(Register);
944 int value_regs_index = 0;
945
946 const Register return_pc = R27_tmp7;
947 const Register tmp = R28_tmp8;
948
949 assert_different_registers(sender_SP, code, ientry, return_pc, tmp);
950
951 // Adapter needs TOP_IJAVA_FRAME_ABI.
952 const int adapter_size = frame::top_ijava_frame_abi_size +
953 align_up(total_args_passed * wordSize, frame::alignment_in_bytes);
954
955 // regular (verified) c2i entry point
956 c2i_entrypoint = __ pc();
957
958 // Does compiled code exists? If yes, patch the caller's callsite.
959 __ ld(code, method_(code));
960 __ cmpdi(CCR0, code, 0);
961 __ ld(ientry, method_(interpreter_entry)); // preloaded
962 __ beq(CCR0, call_interpreter);
963
964
965 // Patch caller's callsite, method_(code) was not NULL which means that
966 // compiled code exists.
967 __ mflr(return_pc);
968 __ std(return_pc, _abi(lr), R1_SP);
969 RegisterSaver::push_frame_and_save_argument_registers(masm, tmp, adapter_size, total_args_passed, regs);
970
971 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite), R19_method, return_pc);
972
973 RegisterSaver::restore_argument_registers_and_pop_frame(masm, adapter_size, total_args_passed, regs);
974 __ ld(return_pc, _abi(lr), R1_SP);
975 __ ld(ientry, method_(interpreter_entry)); // preloaded
976 __ mtlr(return_pc);
977
978
979 // Call the interpreter.
980 __ BIND(call_interpreter);
981 __ mtctr(ientry);
982
983 // Get a copy of the current SP for loading caller's arguments.
984 __ mr(sender_SP, R1_SP);
985
986 // Add space for the adapter.
987 __ resize_frame(-adapter_size, R12_scratch2);
988
989 int st_off = adapter_size - wordSize;
990
991 // Write the args into the outgoing interpreter space.
992 for (int i = 0; i < total_args_passed; i++) {
993 VMReg r_1 = regs[i].first();
994 VMReg r_2 = regs[i].second();
995 if (!r_1->is_valid()) {
996 assert(!r_2->is_valid(), "");
997 continue;
998 }
999 if (r_1->is_stack()) {
1000 Register tmp_reg = value_regs[value_regs_index];
1001 value_regs_index = (value_regs_index + 1) % num_value_regs;
1002 // The calling convention produces OptoRegs that ignore the out
1003 // preserve area (JIT's ABI). We must account for it here.
1004 int ld_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
1005 if (!r_2->is_valid()) {
1006 __ lwz(tmp_reg, ld_off, sender_SP);
1007 } else {
1008 __ ld(tmp_reg, ld_off, sender_SP);
1009 }
1010 // Pretend stack targets were loaded into tmp_reg.
1011 r_1 = tmp_reg->as_VMReg();
1012 }
1013
1014 if (r_1->is_Register()) {
1015 Register r = r_1->as_Register();
1016 if (!r_2->is_valid()) {
1017 __ stw(r, st_off, R1_SP);
1018 st_off-=wordSize;
1019 } else {
1020 // Longs are given 2 64-bit slots in the interpreter, but the
1021 // data is passed in only 1 slot.
1022 if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
1023 DEBUG_ONLY( __ li(tmp, 0); __ std(tmp, st_off, R1_SP); )
1024 st_off-=wordSize;
1025 }
1026 __ std(r, st_off, R1_SP);
1027 st_off-=wordSize;
1028 }
1029 } else {
1030 assert(r_1->is_FloatRegister(), "");
1031 FloatRegister f = r_1->as_FloatRegister();
1032 if (!r_2->is_valid()) {
1033 __ stfs(f, st_off, R1_SP);
1034 st_off-=wordSize;
1035 } else {
1036 // In 64bit, doubles are given 2 64-bit slots in the interpreter, but the
1037 // data is passed in only 1 slot.
1038 // One of these should get known junk...
1039 DEBUG_ONLY( __ li(tmp, 0); __ std(tmp, st_off, R1_SP); )
1040 st_off-=wordSize;
1041 __ stfd(f, st_off, R1_SP);
1042 st_off-=wordSize;
1043 }
1044 }
1045 }
1046
1047 // Jump to the interpreter just as if interpreter was doing it.
1048
1049 __ load_const_optimized(R25_templateTableBase, (address)Interpreter::dispatch_table((TosState)0), R11_scratch1);
1050
1051 // load TOS
1052 __ addi(R15_esp, R1_SP, st_off);
1053
1054 // Frame_manager expects initial_caller_sp (= SP without resize by c2i) in R21_tmp1.
1055 assert(sender_SP == R21_sender_SP, "passing initial caller's SP in wrong register");
1056 __ bctr();
1057
1058 return c2i_entrypoint;
1059 }
1060
1061 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
1062 int total_args_passed,
1063 int comp_args_on_stack,
1064 const BasicType *sig_bt,
1065 const VMRegPair *regs) {
1066
1067 // Load method's entry-point from method.
1068 __ ld(R12_scratch2, in_bytes(Method::from_compiled_offset()), R19_method);
1069 __ mtctr(R12_scratch2);
1070
1071 // We will only enter here from an interpreted frame and never from after
1072 // passing thru a c2i. Azul allowed this but we do not. If we lose the
1073 // race and use a c2i we will remain interpreted for the race loser(s).
1074 // This removes all sorts of headaches on the x86 side and also eliminates
1075 // the possibility of having c2i -> i2c -> c2i -> ... endless transitions.
1076
1077 // Note: r13 contains the senderSP on entry. We must preserve it since
1078 // we may do a i2c -> c2i transition if we lose a race where compiled
1079 // code goes non-entrant while we get args ready.
1080 // In addition we use r13 to locate all the interpreter args as
1081 // we must align the stack to 16 bytes on an i2c entry else we
1082 // lose alignment we expect in all compiled code and register
1083 // save code can segv when fxsave instructions find improperly
1084 // aligned stack pointer.
1085
1086 const Register ld_ptr = R15_esp;
1087 const Register value_regs[] = { R22_tmp2, R23_tmp3, R24_tmp4, R25_tmp5, R26_tmp6 };
1088 const int num_value_regs = sizeof(value_regs) / sizeof(Register);
1089 int value_regs_index = 0;
1090
1091 int ld_offset = total_args_passed*wordSize;
1092
1093 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
1094 // in registers, we will occasionally have no stack args.
1095 int comp_words_on_stack = 0;
1096 if (comp_args_on_stack) {
1097 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
1098 // registers are below. By subtracting stack0, we either get a negative
1099 // number (all values in registers) or the maximum stack slot accessed.
1100
1101 // Convert 4-byte c2 stack slots to words.
1102 comp_words_on_stack = align_up(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
1103 // Round up to miminum stack alignment, in wordSize.
1104 comp_words_on_stack = align_up(comp_words_on_stack, 2);
1105 __ resize_frame(-comp_words_on_stack * wordSize, R11_scratch1);
1106 }
1107
1108 // Now generate the shuffle code. Pick up all register args and move the
1109 // rest through register value=Z_R12.
1110 BLOCK_COMMENT("Shuffle arguments");
1111 for (int i = 0; i < total_args_passed; i++) {
1112 if (sig_bt[i] == T_VOID) {
1113 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
1114 continue;
1115 }
1116
1117 // Pick up 0, 1 or 2 words from ld_ptr.
1118 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
1119 "scrambled load targets?");
1120 VMReg r_1 = regs[i].first();
1121 VMReg r_2 = regs[i].second();
1122 if (!r_1->is_valid()) {
1123 assert(!r_2->is_valid(), "");
1124 continue;
1125 }
1126 if (r_1->is_FloatRegister()) {
1127 if (!r_2->is_valid()) {
1128 __ lfs(r_1->as_FloatRegister(), ld_offset, ld_ptr);
1129 ld_offset-=wordSize;
1130 } else {
1131 // Skip the unused interpreter slot.
1132 __ lfd(r_1->as_FloatRegister(), ld_offset-wordSize, ld_ptr);
1133 ld_offset-=2*wordSize;
1134 }
1135 } else {
1136 Register r;
1137 if (r_1->is_stack()) {
1138 // Must do a memory to memory move thru "value".
1139 r = value_regs[value_regs_index];
1140 value_regs_index = (value_regs_index + 1) % num_value_regs;
1141 } else {
1142 r = r_1->as_Register();
1143 }
1144 if (!r_2->is_valid()) {
1145 // Not sure we need to do this but it shouldn't hurt.
1146 if (is_reference_type(sig_bt[i]) || sig_bt[i] == T_ADDRESS) {
1147 __ ld(r, ld_offset, ld_ptr);
1148 ld_offset-=wordSize;
1149 } else {
1150 __ lwz(r, ld_offset, ld_ptr);
1151 ld_offset-=wordSize;
1152 }
1153 } else {
1154 // In 64bit, longs are given 2 64-bit slots in the interpreter, but the
1155 // data is passed in only 1 slot.
1156 if (sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
1157 ld_offset-=wordSize;
1158 }
1159 __ ld(r, ld_offset, ld_ptr);
1160 ld_offset-=wordSize;
1161 }
1162
1163 if (r_1->is_stack()) {
1164 // Now store value where the compiler expects it
1165 int st_off = (r_1->reg2stack() + SharedRuntime::out_preserve_stack_slots())*VMRegImpl::stack_slot_size;
1166
1167 if (sig_bt[i] == T_INT || sig_bt[i] == T_FLOAT ||sig_bt[i] == T_BOOLEAN ||
1168 sig_bt[i] == T_SHORT || sig_bt[i] == T_CHAR || sig_bt[i] == T_BYTE) {
1169 __ stw(r, st_off, R1_SP);
1170 } else {
1171 __ std(r, st_off, R1_SP);
1172 }
1173 }
1174 }
1175 }
1176
1177 BLOCK_COMMENT("Store method");
1178 // Store method into thread->callee_target.
1179 // We might end up in handle_wrong_method if the callee is
1180 // deoptimized as we race thru here. If that happens we don't want
1181 // to take a safepoint because the caller frame will look
1182 // interpreted and arguments are now "compiled" so it is much better
1183 // to make this transition invisible to the stack walking
1184 // code. Unfortunately if we try and find the callee by normal means
1185 // a safepoint is possible. So we stash the desired callee in the
1186 // thread and the vm will find there should this case occur.
1187 __ std(R19_method, thread_(callee_target));
1188
1189 // Jump to the compiled code just as if compiled code was doing it.
1190 __ bctr();
1191 }
1192
1193 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
1194 int total_args_passed,
1195 int comp_args_on_stack,
1196 const BasicType *sig_bt,
1197 const VMRegPair *regs,
1198 AdapterFingerPrint* fingerprint) {
1199 address i2c_entry;
1200 address c2i_unverified_entry;
1201 address c2i_entry;
1202
1203
1204 // entry: i2c
1205
1206 __ align(CodeEntryAlignment);
1207 i2c_entry = __ pc();
1208 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
1209
1210
1211 // entry: c2i unverified
1212
1213 __ align(CodeEntryAlignment);
1214 BLOCK_COMMENT("c2i unverified entry");
1215 c2i_unverified_entry = __ pc();
1216
1217 // inline_cache contains a compiledICHolder
1218 const Register ic = R19_method;
1219 const Register ic_klass = R11_scratch1;
1220 const Register receiver_klass = R12_scratch2;
1221 const Register code = R21_tmp1;
1222 const Register ientry = R23_tmp3;
1223
1224 assert_different_registers(ic, ic_klass, receiver_klass, R3_ARG1, code, ientry);
1225 assert(R11_scratch1 == R11, "need prologue scratch register");
1226
1227 Label call_interpreter;
1228
1229 assert(!MacroAssembler::needs_explicit_null_check(oopDesc::klass_offset_in_bytes()),
1230 "klass offset should reach into any page");
1231 // Check for NULL argument if we don't have implicit null checks.
1232 if (!ImplicitNullChecks || !os::zero_page_read_protected()) {
1233 if (TrapBasedNullChecks) {
1234 __ trap_null_check(R3_ARG1);
1235 } else {
1236 Label valid;
1237 __ cmpdi(CCR0, R3_ARG1, 0);
1238 __ bne_predict_taken(CCR0, valid);
1239 // We have a null argument, branch to ic_miss_stub.
1240 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(),
1241 relocInfo::runtime_call_type);
1242 __ BIND(valid);
1243 }
1244 }
1245 // Assume argument is not NULL, load klass from receiver.
1246 __ load_klass(receiver_klass, R3_ARG1);
1247
1248 __ ld(ic_klass, CompiledICHolder::holder_klass_offset(), ic);
1249
1250 if (TrapBasedICMissChecks) {
1251 __ trap_ic_miss_check(receiver_klass, ic_klass);
1252 } else {
1253 Label valid;
1254 __ cmpd(CCR0, receiver_klass, ic_klass);
1255 __ beq_predict_taken(CCR0, valid);
1256 // We have an unexpected klass, branch to ic_miss_stub.
1257 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(),
1258 relocInfo::runtime_call_type);
1259 __ BIND(valid);
1260 }
1261
1262 // Argument is valid and klass is as expected, continue.
1263
1264 // Extract method from inline cache, verified entry point needs it.
1265 __ ld(R19_method, CompiledICHolder::holder_metadata_offset(), ic);
1266 assert(R19_method == ic, "the inline cache register is dead here");
1267
1268 __ ld(code, method_(code));
1269 __ cmpdi(CCR0, code, 0);
1270 __ ld(ientry, method_(interpreter_entry)); // preloaded
1271 __ beq_predict_taken(CCR0, call_interpreter);
1272
1273 // Branch to ic_miss_stub.
1274 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(), relocInfo::runtime_call_type);
1275
1276 // entry: c2i
1277
1278 c2i_entry = __ pc();
1279
1280 // Class initialization barrier for static methods
1281 address c2i_no_clinit_check_entry = NULL;
1282 if (VM_Version::supports_fast_class_init_checks()) {
1283 Label L_skip_barrier;
1284
1285 { // Bypass the barrier for non-static methods
1286 __ lwz(R0, in_bytes(Method::access_flags_offset()), R19_method);
1287 __ andi_(R0, R0, JVM_ACC_STATIC);
1288 __ beq(CCR0, L_skip_barrier); // non-static
1289 }
1290
1291 Register klass = R11_scratch1;
1292 __ load_method_holder(klass, R19_method);
1293 __ clinit_barrier(klass, R16_thread, &L_skip_barrier /*L_fast_path*/);
1294
1295 __ load_const_optimized(klass, SharedRuntime::get_handle_wrong_method_stub(), R0);
1296 __ mtctr(klass);
1297 __ bctr();
1298
1299 __ bind(L_skip_barrier);
1300 c2i_no_clinit_check_entry = __ pc();
1301 }
1302
1303 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, call_interpreter, ientry);
1304
1305 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry, c2i_no_clinit_check_entry);
1306 }
1307
1308 #ifdef COMPILER2
1309 // An oop arg. Must pass a handle not the oop itself.
1310 static void object_move(MacroAssembler* masm,
1311 int frame_size_in_slots,
1312 OopMap* oop_map, int oop_handle_offset,
1313 bool is_receiver, int* receiver_offset,
1314 VMRegPair src, VMRegPair dst,
1315 Register r_caller_sp, Register r_temp_1, Register r_temp_2) {
1316 assert(!is_receiver || (is_receiver && (*receiver_offset == -1)),
1317 "receiver has already been moved");
1318
1319 // We must pass a handle. First figure out the location we use as a handle.
1320
1321 if (src.first()->is_stack()) {
1322 // stack to stack or reg
1323
1324 const Register r_handle = dst.first()->is_stack() ? r_temp_1 : dst.first()->as_Register();
1325 Label skip;
1326 const int oop_slot_in_callers_frame = reg2slot(src.first());
1327
1328 guarantee(!is_receiver, "expecting receiver in register");
1329 oop_map->set_oop(VMRegImpl::stack2reg(oop_slot_in_callers_frame + frame_size_in_slots));
1330
1331 __ addi(r_handle, r_caller_sp, reg2offset(src.first()));
1332 __ ld( r_temp_2, reg2offset(src.first()), r_caller_sp);
1333 __ cmpdi(CCR0, r_temp_2, 0);
1334 __ bne(CCR0, skip);
1335 // Use a NULL handle if oop is NULL.
1336 __ li(r_handle, 0);
1337 __ bind(skip);
1338
1339 if (dst.first()->is_stack()) {
1340 // stack to stack
1341 __ std(r_handle, reg2offset(dst.first()), R1_SP);
1342 } else {
1343 // stack to reg
1344 // Nothing to do, r_handle is already the dst register.
1345 }
1346 } else {
1347 // reg to stack or reg
1348 const Register r_oop = src.first()->as_Register();
1349 const Register r_handle = dst.first()->is_stack() ? r_temp_1 : dst.first()->as_Register();
1350 const int oop_slot = (r_oop->encoding()-R3_ARG1->encoding()) * VMRegImpl::slots_per_word
1351 + oop_handle_offset; // in slots
1352 const int oop_offset = oop_slot * VMRegImpl::stack_slot_size;
1353 Label skip;
1354
1355 if (is_receiver) {
1356 *receiver_offset = oop_offset;
1357 }
1358 oop_map->set_oop(VMRegImpl::stack2reg(oop_slot));
1359
1360 __ std( r_oop, oop_offset, R1_SP);
1361 __ addi(r_handle, R1_SP, oop_offset);
1362
1363 __ cmpdi(CCR0, r_oop, 0);
1364 __ bne(CCR0, skip);
1365 // Use a NULL handle if oop is NULL.
1366 __ li(r_handle, 0);
1367 __ bind(skip);
1368
1369 if (dst.first()->is_stack()) {
1370 // reg to stack
1371 __ std(r_handle, reg2offset(dst.first()), R1_SP);
1372 } else {
1373 // reg to reg
1374 // Nothing to do, r_handle is already the dst register.
1375 }
1376 }
1377 }
1378
1379 static void int_move(MacroAssembler*masm,
1380 VMRegPair src, VMRegPair dst,
1381 Register r_caller_sp, Register r_temp) {
1382 assert(src.first()->is_valid(), "incoming must be int");
1383 assert(dst.first()->is_valid() && dst.second() == dst.first()->next(), "outgoing must be long");
1384
1385 if (src.first()->is_stack()) {
1386 if (dst.first()->is_stack()) {
1387 // stack to stack
1388 __ lwa(r_temp, reg2offset(src.first()), r_caller_sp);
1389 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1390 } else {
1391 // stack to reg
1392 __ lwa(dst.first()->as_Register(), reg2offset(src.first()), r_caller_sp);
1393 }
1394 } else if (dst.first()->is_stack()) {
1395 // reg to stack
1396 __ extsw(r_temp, src.first()->as_Register());
1397 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1398 } else {
1399 // reg to reg
1400 __ extsw(dst.first()->as_Register(), src.first()->as_Register());
1401 }
1402 }
1403
1404 static void long_move(MacroAssembler*masm,
1405 VMRegPair src, VMRegPair dst,
1406 Register r_caller_sp, Register r_temp) {
1407 assert(src.first()->is_valid() && src.second() == src.first()->next(), "incoming must be long");
1408 assert(dst.first()->is_valid() && dst.second() == dst.first()->next(), "outgoing must be long");
1409
1410 if (src.first()->is_stack()) {
1411 if (dst.first()->is_stack()) {
1412 // stack to stack
1413 __ ld( r_temp, reg2offset(src.first()), r_caller_sp);
1414 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1415 } else {
1416 // stack to reg
1417 __ ld(dst.first()->as_Register(), reg2offset(src.first()), r_caller_sp);
1418 }
1419 } else if (dst.first()->is_stack()) {
1420 // reg to stack
1421 __ std(src.first()->as_Register(), reg2offset(dst.first()), R1_SP);
1422 } else {
1423 // reg to reg
1424 if (dst.first()->as_Register() != src.first()->as_Register())
1425 __ mr(dst.first()->as_Register(), src.first()->as_Register());
1426 }
1427 }
1428
1429 static void float_move(MacroAssembler*masm,
1430 VMRegPair src, VMRegPair dst,
1431 Register r_caller_sp, Register r_temp) {
1432 assert(src.first()->is_valid() && !src.second()->is_valid(), "incoming must be float");
1433 assert(dst.first()->is_valid() && !dst.second()->is_valid(), "outgoing must be float");
1434
1435 if (src.first()->is_stack()) {
1436 if (dst.first()->is_stack()) {
1437 // stack to stack
1438 __ lwz(r_temp, reg2offset(src.first()), r_caller_sp);
1439 __ stw(r_temp, reg2offset(dst.first()), R1_SP);
1440 } else {
1441 // stack to reg
1442 __ lfs(dst.first()->as_FloatRegister(), reg2offset(src.first()), r_caller_sp);
1443 }
1444 } else if (dst.first()->is_stack()) {
1445 // reg to stack
1446 __ stfs(src.first()->as_FloatRegister(), reg2offset(dst.first()), R1_SP);
1447 } else {
1448 // reg to reg
1449 if (dst.first()->as_FloatRegister() != src.first()->as_FloatRegister())
1450 __ fmr(dst.first()->as_FloatRegister(), src.first()->as_FloatRegister());
1451 }
1452 }
1453
1454 static void double_move(MacroAssembler*masm,
1455 VMRegPair src, VMRegPair dst,
1456 Register r_caller_sp, Register r_temp) {
1457 assert(src.first()->is_valid() && src.second() == src.first()->next(), "incoming must be double");
1458 assert(dst.first()->is_valid() && dst.second() == dst.first()->next(), "outgoing must be double");
1459
1460 if (src.first()->is_stack()) {
1461 if (dst.first()->is_stack()) {
1462 // stack to stack
1463 __ ld( r_temp, reg2offset(src.first()), r_caller_sp);
1464 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1465 } else {
1466 // stack to reg
1467 __ lfd(dst.first()->as_FloatRegister(), reg2offset(src.first()), r_caller_sp);
1468 }
1469 } else if (dst.first()->is_stack()) {
1470 // reg to stack
1471 __ stfd(src.first()->as_FloatRegister(), reg2offset(dst.first()), R1_SP);
1472 } else {
1473 // reg to reg
1474 if (dst.first()->as_FloatRegister() != src.first()->as_FloatRegister())
1475 __ fmr(dst.first()->as_FloatRegister(), src.first()->as_FloatRegister());
1476 }
1477 }
1478
1479 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1480 switch (ret_type) {
1481 case T_BOOLEAN:
1482 case T_CHAR:
1483 case T_BYTE:
1484 case T_SHORT:
1485 case T_INT:
1486 __ stw (R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1487 break;
1488 case T_ARRAY:
1489 case T_OBJECT:
1490 case T_LONG:
1491 __ std (R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1492 break;
1493 case T_FLOAT:
1494 __ stfs(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1495 break;
1496 case T_DOUBLE:
1497 __ stfd(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1498 break;
1499 case T_VOID:
1500 break;
1501 default:
1502 ShouldNotReachHere();
1503 break;
1504 }
1505 }
1506
1507 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1508 switch (ret_type) {
1509 case T_BOOLEAN:
1510 case T_CHAR:
1511 case T_BYTE:
1512 case T_SHORT:
1513 case T_INT:
1514 __ lwz(R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1515 break;
1516 case T_ARRAY:
1517 case T_OBJECT:
1518 case T_LONG:
1519 __ ld (R3_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1520 break;
1521 case T_FLOAT:
1522 __ lfs(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1523 break;
1524 case T_DOUBLE:
1525 __ lfd(F1_RET, frame_slots*VMRegImpl::stack_slot_size, R1_SP);
1526 break;
1527 case T_VOID:
1528 break;
1529 default:
1530 ShouldNotReachHere();
1531 break;
1532 }
1533 }
1534
1535 static void save_or_restore_arguments(MacroAssembler* masm,
1536 const int stack_slots,
1537 const int total_in_args,
1538 const int arg_save_area,
1539 OopMap* map,
1540 VMRegPair* in_regs,
1541 BasicType* in_sig_bt) {
1542 // If map is non-NULL then the code should store the values,
1543 // otherwise it should load them.
1544 int slot = arg_save_area;
1545 // Save down double word first.
1546 for (int i = 0; i < total_in_args; i++) {
1547 if (in_regs[i].first()->is_FloatRegister() && in_sig_bt[i] == T_DOUBLE) {
1548 int offset = slot * VMRegImpl::stack_slot_size;
1549 slot += VMRegImpl::slots_per_word;
1550 assert(slot <= stack_slots, "overflow (after DOUBLE stack slot)");
1551 if (map != NULL) {
1552 __ stfd(in_regs[i].first()->as_FloatRegister(), offset, R1_SP);
1553 } else {
1554 __ lfd(in_regs[i].first()->as_FloatRegister(), offset, R1_SP);
1555 }
1556 } else if (in_regs[i].first()->is_Register() &&
1557 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) {
1558 int offset = slot * VMRegImpl::stack_slot_size;
1559 if (map != NULL) {
1560 __ std(in_regs[i].first()->as_Register(), offset, R1_SP);
1561 if (in_sig_bt[i] == T_ARRAY) {
1562 map->set_oop(VMRegImpl::stack2reg(slot));
1563 }
1564 } else {
1565 __ ld(in_regs[i].first()->as_Register(), offset, R1_SP);
1566 }
1567 slot += VMRegImpl::slots_per_word;
1568 assert(slot <= stack_slots, "overflow (after LONG/ARRAY stack slot)");
1569 }
1570 }
1571 // Save or restore single word registers.
1572 for (int i = 0; i < total_in_args; i++) {
1573 if (in_regs[i].first()->is_Register()) {
1574 int offset = slot * VMRegImpl::stack_slot_size;
1575 // Value lives in an input register. Save it on stack.
1576 switch (in_sig_bt[i]) {
1577 case T_BOOLEAN:
1578 case T_CHAR:
1579 case T_BYTE:
1580 case T_SHORT:
1581 case T_INT:
1582 if (map != NULL) {
1583 __ stw(in_regs[i].first()->as_Register(), offset, R1_SP);
1584 } else {
1585 __ lwa(in_regs[i].first()->as_Register(), offset, R1_SP);
1586 }
1587 slot++;
1588 assert(slot <= stack_slots, "overflow (after INT or smaller stack slot)");
1589 break;
1590 case T_ARRAY:
1591 case T_LONG:
1592 // handled above
1593 break;
1594 case T_OBJECT:
1595 default: ShouldNotReachHere();
1596 }
1597 } else if (in_regs[i].first()->is_FloatRegister()) {
1598 if (in_sig_bt[i] == T_FLOAT) {
1599 int offset = slot * VMRegImpl::stack_slot_size;
1600 slot++;
1601 assert(slot <= stack_slots, "overflow (after FLOAT stack slot)");
1602 if (map != NULL) {
1603 __ stfs(in_regs[i].first()->as_FloatRegister(), offset, R1_SP);
1604 } else {
1605 __ lfs(in_regs[i].first()->as_FloatRegister(), offset, R1_SP);
1606 }
1607 }
1608 } else if (in_regs[i].first()->is_stack()) {
1609 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1610 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1611 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1612 }
1613 }
1614 }
1615 }
1616
1617 // Check GCLocker::needs_gc and enter the runtime if it's true. This
1618 // keeps a new JNI critical region from starting until a GC has been
1619 // forced. Save down any oops in registers and describe them in an
1620 // OopMap.
1621 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1622 const int stack_slots,
1623 const int total_in_args,
1624 const int arg_save_area,
1625 OopMapSet* oop_maps,
1626 VMRegPair* in_regs,
1627 BasicType* in_sig_bt,
1628 Register tmp_reg ) {
1629 __ block_comment("check GCLocker::needs_gc");
1630 Label cont;
1631 __ lbz(tmp_reg, (RegisterOrConstant)(intptr_t)GCLocker::needs_gc_address());
1632 __ cmplwi(CCR0, tmp_reg, 0);
1633 __ beq(CCR0, cont);
1634
1635 // Save down any values that are live in registers and call into the
1636 // runtime to halt for a GC.
1637 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1638 save_or_restore_arguments(masm, stack_slots, total_in_args,
1639 arg_save_area, map, in_regs, in_sig_bt);
1640
1641 __ mr(R3_ARG1, R16_thread);
1642 __ set_last_Java_frame(R1_SP, noreg);
1643
1644 __ block_comment("block_for_jni_critical");
1645 address entry_point = CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical);
1646 #if defined(ABI_ELFv2)
1647 __ call_c(entry_point, relocInfo::runtime_call_type);
1648 #else
1649 __ call_c(CAST_FROM_FN_PTR(FunctionDescriptor*, entry_point), relocInfo::runtime_call_type);
1650 #endif
1651 address start = __ pc() - __ offset(),
1652 calls_return_pc = __ last_calls_return_pc();
1653 oop_maps->add_gc_map(calls_return_pc - start, map);
1654
1655 __ reset_last_Java_frame();
1656
1657 // Reload all the register arguments.
1658 save_or_restore_arguments(masm, stack_slots, total_in_args,
1659 arg_save_area, NULL, in_regs, in_sig_bt);
1660
1661 __ BIND(cont);
1662
1663 #ifdef ASSERT
1664 if (StressCriticalJNINatives) {
1665 // Stress register saving.
1666 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1667 save_or_restore_arguments(masm, stack_slots, total_in_args,
1668 arg_save_area, map, in_regs, in_sig_bt);
1669 // Destroy argument registers.
1670 for (int i = 0; i < total_in_args; i++) {
1671 if (in_regs[i].first()->is_Register()) {
1672 const Register reg = in_regs[i].first()->as_Register();
1673 __ neg(reg, reg);
1674 } else if (in_regs[i].first()->is_FloatRegister()) {
1675 __ fneg(in_regs[i].first()->as_FloatRegister(), in_regs[i].first()->as_FloatRegister());
1676 }
1677 }
1678
1679 save_or_restore_arguments(masm, stack_slots, total_in_args,
1680 arg_save_area, NULL, in_regs, in_sig_bt);
1681 }
1682 #endif
1683 }
1684
1685 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst, Register r_caller_sp, Register r_temp) {
1686 if (src.first()->is_stack()) {
1687 if (dst.first()->is_stack()) {
1688 // stack to stack
1689 __ ld(r_temp, reg2offset(src.first()), r_caller_sp);
1690 __ std(r_temp, reg2offset(dst.first()), R1_SP);
1691 } else {
1692 // stack to reg
1693 __ ld(dst.first()->as_Register(), reg2offset(src.first()), r_caller_sp);
1694 }
1695 } else if (dst.first()->is_stack()) {
1696 // reg to stack
1697 __ std(src.first()->as_Register(), reg2offset(dst.first()), R1_SP);
1698 } else {
1699 if (dst.first() != src.first()) {
1700 __ mr(dst.first()->as_Register(), src.first()->as_Register());
1701 }
1702 }
1703 }
1704
1705 // Unpack an array argument into a pointer to the body and the length
1706 // if the array is non-null, otherwise pass 0 for both.
1707 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type,
1708 VMRegPair body_arg, VMRegPair length_arg, Register r_caller_sp,
1709 Register tmp_reg, Register tmp2_reg) {
1710 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1711 "possible collision");
1712 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1713 "possible collision");
1714
1715 // Pass the length, ptr pair.
1716 Label set_out_args;
1717 VMRegPair tmp, tmp2;
1718 tmp.set_ptr(tmp_reg->as_VMReg());
1719 tmp2.set_ptr(tmp2_reg->as_VMReg());
1720 if (reg.first()->is_stack()) {
1721 // Load the arg up from the stack.
1722 move_ptr(masm, reg, tmp, r_caller_sp, /*unused*/ R0);
1723 reg = tmp;
1724 }
1725 __ li(tmp2_reg, 0); // Pass zeros if Array=null.
1726 if (tmp_reg != reg.first()->as_Register()) __ li(tmp_reg, 0);
1727 __ cmpdi(CCR0, reg.first()->as_Register(), 0);
1728 __ beq(CCR0, set_out_args);
1729 __ lwa(tmp2_reg, arrayOopDesc::length_offset_in_bytes(), reg.first()->as_Register());
1730 __ addi(tmp_reg, reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type));
1731 __ bind(set_out_args);
1732 move_ptr(masm, tmp, body_arg, r_caller_sp, /*unused*/ R0);
1733 move_ptr(masm, tmp2, length_arg, r_caller_sp, /*unused*/ R0); // Same as move32_64 on PPC64.
1734 }
1735
1736 static void verify_oop_args(MacroAssembler* masm,
1737 const methodHandle& method,
1738 const BasicType* sig_bt,
1739 const VMRegPair* regs) {
1740 Register temp_reg = R19_method; // not part of any compiled calling seq
1741 if (VerifyOops) {
1742 for (int i = 0; i < method->size_of_parameters(); i++) {
1743 if (is_reference_type(sig_bt[i])) {
1744 VMReg r = regs[i].first();
1745 assert(r->is_valid(), "bad oop arg");
1746 if (r->is_stack()) {
1747 __ ld(temp_reg, reg2offset(r), R1_SP);
1748 __ verify_oop(temp_reg);
1749 } else {
1750 __ verify_oop(r->as_Register());
1751 }
1752 }
1753 }
1754 }
1755 }
1756
1757 static void gen_special_dispatch(MacroAssembler* masm,
1758 const methodHandle& method,
1759 const BasicType* sig_bt,
1760 const VMRegPair* regs) {
1761 verify_oop_args(masm, method, sig_bt, regs);
1762 vmIntrinsics::ID iid = method->intrinsic_id();
1763
1764 // Now write the args into the outgoing interpreter space
1765 bool has_receiver = false;
1766 Register receiver_reg = noreg;
1767 int member_arg_pos = -1;
1768 Register member_reg = noreg;
1769 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1770 if (ref_kind != 0) {
1771 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1772 member_reg = R19_method; // known to be free at this point
1773 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1774 } else if (iid == vmIntrinsics::_invokeBasic) {
1775 has_receiver = true;
1776 } else {
1777 fatal("unexpected intrinsic id %d", iid);
1778 }
1779
1780 if (member_reg != noreg) {
1781 // Load the member_arg into register, if necessary.
1782 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1783 VMReg r = regs[member_arg_pos].first();
1784 if (r->is_stack()) {
1785 __ ld(member_reg, reg2offset(r), R1_SP);
1786 } else {
1787 // no data motion is needed
1788 member_reg = r->as_Register();
1789 }
1790 }
1791
1792 if (has_receiver) {
1793 // Make sure the receiver is loaded into a register.
1794 assert(method->size_of_parameters() > 0, "oob");
1795 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1796 VMReg r = regs[0].first();
1797 assert(r->is_valid(), "bad receiver arg");
1798 if (r->is_stack()) {
1799 // Porting note: This assumes that compiled calling conventions always
1800 // pass the receiver oop in a register. If this is not true on some
1801 // platform, pick a temp and load the receiver from stack.
1802 fatal("receiver always in a register");
1803 receiver_reg = R11_scratch1; // TODO (hs24): is R11_scratch1 really free at this point?
1804 __ ld(receiver_reg, reg2offset(r), R1_SP);
1805 } else {
1806 // no data motion is needed
1807 receiver_reg = r->as_Register();
1808 }
1809 }
1810
1811 // Figure out which address we are really jumping to:
1812 MethodHandles::generate_method_handle_dispatch(masm, iid,
1813 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1814 }
1815
1816 #endif // COMPILER2
1817
1818 // ---------------------------------------------------------------------------
1819 // Generate a native wrapper for a given method. The method takes arguments
1820 // in the Java compiled code convention, marshals them to the native
1821 // convention (handlizes oops, etc), transitions to native, makes the call,
1822 // returns to java state (possibly blocking), unhandlizes any result and
1823 // returns.
1824 //
1825 // Critical native functions are a shorthand for the use of
1826 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1827 // functions. The wrapper is expected to unpack the arguments before
1828 // passing them to the callee and perform checks before and after the
1829 // native call to ensure that they GCLocker
1830 // lock_critical/unlock_critical semantics are followed. Some other
1831 // parts of JNI setup are skipped like the tear down of the JNI handle
1832 // block and the check for pending exceptions it's impossible for them
1833 // to be thrown.
1834 //
1835 // They are roughly structured like this:
1836 // if (GCLocker::needs_gc())
1837 // SharedRuntime::block_for_jni_critical();
1838 // tranistion to thread_in_native
1839 // unpack arrray arguments and call native entry point
1840 // check for safepoint in progress
1841 // check if any thread suspend flags are set
1842 // call into JVM and possible unlock the JNI critical
1843 // if a GC was suppressed while in the critical native.
1844 // transition back to thread_in_Java
1845 // return to caller
1846 //
1847 nmethod *SharedRuntime::generate_native_wrapper(MacroAssembler *masm,
1848 const methodHandle& method,
1849 int compile_id,
1850 BasicType *in_sig_bt,
1851 VMRegPair *in_regs,
1852 BasicType ret_type,
1853 address critical_entry) {
1854 #ifdef COMPILER2
1855 if (method->is_method_handle_intrinsic()) {
1856 vmIntrinsics::ID iid = method->intrinsic_id();
1857 intptr_t start = (intptr_t)__ pc();
1858 int vep_offset = ((intptr_t)__ pc()) - start;
1859 gen_special_dispatch(masm,
1860 method,
1861 in_sig_bt,
1862 in_regs);
1863 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1864 __ flush();
1865 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1866 return nmethod::new_native_nmethod(method,
1867 compile_id,
1868 masm->code(),
1869 vep_offset,
1870 frame_complete,
1871 stack_slots / VMRegImpl::slots_per_word,
1872 in_ByteSize(-1),
1873 in_ByteSize(-1),
1874 (OopMapSet*)NULL);
1875 }
1876
1877 bool is_critical_native = true;
1878 address native_func = critical_entry;
1879 if (native_func == NULL) {
1880 native_func = method->native_function();
1881 is_critical_native = false;
1882 }
1883 assert(native_func != NULL, "must have function");
1884
1885 // First, create signature for outgoing C call
1886 // --------------------------------------------------------------------------
1887
1888 int total_in_args = method->size_of_parameters();
1889 // We have received a description of where all the java args are located
1890 // on entry to the wrapper. We need to convert these args to where
1891 // the jni function will expect them. To figure out where they go
1892 // we convert the java signature to a C signature by inserting
1893 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1894
1895 // Calculate the total number of C arguments and create arrays for the
1896 // signature and the outgoing registers.
1897 // On ppc64, we have two arrays for the outgoing registers, because
1898 // some floating-point arguments must be passed in registers _and_
1899 // in stack locations.
1900 bool method_is_static = method->is_static();
1901 int total_c_args = total_in_args;
1902
1903 if (!is_critical_native) {
1904 int n_hidden_args = method_is_static ? 2 : 1;
1905 total_c_args += n_hidden_args;
1906 } else {
1907 // No JNIEnv*, no this*, but unpacked arrays (base+length).
1908 for (int i = 0; i < total_in_args; i++) {
1909 if (in_sig_bt[i] == T_ARRAY) {
1910 total_c_args++;
1911 }
1912 }
1913 }
1914
1915 BasicType *out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1916 VMRegPair *out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1917 VMRegPair *out_regs2 = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1918 BasicType* in_elem_bt = NULL;
1919
1920 // Create the signature for the C call:
1921 // 1) add the JNIEnv*
1922 // 2) add the class if the method is static
1923 // 3) copy the rest of the incoming signature (shifted by the number of
1924 // hidden arguments).
1925
1926 int argc = 0;
1927 if (!is_critical_native) {
1928 out_sig_bt[argc++] = T_ADDRESS;
1929 if (method->is_static()) {
1930 out_sig_bt[argc++] = T_OBJECT;
1931 }
1932
1933 for (int i = 0; i < total_in_args ; i++ ) {
1934 out_sig_bt[argc++] = in_sig_bt[i];
1935 }
1936 } else {
1937 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1938 SignatureStream ss(method->signature());
1939 int o = 0;
1940 for (int i = 0; i < total_in_args ; i++, o++) {
1941 if (in_sig_bt[i] == T_ARRAY) {
1942 // Arrays are passed as int, elem* pair
1943 Symbol* atype = ss.as_symbol();
1944 const char* at = atype->as_C_string();
1945 if (strlen(at) == 2) {
1946 assert(at[0] == '[', "must be");
1947 switch (at[1]) {
1948 case 'B': in_elem_bt[o] = T_BYTE; break;
1949 case 'C': in_elem_bt[o] = T_CHAR; break;
1950 case 'D': in_elem_bt[o] = T_DOUBLE; break;
1951 case 'F': in_elem_bt[o] = T_FLOAT; break;
1952 case 'I': in_elem_bt[o] = T_INT; break;
1953 case 'J': in_elem_bt[o] = T_LONG; break;
1954 case 'S': in_elem_bt[o] = T_SHORT; break;
1955 case 'Z': in_elem_bt[o] = T_BOOLEAN; break;
1956 default: ShouldNotReachHere();
1957 }
1958 }
1959 } else {
1960 in_elem_bt[o] = T_VOID;
1961 }
1962 if (in_sig_bt[i] != T_VOID) {
1963 assert(in_sig_bt[i] == ss.type(), "must match");
1964 ss.next();
1965 }
1966 }
1967
1968 for (int i = 0; i < total_in_args ; i++ ) {
1969 if (in_sig_bt[i] == T_ARRAY) {
1970 // Arrays are passed as int, elem* pair.
1971 out_sig_bt[argc++] = T_INT;
1972 out_sig_bt[argc++] = T_ADDRESS;
1973 } else {
1974 out_sig_bt[argc++] = in_sig_bt[i];
1975 }
1976 }
1977 }
1978
1979
1980 // Compute the wrapper's frame size.
1981 // --------------------------------------------------------------------------
1982
1983 // Now figure out where the args must be stored and how much stack space
1984 // they require.
1985 //
1986 // Compute framesize for the wrapper. We need to handlize all oops in
1987 // incoming registers.
1988 //
1989 // Calculate the total number of stack slots we will need:
1990 // 1) abi requirements
1991 // 2) outgoing arguments
1992 // 3) space for inbound oop handle area
1993 // 4) space for handlizing a klass if static method
1994 // 5) space for a lock if synchronized method
1995 // 6) workspace for saving return values, int <-> float reg moves, etc.
1996 // 7) alignment
1997 //
1998 // Layout of the native wrapper frame:
1999 // (stack grows upwards, memory grows downwards)
2000 //
2001 // NW [ABI_REG_ARGS] <-- 1) R1_SP
2002 // [outgoing arguments] <-- 2) R1_SP + out_arg_slot_offset
2003 // [oopHandle area] <-- 3) R1_SP + oop_handle_offset (save area for critical natives)
2004 // klass <-- 4) R1_SP + klass_offset
2005 // lock <-- 5) R1_SP + lock_offset
2006 // [workspace] <-- 6) R1_SP + workspace_offset
2007 // [alignment] (optional) <-- 7)
2008 // caller [JIT_TOP_ABI_48] <-- r_callers_sp
2009 //
2010 // - *_slot_offset Indicates offset from SP in number of stack slots.
2011 // - *_offset Indicates offset from SP in bytes.
2012
2013 int stack_slots = c_calling_convention(out_sig_bt, out_regs, out_regs2, total_c_args) + // 1+2)
2014 SharedRuntime::out_preserve_stack_slots(); // See c_calling_convention.
2015
2016 // Now the space for the inbound oop handle area.
2017 int total_save_slots = num_java_iarg_registers * VMRegImpl::slots_per_word;
2018 if (is_critical_native) {
2019 // Critical natives may have to call out so they need a save area
2020 // for register arguments.
2021 int double_slots = 0;
2022 int single_slots = 0;
2023 for (int i = 0; i < total_in_args; i++) {
2024 if (in_regs[i].first()->is_Register()) {
2025 const Register reg = in_regs[i].first()->as_Register();
2026 switch (in_sig_bt[i]) {
2027 case T_BOOLEAN:
2028 case T_BYTE:
2029 case T_SHORT:
2030 case T_CHAR:
2031 case T_INT:
2032 // Fall through.
2033 case T_ARRAY:
2034 case T_LONG: double_slots++; break;
2035 default: ShouldNotReachHere();
2036 }
2037 } else if (in_regs[i].first()->is_FloatRegister()) {
2038 switch (in_sig_bt[i]) {
2039 case T_FLOAT: single_slots++; break;
2040 case T_DOUBLE: double_slots++; break;
2041 default: ShouldNotReachHere();
2042 }
2043 }
2044 }
2045 total_save_slots = double_slots * 2 + align_up(single_slots, 2); // round to even
2046 }
2047
2048 int oop_handle_slot_offset = stack_slots;
2049 stack_slots += total_save_slots; // 3)
2050
2051 int klass_slot_offset = 0;
2052 int klass_offset = -1;
2053 if (method_is_static && !is_critical_native) { // 4)
2054 klass_slot_offset = stack_slots;
2055 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
2056 stack_slots += VMRegImpl::slots_per_word;
2057 }
2058
2059 int lock_slot_offset = 0;
2060 int lock_offset = -1;
2061 if (method->is_synchronized()) { // 5)
2062 lock_slot_offset = stack_slots;
2063 lock_offset = lock_slot_offset * VMRegImpl::stack_slot_size;
2064 stack_slots += VMRegImpl::slots_per_word;
2065 }
2066
2067 int workspace_slot_offset = stack_slots; // 6)
2068 stack_slots += 2;
2069
2070 // Now compute actual number of stack words we need.
2071 // Rounding to make stack properly aligned.
2072 stack_slots = align_up(stack_slots, // 7)
2073 frame::alignment_in_bytes / VMRegImpl::stack_slot_size);
2074 int frame_size_in_bytes = stack_slots * VMRegImpl::stack_slot_size;
2075
2076
2077 // Now we can start generating code.
2078 // --------------------------------------------------------------------------
2079
2080 intptr_t start_pc = (intptr_t)__ pc();
2081 intptr_t vep_start_pc;
2082 intptr_t frame_done_pc;
2083 intptr_t oopmap_pc;
2084
2085 Label ic_miss;
2086 Label handle_pending_exception;
2087
2088 Register r_callers_sp = R21;
2089 Register r_temp_1 = R22;
2090 Register r_temp_2 = R23;
2091 Register r_temp_3 = R24;
2092 Register r_temp_4 = R25;
2093 Register r_temp_5 = R26;
2094 Register r_temp_6 = R27;
2095 Register r_return_pc = R28;
2096
2097 Register r_carg1_jnienv = noreg;
2098 Register r_carg2_classorobject = noreg;
2099 if (!is_critical_native) {
2100 r_carg1_jnienv = out_regs[0].first()->as_Register();
2101 r_carg2_classorobject = out_regs[1].first()->as_Register();
2102 }
2103
2104
2105 // Generate the Unverified Entry Point (UEP).
2106 // --------------------------------------------------------------------------
2107 assert(start_pc == (intptr_t)__ pc(), "uep must be at start");
2108
2109 // Check ic: object class == cached class?
2110 if (!method_is_static) {
2111 Register ic = as_Register(Matcher::inline_cache_reg_encode());
2112 Register receiver_klass = r_temp_1;
2113
2114 __ cmpdi(CCR0, R3_ARG1, 0);
2115 __ beq(CCR0, ic_miss);
2116 __ verify_oop(R3_ARG1);
2117 __ load_klass(receiver_klass, R3_ARG1);
2118
2119 __ cmpd(CCR0, receiver_klass, ic);
2120 __ bne(CCR0, ic_miss);
2121 }
2122
2123
2124 // Generate the Verified Entry Point (VEP).
2125 // --------------------------------------------------------------------------
2126 vep_start_pc = (intptr_t)__ pc();
2127
2128 if (UseRTMLocking) {
2129 // Abort RTM transaction before calling JNI
2130 // because critical section can be large and
2131 // abort anyway. Also nmethod can be deoptimized.
2132 __ tabort_();
2133 }
2134
2135 if (VM_Version::supports_fast_class_init_checks() && method->needs_clinit_barrier()) {
2136 Label L_skip_barrier;
2137 Register klass = r_temp_1;
2138 // Notify OOP recorder (don't need the relocation)
2139 AddressLiteral md = __ constant_metadata_address(method->method_holder());
2140 __ load_const_optimized(klass, md.value(), R0);
2141 __ clinit_barrier(klass, R16_thread, &L_skip_barrier /*L_fast_path*/);
2142
2143 __ load_const_optimized(klass, SharedRuntime::get_handle_wrong_method_stub(), R0);
2144 __ mtctr(klass);
2145 __ bctr();
2146
2147 __ bind(L_skip_barrier);
2148 }
2149
2150 __ save_LR_CR(r_temp_1);
2151 __ generate_stack_overflow_check(frame_size_in_bytes); // Check before creating frame.
2152 __ mr(r_callers_sp, R1_SP); // Remember frame pointer.
2153 __ push_frame(frame_size_in_bytes, r_temp_1); // Push the c2n adapter's frame.
2154 frame_done_pc = (intptr_t)__ pc();
2155
2156 __ verify_thread();
2157
2158 // Native nmethod wrappers never take possesion of the oop arguments.
2159 // So the caller will gc the arguments.
2160 // The only thing we need an oopMap for is if the call is static.
2161 //
2162 // An OopMap for lock (and class if static), and one for the VM call itself.
2163 OopMapSet *oop_maps = new OopMapSet();
2164 OopMap *oop_map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
2165
2166 if (is_critical_native) {
2167 check_needs_gc_for_critical_native(masm, stack_slots, total_in_args, oop_handle_slot_offset,
2168 oop_maps, in_regs, in_sig_bt, r_temp_1);
2169 }
2170
2171 // Move arguments from register/stack to register/stack.
2172 // --------------------------------------------------------------------------
2173 //
2174 // We immediately shuffle the arguments so that for any vm call we have
2175 // to make from here on out (sync slow path, jvmti, etc.) we will have
2176 // captured the oops from our caller and have a valid oopMap for them.
2177 //
2178 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
2179 // (derived from JavaThread* which is in R16_thread) and, if static,
2180 // the class mirror instead of a receiver. This pretty much guarantees that
2181 // register layout will not match. We ignore these extra arguments during
2182 // the shuffle. The shuffle is described by the two calling convention
2183 // vectors we have in our possession. We simply walk the java vector to
2184 // get the source locations and the c vector to get the destinations.
2185
2186 // Record sp-based slot for receiver on stack for non-static methods.
2187 int receiver_offset = -1;
2188
2189 // We move the arguments backward because the floating point registers
2190 // destination will always be to a register with a greater or equal
2191 // register number or the stack.
2192 // in is the index of the incoming Java arguments
2193 // out is the index of the outgoing C arguments
2194
2195 #ifdef ASSERT
2196 bool reg_destroyed[RegisterImpl::number_of_registers];
2197 bool freg_destroyed[FloatRegisterImpl::number_of_registers];
2198 for (int r = 0 ; r < RegisterImpl::number_of_registers ; r++) {
2199 reg_destroyed[r] = false;
2200 }
2201 for (int f = 0 ; f < FloatRegisterImpl::number_of_registers ; f++) {
2202 freg_destroyed[f] = false;
2203 }
2204 #endif // ASSERT
2205
2206 for (int in = total_in_args - 1, out = total_c_args - 1; in >= 0 ; in--, out--) {
2207
2208 #ifdef ASSERT
2209 if (in_regs[in].first()->is_Register()) {
2210 assert(!reg_destroyed[in_regs[in].first()->as_Register()->encoding()], "ack!");
2211 } else if (in_regs[in].first()->is_FloatRegister()) {
2212 assert(!freg_destroyed[in_regs[in].first()->as_FloatRegister()->encoding()], "ack!");
2213 }
2214 if (out_regs[out].first()->is_Register()) {
2215 reg_destroyed[out_regs[out].first()->as_Register()->encoding()] = true;
2216 } else if (out_regs[out].first()->is_FloatRegister()) {
2217 freg_destroyed[out_regs[out].first()->as_FloatRegister()->encoding()] = true;
2218 }
2219 if (out_regs2[out].first()->is_Register()) {
2220 reg_destroyed[out_regs2[out].first()->as_Register()->encoding()] = true;
2221 } else if (out_regs2[out].first()->is_FloatRegister()) {
2222 freg_destroyed[out_regs2[out].first()->as_FloatRegister()->encoding()] = true;
2223 }
2224 #endif // ASSERT
2225
2226 switch (in_sig_bt[in]) {
2227 case T_BOOLEAN:
2228 case T_CHAR:
2229 case T_BYTE:
2230 case T_SHORT:
2231 case T_INT:
2232 // Move int and do sign extension.
2233 int_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
2234 break;
2235 case T_LONG:
2236 long_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
2237 break;
2238 case T_ARRAY:
2239 if (is_critical_native) {
2240 int body_arg = out;
2241 out -= 1; // Point to length arg.
2242 unpack_array_argument(masm, in_regs[in], in_elem_bt[in], out_regs[body_arg], out_regs[out],
2243 r_callers_sp, r_temp_1, r_temp_2);
2244 break;
2245 }
2246 case T_OBJECT:
2247 assert(!is_critical_native, "no oop arguments");
2248 object_move(masm, stack_slots,
2249 oop_map, oop_handle_slot_offset,
2250 ((in == 0) && (!method_is_static)), &receiver_offset,
2251 in_regs[in], out_regs[out],
2252 r_callers_sp, r_temp_1, r_temp_2);
2253 break;
2254 case T_VOID:
2255 break;
2256 case T_FLOAT:
2257 float_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
2258 if (out_regs2[out].first()->is_valid()) {
2259 float_move(masm, in_regs[in], out_regs2[out], r_callers_sp, r_temp_1);
2260 }
2261 break;
2262 case T_DOUBLE:
2263 double_move(masm, in_regs[in], out_regs[out], r_callers_sp, r_temp_1);
2264 if (out_regs2[out].first()->is_valid()) {
2265 double_move(masm, in_regs[in], out_regs2[out], r_callers_sp, r_temp_1);
2266 }
2267 break;
2268 case T_ADDRESS:
2269 fatal("found type (T_ADDRESS) in java args");
2270 break;
2271 default:
2272 ShouldNotReachHere();
2273 break;
2274 }
2275 }
2276
2277 // Pre-load a static method's oop into ARG2.
2278 // Used both by locking code and the normal JNI call code.
2279 if (method_is_static && !is_critical_native) {
2280 __ set_oop_constant(JNIHandles::make_local(method->method_holder()->java_mirror()),
2281 r_carg2_classorobject);
2282
2283 // Now handlize the static class mirror in carg2. It's known not-null.
2284 __ std(r_carg2_classorobject, klass_offset, R1_SP);
2285 oop_map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
2286 __ addi(r_carg2_classorobject, R1_SP, klass_offset);
2287 }
2288
2289 // Get JNIEnv* which is first argument to native.
2290 if (!is_critical_native) {
2291 __ addi(r_carg1_jnienv, R16_thread, in_bytes(JavaThread::jni_environment_offset()));
2292 }
2293
2294 // NOTE:
2295 //
2296 // We have all of the arguments setup at this point.
2297 // We MUST NOT touch any outgoing regs from this point on.
2298 // So if we must call out we must push a new frame.
2299
2300 // Get current pc for oopmap, and load it patchable relative to global toc.
2301 oopmap_pc = (intptr_t) __ pc();
2302 __ calculate_address_from_global_toc(r_return_pc, (address)oopmap_pc, true, true, true, true);
2303
2304 // We use the same pc/oopMap repeatedly when we call out.
2305 oop_maps->add_gc_map(oopmap_pc - start_pc, oop_map);
2306
2307 // r_return_pc now has the pc loaded that we will use when we finally call
2308 // to native.
2309
2310 // Make sure that thread is non-volatile; it crosses a bunch of VM calls below.
2311 assert(R16_thread->is_nonvolatile(), "thread must be in non-volatile register");
2312
2313 # if 0
2314 // DTrace method entry
2315 # endif
2316
2317 // Lock a synchronized method.
2318 // --------------------------------------------------------------------------
2319
2320 if (method->is_synchronized()) {
2321 assert(!is_critical_native, "unhandled");
2322 ConditionRegister r_flag = CCR1;
2323 Register r_oop = r_temp_4;
2324 const Register r_box = r_temp_5;
2325 Label done, locked;
2326
2327 // Load the oop for the object or class. r_carg2_classorobject contains
2328 // either the handlized oop from the incoming arguments or the handlized
2329 // class mirror (if the method is static).
2330 __ ld(r_oop, 0, r_carg2_classorobject);
2331
2332 // Get the lock box slot's address.
2333 __ addi(r_box, R1_SP, lock_offset);
2334
2335 # ifdef ASSERT
2336 if (UseBiasedLocking) {
2337 // Making the box point to itself will make it clear it went unused
2338 // but also be obviously invalid.
2339 __ std(r_box, 0, r_box);
2340 }
2341 # endif // ASSERT
2342
2343 // Try fastpath for locking.
2344 // fast_lock kills r_temp_1, r_temp_2, r_temp_3.
2345 __ compiler_fast_lock_object(r_flag, r_oop, r_box, r_temp_1, r_temp_2, r_temp_3);
2346 __ beq(r_flag, locked);
2347
2348 // None of the above fast optimizations worked so we have to get into the
2349 // slow case of monitor enter. Inline a special case of call_VM that
2350 // disallows any pending_exception.
2351
2352 // Save argument registers and leave room for C-compatible ABI_REG_ARGS.
2353 int frame_size = frame::abi_reg_args_size + align_up(total_c_args * wordSize, frame::alignment_in_bytes);
2354 __ mr(R11_scratch1, R1_SP);
2355 RegisterSaver::push_frame_and_save_argument_registers(masm, R12_scratch2, frame_size, total_c_args, out_regs, out_regs2);
2356
2357 // Do the call.
2358 __ set_last_Java_frame(R11_scratch1, r_return_pc);
2359 assert(r_return_pc->is_nonvolatile(), "expecting return pc to be in non-volatile register");
2360 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), r_oop, r_box, R16_thread);
2361 __ reset_last_Java_frame();
2362
2363 RegisterSaver::restore_argument_registers_and_pop_frame(masm, frame_size, total_c_args, out_regs, out_regs2);
2364
2365 __ asm_assert_mem8_is_zero(thread_(pending_exception),
2366 "no pending exception allowed on exit from SharedRuntime::complete_monitor_locking_C", 0);
2367
2368 __ bind(locked);
2369 }
2370
2371
2372 // Publish thread state
2373 // --------------------------------------------------------------------------
2374
2375 // Use that pc we placed in r_return_pc a while back as the current frame anchor.
2376 __ set_last_Java_frame(R1_SP, r_return_pc);
2377
2378 // Transition from _thread_in_Java to _thread_in_native.
2379 __ li(R0, _thread_in_native);
2380 __ release();
2381 // TODO: PPC port assert(4 == JavaThread::sz_thread_state(), "unexpected field size");
2382 __ stw(R0, thread_(thread_state));
2383
2384
2385 // The JNI call
2386 // --------------------------------------------------------------------------
2387 #if defined(ABI_ELFv2)
2388 __ call_c(native_func, relocInfo::runtime_call_type);
2389 #else
2390 FunctionDescriptor* fd_native_method = (FunctionDescriptor*) native_func;
2391 __ call_c(fd_native_method, relocInfo::runtime_call_type);
2392 #endif
2393
2394
2395 // Now, we are back from the native code.
2396
2397
2398 // Unpack the native result.
2399 // --------------------------------------------------------------------------
2400
2401 // For int-types, we do any needed sign-extension required.
2402 // Care must be taken that the return values (R3_RET and F1_RET)
2403 // will survive any VM calls for blocking or unlocking.
2404 // An OOP result (handle) is done specially in the slow-path code.
2405
2406 switch (ret_type) {
2407 case T_VOID: break; // Nothing to do!
2408 case T_FLOAT: break; // Got it where we want it (unless slow-path).
2409 case T_DOUBLE: break; // Got it where we want it (unless slow-path).
2410 case T_LONG: break; // Got it where we want it (unless slow-path).
2411 case T_OBJECT: break; // Really a handle.
2412 // Cannot de-handlize until after reclaiming jvm_lock.
2413 case T_ARRAY: break;
2414
2415 case T_BOOLEAN: { // 0 -> false(0); !0 -> true(1)
2416 Label skip_modify;
2417 __ cmpwi(CCR0, R3_RET, 0);
2418 __ beq(CCR0, skip_modify);
2419 __ li(R3_RET, 1);
2420 __ bind(skip_modify);
2421 break;
2422 }
2423 case T_BYTE: { // sign extension
2424 __ extsb(R3_RET, R3_RET);
2425 break;
2426 }
2427 case T_CHAR: { // unsigned result
2428 __ andi(R3_RET, R3_RET, 0xffff);
2429 break;
2430 }
2431 case T_SHORT: { // sign extension
2432 __ extsh(R3_RET, R3_RET);
2433 break;
2434 }
2435 case T_INT: // nothing to do
2436 break;
2437 default:
2438 ShouldNotReachHere();
2439 break;
2440 }
2441
2442
2443 // Publish thread state
2444 // --------------------------------------------------------------------------
2445
2446 // Switch thread to "native transition" state before reading the
2447 // synchronization state. This additional state is necessary because reading
2448 // and testing the synchronization state is not atomic w.r.t. GC, as this
2449 // scenario demonstrates:
2450 // - Java thread A, in _thread_in_native state, loads _not_synchronized
2451 // and is preempted.
2452 // - VM thread changes sync state to synchronizing and suspends threads
2453 // for GC.
2454 // - Thread A is resumed to finish this native method, but doesn't block
2455 // here since it didn't see any synchronization in progress, and escapes.
2456
2457 // Transition from _thread_in_native to _thread_in_native_trans.
2458 __ li(R0, _thread_in_native_trans);
2459 __ release();
2460 // TODO: PPC port assert(4 == JavaThread::sz_thread_state(), "unexpected field size");
2461 __ stw(R0, thread_(thread_state));
2462
2463
2464 // Must we block?
2465 // --------------------------------------------------------------------------
2466
2467 // Block, if necessary, before resuming in _thread_in_Java state.
2468 // In order for GC to work, don't clear the last_Java_sp until after blocking.
2469 Label after_transition;
2470 {
2471 Label no_block, sync;
2472
2473 // Force this write out before the read below.
2474 __ fence();
2475
2476 Register sync_state_addr = r_temp_4;
2477 Register sync_state = r_temp_5;
2478 Register suspend_flags = r_temp_6;
2479
2480 // No synchronization in progress nor yet synchronized
2481 // (cmp-br-isync on one path, release (same as acquire on PPC64) on the other path).
2482 __ safepoint_poll(sync, sync_state);
2483
2484 // Not suspended.
2485 // TODO: PPC port assert(4 == Thread::sz_suspend_flags(), "unexpected field size");
2486 __ lwz(suspend_flags, thread_(suspend_flags));
2487 __ cmpwi(CCR1, suspend_flags, 0);
2488 __ beq(CCR1, no_block);
2489
2490 // Block. Save any potential method result value before the operation and
2491 // use a leaf call to leave the last_Java_frame setup undisturbed. Doing this
2492 // lets us share the oopMap we used when we went native rather than create
2493 // a distinct one for this pc.
2494 __ bind(sync);
2495 __ isync();
2496
2497 address entry_point = is_critical_native
2498 ? CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition)
2499 : CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans);
2500 save_native_result(masm, ret_type, workspace_slot_offset);
2501 __ call_VM_leaf(entry_point, R16_thread);
2502 restore_native_result(masm, ret_type, workspace_slot_offset);
2503
2504 if (is_critical_native) {
2505 __ b(after_transition); // No thread state transition here.
2506 }
2507 __ bind(no_block);
2508 }
2509
2510 // Publish thread state.
2511 // --------------------------------------------------------------------------
2512
2513 // Thread state is thread_in_native_trans. Any safepoint blocking has
2514 // already happened so we can now change state to _thread_in_Java.
2515
2516 // Transition from _thread_in_native_trans to _thread_in_Java.
2517 __ li(R0, _thread_in_Java);
2518 __ lwsync(); // Acquire safepoint and suspend state, release thread state.
2519 // TODO: PPC port assert(4 == JavaThread::sz_thread_state(), "unexpected field size");
2520 __ stw(R0, thread_(thread_state));
2521 __ bind(after_transition);
2522
2523 // Reguard any pages if necessary.
2524 // --------------------------------------------------------------------------
2525
2526 Label no_reguard;
2527 __ lwz(r_temp_1, thread_(stack_guard_state));
2528 __ cmpwi(CCR0, r_temp_1, JavaThread::stack_guard_yellow_reserved_disabled);
2529 __ bne(CCR0, no_reguard);
2530
2531 save_native_result(masm, ret_type, workspace_slot_offset);
2532 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages));
2533 restore_native_result(masm, ret_type, workspace_slot_offset);
2534
2535 __ bind(no_reguard);
2536
2537
2538 // Unlock
2539 // --------------------------------------------------------------------------
2540
2541 if (method->is_synchronized()) {
2542
2543 ConditionRegister r_flag = CCR1;
2544 const Register r_oop = r_temp_4;
2545 const Register r_box = r_temp_5;
2546 const Register r_exception = r_temp_6;
2547 Label done;
2548
2549 // Get oop and address of lock object box.
2550 if (method_is_static) {
2551 assert(klass_offset != -1, "");
2552 __ ld(r_oop, klass_offset, R1_SP);
2553 } else {
2554 assert(receiver_offset != -1, "");
2555 __ ld(r_oop, receiver_offset, R1_SP);
2556 }
2557 __ addi(r_box, R1_SP, lock_offset);
2558
2559 // Try fastpath for unlocking.
2560 __ compiler_fast_unlock_object(r_flag, r_oop, r_box, r_temp_1, r_temp_2, r_temp_3);
2561 __ beq(r_flag, done);
2562
2563 // Save and restore any potential method result value around the unlocking operation.
2564 save_native_result(masm, ret_type, workspace_slot_offset);
2565
2566 // Must save pending exception around the slow-path VM call. Since it's a
2567 // leaf call, the pending exception (if any) can be kept in a register.
2568 __ ld(r_exception, thread_(pending_exception));
2569 assert(r_exception->is_nonvolatile(), "exception register must be non-volatile");
2570 __ li(R0, 0);
2571 __ std(R0, thread_(pending_exception));
2572
2573 // Slow case of monitor enter.
2574 // Inline a special case of call_VM that disallows any pending_exception.
2575 // Arguments are (oop obj, BasicLock* lock, JavaThread* thread).
2576 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C), r_oop, r_box, R16_thread);
2577
2578 __ asm_assert_mem8_is_zero(thread_(pending_exception),
2579 "no pending exception allowed on exit from SharedRuntime::complete_monitor_unlocking_C", 0);
2580
2581 restore_native_result(masm, ret_type, workspace_slot_offset);
2582
2583 // Check_forward_pending_exception jump to forward_exception if any pending
2584 // exception is set. The forward_exception routine expects to see the
2585 // exception in pending_exception and not in a register. Kind of clumsy,
2586 // since all folks who branch to forward_exception must have tested
2587 // pending_exception first and hence have it in a register already.
2588 __ std(r_exception, thread_(pending_exception));
2589
2590 __ bind(done);
2591 }
2592
2593 # if 0
2594 // DTrace method exit
2595 # endif
2596
2597 // Clear "last Java frame" SP and PC.
2598 // --------------------------------------------------------------------------
2599
2600 __ reset_last_Java_frame();
2601
2602 // Unbox oop result, e.g. JNIHandles::resolve value.
2603 // --------------------------------------------------------------------------
2604
2605 if (is_reference_type(ret_type)) {
2606 __ resolve_jobject(R3_RET, r_temp_1, r_temp_2, /* needs_frame */ false);
2607 }
2608
2609 if (CheckJNICalls) {
2610 // clear_pending_jni_exception_check
2611 __ load_const_optimized(R0, 0L);
2612 __ st_ptr(R0, JavaThread::pending_jni_exception_check_fn_offset(), R16_thread);
2613 }
2614
2615 // Reset handle block.
2616 // --------------------------------------------------------------------------
2617 if (!is_critical_native) {
2618 __ ld(r_temp_1, thread_(active_handles));
2619 // TODO: PPC port assert(4 == JNIHandleBlock::top_size_in_bytes(), "unexpected field size");
2620 __ li(r_temp_2, 0);
2621 __ stw(r_temp_2, JNIHandleBlock::top_offset_in_bytes(), r_temp_1);
2622
2623
2624 // Check for pending exceptions.
2625 // --------------------------------------------------------------------------
2626 __ ld(r_temp_2, thread_(pending_exception));
2627 __ cmpdi(CCR0, r_temp_2, 0);
2628 __ bne(CCR0, handle_pending_exception);
2629 }
2630
2631 // Return
2632 // --------------------------------------------------------------------------
2633
2634 __ pop_frame();
2635 __ restore_LR_CR(R11);
2636 __ blr();
2637
2638
2639 // Handler for pending exceptions (out-of-line).
2640 // --------------------------------------------------------------------------
2641
2642 // Since this is a native call, we know the proper exception handler
2643 // is the empty function. We just pop this frame and then jump to
2644 // forward_exception_entry.
2645 if (!is_critical_native) {
2646 __ align(InteriorEntryAlignment);
2647 __ bind(handle_pending_exception);
2648
2649 __ pop_frame();
2650 __ restore_LR_CR(R11);
2651 __ b64_patchable((address)StubRoutines::forward_exception_entry(),
2652 relocInfo::runtime_call_type);
2653 }
2654
2655 // Handler for a cache miss (out-of-line).
2656 // --------------------------------------------------------------------------
2657
2658 if (!method_is_static) {
2659 __ align(InteriorEntryAlignment);
2660 __ bind(ic_miss);
2661
2662 __ b64_patchable((address)SharedRuntime::get_ic_miss_stub(),
2663 relocInfo::runtime_call_type);
2664 }
2665
2666 // Done.
2667 // --------------------------------------------------------------------------
2668
2669 __ flush();
2670
2671 nmethod *nm = nmethod::new_native_nmethod(method,
2672 compile_id,
2673 masm->code(),
2674 vep_start_pc-start_pc,
2675 frame_done_pc-start_pc,
2676 stack_slots / VMRegImpl::slots_per_word,
2677 (method_is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2678 in_ByteSize(lock_offset),
2679 oop_maps);
2680
2681 if (is_critical_native) {
2682 nm->set_lazy_critical_native(true);
2683 }
2684
2685 return nm;
2686 #else
2687 ShouldNotReachHere();
2688 return NULL;
2689 #endif // COMPILER2
2690 }
2691
2692 // This function returns the adjust size (in number of words) to a c2i adapter
2693 // activation for use during deoptimization.
2694 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals) {
2695 return align_up((callee_locals - callee_parameters) * Interpreter::stackElementWords, frame::alignment_in_bytes);
2696 }
2697
2698 uint SharedRuntime::out_preserve_stack_slots() {
2699 #if defined(COMPILER1) || defined(COMPILER2)
2700 return frame::jit_out_preserve_size / VMRegImpl::stack_slot_size;
2701 #else
2702 return 0;
2703 #endif
2704 }
2705
2706 #if defined(COMPILER1) || defined(COMPILER2)
2707 // Frame generation for deopt and uncommon trap blobs.
2708 static void push_skeleton_frame(MacroAssembler* masm, bool deopt,
2709 /* Read */
2710 Register unroll_block_reg,
2711 /* Update */
2712 Register frame_sizes_reg,
2713 Register number_of_frames_reg,
2714 Register pcs_reg,
2715 /* Invalidate */
2716 Register frame_size_reg,
2717 Register pc_reg) {
2718
2719 __ ld(pc_reg, 0, pcs_reg);
2720 __ ld(frame_size_reg, 0, frame_sizes_reg);
2721 __ std(pc_reg, _abi(lr), R1_SP);
2722 __ push_frame(frame_size_reg, R0/*tmp*/);
2723 __ std(R1_SP, _ijava_state_neg(sender_sp), R1_SP);
2724 __ addi(number_of_frames_reg, number_of_frames_reg, -1);
2725 __ addi(frame_sizes_reg, frame_sizes_reg, wordSize);
2726 __ addi(pcs_reg, pcs_reg, wordSize);
2727 }
2728
2729 // Loop through the UnrollBlock info and create new frames.
2730 static void push_skeleton_frames(MacroAssembler* masm, bool deopt,
2731 /* read */
2732 Register unroll_block_reg,
2733 /* invalidate */
2734 Register frame_sizes_reg,
2735 Register number_of_frames_reg,
2736 Register pcs_reg,
2737 Register frame_size_reg,
2738 Register pc_reg) {
2739 Label loop;
2740
2741 // _number_of_frames is of type int (deoptimization.hpp)
2742 __ lwa(number_of_frames_reg,
2743 Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes(),
2744 unroll_block_reg);
2745 __ ld(pcs_reg,
2746 Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes(),
2747 unroll_block_reg);
2748 __ ld(frame_sizes_reg,
2749 Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes(),
2750 unroll_block_reg);
2751
2752 // stack: (caller_of_deoptee, ...).
2753
2754 // At this point we either have an interpreter frame or a compiled
2755 // frame on top of stack. If it is a compiled frame we push a new c2i
2756 // adapter here
2757
2758 // Memorize top-frame stack-pointer.
2759 __ mr(frame_size_reg/*old_sp*/, R1_SP);
2760
2761 // Resize interpreter top frame OR C2I adapter.
2762
2763 // At this moment, the top frame (which is the caller of the deoptee) is
2764 // an interpreter frame or a newly pushed C2I adapter or an entry frame.
2765 // The top frame has a TOP_IJAVA_FRAME_ABI and the frame contains the
2766 // outgoing arguments.
2767 //
2768 // In order to push the interpreter frame for the deoptee, we need to
2769 // resize the top frame such that we are able to place the deoptee's
2770 // locals in the frame.
2771 // Additionally, we have to turn the top frame's TOP_IJAVA_FRAME_ABI
2772 // into a valid PARENT_IJAVA_FRAME_ABI.
2773
2774 __ lwa(R11_scratch1,
2775 Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes(),
2776 unroll_block_reg);
2777 __ neg(R11_scratch1, R11_scratch1);
2778
2779 // R11_scratch1 contains size of locals for frame resizing.
2780 // R12_scratch2 contains top frame's lr.
2781
2782 // Resize frame by complete frame size prevents TOC from being
2783 // overwritten by locals. A more stack space saving way would be
2784 // to copy the TOC to its location in the new abi.
2785 __ addi(R11_scratch1, R11_scratch1, - frame::parent_ijava_frame_abi_size);
2786
2787 // now, resize the frame
2788 __ resize_frame(R11_scratch1, pc_reg/*tmp*/);
2789
2790 // In the case where we have resized a c2i frame above, the optional
2791 // alignment below the locals has size 32 (why?).
2792 __ std(R12_scratch2, _abi(lr), R1_SP);
2793
2794 // Initialize initial_caller_sp.
2795 __ std(frame_size_reg, _ijava_state_neg(sender_sp), R1_SP);
2796
2797 #ifdef ASSERT
2798 // Make sure that there is at least one entry in the array.
2799 __ cmpdi(CCR0, number_of_frames_reg, 0);
2800 __ asm_assert_ne("array_size must be > 0", 0x205);
2801 #endif
2802
2803 // Now push the new interpreter frames.
2804 //
2805 __ bind(loop);
2806 // Allocate a new frame, fill in the pc.
2807 push_skeleton_frame(masm, deopt,
2808 unroll_block_reg,
2809 frame_sizes_reg,
2810 number_of_frames_reg,
2811 pcs_reg,
2812 frame_size_reg,
2813 pc_reg);
2814 __ cmpdi(CCR0, number_of_frames_reg, 0);
2815 __ bne(CCR0, loop);
2816
2817 // Get the return address pointing into the frame manager.
2818 __ ld(R0, 0, pcs_reg);
2819 // Store it in the top interpreter frame.
2820 __ std(R0, _abi(lr), R1_SP);
2821 // Initialize frame_manager_lr of interpreter top frame.
2822 }
2823 #endif
2824
2825 void SharedRuntime::generate_deopt_blob() {
2826 // Allocate space for the code
2827 ResourceMark rm;
2828 // Setup code generation tools
2829 CodeBuffer buffer("deopt_blob", 2048, 1024);
2830 InterpreterMacroAssembler* masm = new InterpreterMacroAssembler(&buffer);
2831 Label exec_mode_initialized;
2832 int frame_size_in_words;
2833 OopMap* map = NULL;
2834 OopMapSet *oop_maps = new OopMapSet();
2835
2836 // size of ABI112 plus spill slots for R3_RET and F1_RET.
2837 const int frame_size_in_bytes = frame::abi_reg_args_spill_size;
2838 const int frame_size_in_slots = frame_size_in_bytes / sizeof(jint);
2839 int first_frame_size_in_bytes = 0; // frame size of "unpack frame" for call to fetch_unroll_info.
2840
2841 const Register exec_mode_reg = R21_tmp1;
2842
2843 const address start = __ pc();
2844
2845 #if defined(COMPILER1) || defined(COMPILER2)
2846 // --------------------------------------------------------------------------
2847 // Prolog for non exception case!
2848
2849 // We have been called from the deopt handler of the deoptee.
2850 //
2851 // deoptee:
2852 // ...
2853 // call X
2854 // ...
2855 // deopt_handler: call_deopt_stub
2856 // cur. return pc --> ...
2857 //
2858 // So currently SR_LR points behind the call in the deopt handler.
2859 // We adjust it such that it points to the start of the deopt handler.
2860 // The return_pc has been stored in the frame of the deoptee and
2861 // will replace the address of the deopt_handler in the call
2862 // to Deoptimization::fetch_unroll_info below.
2863 // We can't grab a free register here, because all registers may
2864 // contain live values, so let the RegisterSaver do the adjustment
2865 // of the return pc.
2866 const int return_pc_adjustment_no_exception = -HandlerImpl::size_deopt_handler();
2867
2868 // Push the "unpack frame"
2869 // Save everything in sight.
2870 map = RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
2871 &first_frame_size_in_bytes,
2872 /*generate_oop_map=*/ true,
2873 return_pc_adjustment_no_exception,
2874 RegisterSaver::return_pc_is_lr);
2875 assert(map != NULL, "OopMap must have been created");
2876
2877 __ li(exec_mode_reg, Deoptimization::Unpack_deopt);
2878 // Save exec mode for unpack_frames.
2879 __ b(exec_mode_initialized);
2880
2881 // --------------------------------------------------------------------------
2882 // Prolog for exception case
2883
2884 // An exception is pending.
2885 // We have been called with a return (interpreter) or a jump (exception blob).
2886 //
2887 // - R3_ARG1: exception oop
2888 // - R4_ARG2: exception pc
2889
2890 int exception_offset = __ pc() - start;
2891
2892 BLOCK_COMMENT("Prolog for exception case");
2893
2894 // Store exception oop and pc in thread (location known to GC).
2895 // This is needed since the call to "fetch_unroll_info()" may safepoint.
2896 __ std(R3_ARG1, in_bytes(JavaThread::exception_oop_offset()), R16_thread);
2897 __ std(R4_ARG2, in_bytes(JavaThread::exception_pc_offset()), R16_thread);
2898 __ std(R4_ARG2, _abi(lr), R1_SP);
2899
2900 // Vanilla deoptimization with an exception pending in exception_oop.
2901 int exception_in_tls_offset = __ pc() - start;
2902
2903 // Push the "unpack frame".
2904 // Save everything in sight.
2905 RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
2906 &first_frame_size_in_bytes,
2907 /*generate_oop_map=*/ false,
2908 /*return_pc_adjustment_exception=*/ 0,
2909 RegisterSaver::return_pc_is_pre_saved);
2910
2911 // Deopt during an exception. Save exec mode for unpack_frames.
2912 __ li(exec_mode_reg, Deoptimization::Unpack_exception);
2913
2914 // fall through
2915
2916 int reexecute_offset = 0;
2917 #ifdef COMPILER1
2918 __ b(exec_mode_initialized);
2919
2920 // Reexecute entry, similar to c2 uncommon trap
2921 reexecute_offset = __ pc() - start;
2922
2923 RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
2924 &first_frame_size_in_bytes,
2925 /*generate_oop_map=*/ false,
2926 /*return_pc_adjustment_reexecute=*/ 0,
2927 RegisterSaver::return_pc_is_pre_saved);
2928 __ li(exec_mode_reg, Deoptimization::Unpack_reexecute);
2929 #endif
2930
2931 // --------------------------------------------------------------------------
2932 __ BIND(exec_mode_initialized);
2933
2934 {
2935 const Register unroll_block_reg = R22_tmp2;
2936
2937 // We need to set `last_Java_frame' because `fetch_unroll_info' will
2938 // call `last_Java_frame()'. The value of the pc in the frame is not
2939 // particularly important. It just needs to identify this blob.
2940 __ set_last_Java_frame(R1_SP, noreg);
2941
2942 // With EscapeAnalysis turned on, this call may safepoint!
2943 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info), R16_thread, exec_mode_reg);
2944 address calls_return_pc = __ last_calls_return_pc();
2945 // Set an oopmap for the call site that describes all our saved registers.
2946 oop_maps->add_gc_map(calls_return_pc - start, map);
2947
2948 __ reset_last_Java_frame();
2949 // Save the return value.
2950 __ mr(unroll_block_reg, R3_RET);
2951
2952 // Restore only the result registers that have been saved
2953 // by save_volatile_registers(...).
2954 RegisterSaver::restore_result_registers(masm, first_frame_size_in_bytes);
2955
2956 // reload the exec mode from the UnrollBlock (it might have changed)
2957 __ lwz(exec_mode_reg, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes(), unroll_block_reg);
2958 // In excp_deopt_mode, restore and clear exception oop which we
2959 // stored in the thread during exception entry above. The exception
2960 // oop will be the return value of this stub.
2961 Label skip_restore_excp;
2962 __ cmpdi(CCR0, exec_mode_reg, Deoptimization::Unpack_exception);
2963 __ bne(CCR0, skip_restore_excp);
2964 __ ld(R3_RET, in_bytes(JavaThread::exception_oop_offset()), R16_thread);
2965 __ ld(R4_ARG2, in_bytes(JavaThread::exception_pc_offset()), R16_thread);
2966 __ li(R0, 0);
2967 __ std(R0, in_bytes(JavaThread::exception_pc_offset()), R16_thread);
2968 __ std(R0, in_bytes(JavaThread::exception_oop_offset()), R16_thread);
2969 __ BIND(skip_restore_excp);
2970
2971 __ pop_frame();
2972
2973 // stack: (deoptee, optional i2c, caller of deoptee, ...).
2974
2975 // pop the deoptee's frame
2976 __ pop_frame();
2977
2978 // stack: (caller_of_deoptee, ...).
2979
2980 // Loop through the `UnrollBlock' info and create interpreter frames.
2981 push_skeleton_frames(masm, true/*deopt*/,
2982 unroll_block_reg,
2983 R23_tmp3,
2984 R24_tmp4,
2985 R25_tmp5,
2986 R26_tmp6,
2987 R27_tmp7);
2988
2989 // stack: (skeletal interpreter frame, ..., optional skeletal
2990 // interpreter frame, optional c2i, caller of deoptee, ...).
2991 }
2992
2993 // push an `unpack_frame' taking care of float / int return values.
2994 __ push_frame(frame_size_in_bytes, R0/*tmp*/);
2995
2996 // stack: (unpack frame, skeletal interpreter frame, ..., optional
2997 // skeletal interpreter frame, optional c2i, caller of deoptee,
2998 // ...).
2999
3000 // Spill live volatile registers since we'll do a call.
3001 __ std( R3_RET, _abi_reg_args_spill(spill_ret), R1_SP);
3002 __ stfd(F1_RET, _abi_reg_args_spill(spill_fret), R1_SP);
3003
3004 // Let the unpacker layout information in the skeletal frames just
3005 // allocated.
3006 __ get_PC_trash_LR(R3_RET);
3007 __ set_last_Java_frame(/*sp*/R1_SP, /*pc*/R3_RET);
3008 // This is a call to a LEAF method, so no oop map is required.
3009 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames),
3010 R16_thread/*thread*/, exec_mode_reg/*exec_mode*/);
3011 __ reset_last_Java_frame();
3012
3013 // Restore the volatiles saved above.
3014 __ ld( R3_RET, _abi_reg_args_spill(spill_ret), R1_SP);
3015 __ lfd(F1_RET, _abi_reg_args_spill(spill_fret), R1_SP);
3016
3017 // Pop the unpack frame.
3018 __ pop_frame();
3019 __ restore_LR_CR(R0);
3020
3021 // stack: (top interpreter frame, ..., optional interpreter frame,
3022 // optional c2i, caller of deoptee, ...).
3023
3024 // Initialize R14_state.
3025 __ restore_interpreter_state(R11_scratch1);
3026 __ load_const_optimized(R25_templateTableBase, (address)Interpreter::dispatch_table((TosState)0), R11_scratch1);
3027
3028 // Return to the interpreter entry point.
3029 __ blr();
3030 __ flush();
3031 #else // COMPILER2
3032 __ unimplemented("deopt blob needed only with compiler");
3033 int exception_offset = __ pc() - start;
3034 #endif // COMPILER2
3035
3036 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset,
3037 reexecute_offset, first_frame_size_in_bytes / wordSize);
3038 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
3039 }
3040
3041 #ifdef COMPILER2
3042 void SharedRuntime::generate_uncommon_trap_blob() {
3043 // Allocate space for the code.
3044 ResourceMark rm;
3045 // Setup code generation tools.
3046 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
3047 InterpreterMacroAssembler* masm = new InterpreterMacroAssembler(&buffer);
3048 address start = __ pc();
3049
3050 if (UseRTMLocking) {
3051 // Abort RTM transaction before possible nmethod deoptimization.
3052 __ tabort_();
3053 }
3054
3055 Register unroll_block_reg = R21_tmp1;
3056 Register klass_index_reg = R22_tmp2;
3057 Register unc_trap_reg = R23_tmp3;
3058
3059 OopMapSet* oop_maps = new OopMapSet();
3060 int frame_size_in_bytes = frame::abi_reg_args_size;
3061 OopMap* map = new OopMap(frame_size_in_bytes / sizeof(jint), 0);
3062
3063 // stack: (deoptee, optional i2c, caller_of_deoptee, ...).
3064
3065 // Push a dummy `unpack_frame' and call
3066 // `Deoptimization::uncommon_trap' to pack the compiled frame into a
3067 // vframe array and return the `UnrollBlock' information.
3068
3069 // Save LR to compiled frame.
3070 __ save_LR_CR(R11_scratch1);
3071
3072 // Push an "uncommon_trap" frame.
3073 __ push_frame_reg_args(0, R11_scratch1);
3074
3075 // stack: (unpack frame, deoptee, optional i2c, caller_of_deoptee, ...).
3076
3077 // Set the `unpack_frame' as last_Java_frame.
3078 // `Deoptimization::uncommon_trap' expects it and considers its
3079 // sender frame as the deoptee frame.
3080 // Remember the offset of the instruction whose address will be
3081 // moved to R11_scratch1.
3082 address gc_map_pc = __ get_PC_trash_LR(R11_scratch1);
3083
3084 __ set_last_Java_frame(/*sp*/R1_SP, /*pc*/R11_scratch1);
3085
3086 __ mr(klass_index_reg, R3);
3087 __ li(R5_ARG3, Deoptimization::Unpack_uncommon_trap);
3088 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap),
3089 R16_thread, klass_index_reg, R5_ARG3);
3090
3091 // Set an oopmap for the call site.
3092 oop_maps->add_gc_map(gc_map_pc - start, map);
3093
3094 __ reset_last_Java_frame();
3095
3096 // Pop the `unpack frame'.
3097 __ pop_frame();
3098
3099 // stack: (deoptee, optional i2c, caller_of_deoptee, ...).
3100
3101 // Save the return value.
3102 __ mr(unroll_block_reg, R3_RET);
3103
3104 // Pop the uncommon_trap frame.
3105 __ pop_frame();
3106
3107 // stack: (caller_of_deoptee, ...).
3108
3109 #ifdef ASSERT
3110 __ lwz(R22_tmp2, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes(), unroll_block_reg);
3111 __ cmpdi(CCR0, R22_tmp2, (unsigned)Deoptimization::Unpack_uncommon_trap);
3112 __ asm_assert_eq("SharedRuntime::generate_deopt_blob: expected Unpack_uncommon_trap", 0);
3113 #endif
3114
3115 // Allocate new interpreter frame(s) and possibly a c2i adapter
3116 // frame.
3117 push_skeleton_frames(masm, false/*deopt*/,
3118 unroll_block_reg,
3119 R22_tmp2,
3120 R23_tmp3,
3121 R24_tmp4,
3122 R25_tmp5,
3123 R26_tmp6);
3124
3125 // stack: (skeletal interpreter frame, ..., optional skeletal
3126 // interpreter frame, optional c2i, caller of deoptee, ...).
3127
3128 // Push a dummy `unpack_frame' taking care of float return values.
3129 // Call `Deoptimization::unpack_frames' to layout information in the
3130 // interpreter frames just created.
3131
3132 // Push a simple "unpack frame" here.
3133 __ push_frame_reg_args(0, R11_scratch1);
3134
3135 // stack: (unpack frame, skeletal interpreter frame, ..., optional
3136 // skeletal interpreter frame, optional c2i, caller of deoptee,
3137 // ...).
3138
3139 // Set the "unpack_frame" as last_Java_frame.
3140 __ get_PC_trash_LR(R11_scratch1);
3141 __ set_last_Java_frame(/*sp*/R1_SP, /*pc*/R11_scratch1);
3142
3143 // Indicate it is the uncommon trap case.
3144 __ li(unc_trap_reg, Deoptimization::Unpack_uncommon_trap);
3145 // Let the unpacker layout information in the skeletal frames just
3146 // allocated.
3147 __ call_VM_leaf(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames),
3148 R16_thread, unc_trap_reg);
3149
3150 __ reset_last_Java_frame();
3151 // Pop the `unpack frame'.
3152 __ pop_frame();
3153 // Restore LR from top interpreter frame.
3154 __ restore_LR_CR(R11_scratch1);
3155
3156 // stack: (top interpreter frame, ..., optional interpreter frame,
3157 // optional c2i, caller of deoptee, ...).
3158
3159 __ restore_interpreter_state(R11_scratch1);
3160 __ load_const_optimized(R25_templateTableBase, (address)Interpreter::dispatch_table((TosState)0), R11_scratch1);
3161
3162 // Return to the interpreter entry point.
3163 __ blr();
3164
3165 masm->flush();
3166
3167 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, frame_size_in_bytes/wordSize);
3168 }
3169 #endif // COMPILER2
3170
3171 // Generate a special Compile2Runtime blob that saves all registers, and setup oopmap.
3172 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
3173 assert(StubRoutines::forward_exception_entry() != NULL,
3174 "must be generated before");
3175
3176 ResourceMark rm;
3177 OopMapSet *oop_maps = new OopMapSet();
3178 OopMap* map;
3179
3180 // Allocate space for the code. Setup code generation tools.
3181 CodeBuffer buffer("handler_blob", 2048, 1024);
3182 MacroAssembler* masm = new MacroAssembler(&buffer);
3183
3184 address start = __ pc();
3185 int frame_size_in_bytes = 0;
3186
3187 RegisterSaver::ReturnPCLocation return_pc_location;
3188 bool cause_return = (poll_type == POLL_AT_RETURN);
3189 if (cause_return) {
3190 // Nothing to do here. The frame has already been popped in MachEpilogNode.
3191 // Register LR already contains the return pc.
3192 return_pc_location = RegisterSaver::return_pc_is_lr;
3193 } else {
3194 // Use thread()->saved_exception_pc() as return pc.
3195 return_pc_location = RegisterSaver::return_pc_is_thread_saved_exception_pc;
3196 }
3197
3198 if (UseRTMLocking) {
3199 // Abort RTM transaction before calling runtime
3200 // because critical section can be large and so
3201 // will abort anyway. Also nmethod can be deoptimized.
3202 __ tabort_();
3203 }
3204
3205 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
3206
3207 // Save registers, fpu state, and flags. Set R31 = return pc.
3208 map = RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
3209 &frame_size_in_bytes,
3210 /*generate_oop_map=*/ true,
3211 /*return_pc_adjustment=*/0,
3212 return_pc_location, save_vectors);
3213
3214 // The following is basically a call_VM. However, we need the precise
3215 // address of the call in order to generate an oopmap. Hence, we do all the
3216 // work outselves.
3217 __ set_last_Java_frame(/*sp=*/R1_SP, /*pc=*/noreg);
3218
3219 // The return address must always be correct so that the frame constructor
3220 // never sees an invalid pc.
3221
3222 // Do the call
3223 __ call_VM_leaf(call_ptr, R16_thread);
3224 address calls_return_pc = __ last_calls_return_pc();
3225
3226 // Set an oopmap for the call site. This oopmap will map all
3227 // oop-registers and debug-info registers as callee-saved. This
3228 // will allow deoptimization at this safepoint to find all possible
3229 // debug-info recordings, as well as let GC find all oops.
3230 oop_maps->add_gc_map(calls_return_pc - start, map);
3231
3232 Label noException;
3233
3234 // Clear the last Java frame.
3235 __ reset_last_Java_frame();
3236
3237 BLOCK_COMMENT(" Check pending exception.");
3238 const Register pending_exception = R0;
3239 __ ld(pending_exception, thread_(pending_exception));
3240 __ cmpdi(CCR0, pending_exception, 0);
3241 __ beq(CCR0, noException);
3242
3243 // Exception pending
3244 RegisterSaver::restore_live_registers_and_pop_frame(masm,
3245 frame_size_in_bytes,
3246 /*restore_ctr=*/true, save_vectors);
3247
3248 BLOCK_COMMENT(" Jump to forward_exception_entry.");
3249 // Jump to forward_exception_entry, with the issuing PC in LR
3250 // so it looks like the original nmethod called forward_exception_entry.
3251 __ b64_patchable(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
3252
3253 // No exception case.
3254 __ BIND(noException);
3255
3256 if (SafepointMechanism::uses_thread_local_poll() && !cause_return) {
3257 Label no_adjust;
3258 // If our stashed return pc was modified by the runtime we avoid touching it
3259 __ ld(R0, frame_size_in_bytes + _abi(lr), R1_SP);
3260 __ cmpd(CCR0, R0, R31);
3261 __ bne(CCR0, no_adjust);
3262
3263 // Adjust return pc forward to step over the safepoint poll instruction
3264 __ addi(R31, R31, 4);
3265 __ std(R31, frame_size_in_bytes + _abi(lr), R1_SP);
3266
3267 __ bind(no_adjust);
3268 }
3269
3270 // Normal exit, restore registers and exit.
3271 RegisterSaver::restore_live_registers_and_pop_frame(masm,
3272 frame_size_in_bytes,
3273 /*restore_ctr=*/true, save_vectors);
3274
3275 __ blr();
3276
3277 // Make sure all code is generated
3278 masm->flush();
3279
3280 // Fill-out other meta info
3281 // CodeBlob frame size is in words.
3282 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_bytes / wordSize);
3283 }
3284
3285 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss)
3286 //
3287 // Generate a stub that calls into the vm to find out the proper destination
3288 // of a java call. All the argument registers are live at this point
3289 // but since this is generic code we don't know what they are and the caller
3290 // must do any gc of the args.
3291 //
3292 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3293
3294 // allocate space for the code
3295 ResourceMark rm;
3296
3297 CodeBuffer buffer(name, 1000, 512);
3298 MacroAssembler* masm = new MacroAssembler(&buffer);
3299
3300 int frame_size_in_bytes;
3301
3302 OopMapSet *oop_maps = new OopMapSet();
3303 OopMap* map = NULL;
3304
3305 address start = __ pc();
3306
3307 map = RegisterSaver::push_frame_reg_args_and_save_live_registers(masm,
3308 &frame_size_in_bytes,
3309 /*generate_oop_map*/ true,
3310 /*return_pc_adjustment*/ 0,
3311 RegisterSaver::return_pc_is_lr);
3312
3313 // Use noreg as last_Java_pc, the return pc will be reconstructed
3314 // from the physical frame.
3315 __ set_last_Java_frame(/*sp*/R1_SP, noreg);
3316
3317 int frame_complete = __ offset();
3318
3319 // Pass R19_method as 2nd (optional) argument, used by
3320 // counter_overflow_stub.
3321 __ call_VM_leaf(destination, R16_thread, R19_method);
3322 address calls_return_pc = __ last_calls_return_pc();
3323 // Set an oopmap for the call site.
3324 // We need this not only for callee-saved registers, but also for volatile
3325 // registers that the compiler might be keeping live across a safepoint.
3326 // Create the oopmap for the call's return pc.
3327 oop_maps->add_gc_map(calls_return_pc - start, map);
3328
3329 // R3_RET contains the address we are going to jump to assuming no exception got installed.
3330
3331 // clear last_Java_sp
3332 __ reset_last_Java_frame();
3333
3334 // Check for pending exceptions.
3335 BLOCK_COMMENT("Check for pending exceptions.");
3336 Label pending;
3337 __ ld(R11_scratch1, thread_(pending_exception));
3338 __ cmpdi(CCR0, R11_scratch1, 0);
3339 __ bne(CCR0, pending);
3340
3341 __ mtctr(R3_RET); // Ctr will not be touched by restore_live_registers_and_pop_frame.
3342
3343 RegisterSaver::restore_live_registers_and_pop_frame(masm, frame_size_in_bytes, /*restore_ctr*/ false);
3344
3345 // Get the returned method.
3346 __ get_vm_result_2(R19_method);
3347
3348 __ bctr();
3349
3350
3351 // Pending exception after the safepoint.
3352 __ BIND(pending);
3353
3354 RegisterSaver::restore_live_registers_and_pop_frame(masm, frame_size_in_bytes, /*restore_ctr*/ true);
3355
3356 // exception pending => remove activation and forward to exception handler
3357
3358 __ li(R11_scratch1, 0);
3359 __ ld(R3_ARG1, thread_(pending_exception));
3360 __ std(R11_scratch1, in_bytes(JavaThread::vm_result_offset()), R16_thread);
3361 __ b64_patchable(StubRoutines::forward_exception_entry(), relocInfo::runtime_call_type);
3362
3363 // -------------
3364 // Make sure all code is generated.
3365 masm->flush();
3366
3367 // return the blob
3368 // frame_size_words or bytes??
3369 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_bytes/wordSize,
3370 oop_maps, true);
3371 }
3372
3373
3374 //------------------------------Montgomery multiplication------------------------
3375 //
3376
3377 // Subtract 0:b from carry:a. Return carry.
3378 static unsigned long
3379 sub(unsigned long a[], unsigned long b[], unsigned long carry, long len) {
3380 long i = 0;
3381 unsigned long tmp, tmp2;
3382 __asm__ __volatile__ (
3383 "subfc %[tmp], %[tmp], %[tmp] \n" // pre-set CA
3384 "mtctr %[len] \n"
3385 "0: \n"
3386 "ldx %[tmp], %[i], %[a] \n"
3387 "ldx %[tmp2], %[i], %[b] \n"
3388 "subfe %[tmp], %[tmp2], %[tmp] \n" // subtract extended
3389 "stdx %[tmp], %[i], %[a] \n"
3390 "addi %[i], %[i], 8 \n"
3391 "bdnz 0b \n"
3392 "addme %[tmp], %[carry] \n" // carry + CA - 1
3393 : [i]"+b"(i), [tmp]"=&r"(tmp), [tmp2]"=&r"(tmp2)
3394 : [a]"r"(a), [b]"r"(b), [carry]"r"(carry), [len]"r"(len)
3395 : "ctr", "xer", "memory"
3396 );
3397 return tmp;
3398 }
3399
3400 // Multiply (unsigned) Long A by Long B, accumulating the double-
3401 // length result into the accumulator formed of T0, T1, and T2.
3402 inline void MACC(unsigned long A, unsigned long B, unsigned long &T0, unsigned long &T1, unsigned long &T2) {
3403 unsigned long hi, lo;
3404 __asm__ __volatile__ (
3405 "mulld %[lo], %[A], %[B] \n"
3406 "mulhdu %[hi], %[A], %[B] \n"
3407 "addc %[T0], %[T0], %[lo] \n"
3408 "adde %[T1], %[T1], %[hi] \n"
3409 "addze %[T2], %[T2] \n"
3410 : [hi]"=&r"(hi), [lo]"=&r"(lo), [T0]"+r"(T0), [T1]"+r"(T1), [T2]"+r"(T2)
3411 : [A]"r"(A), [B]"r"(B)
3412 : "xer"
3413 );
3414 }
3415
3416 // As above, but add twice the double-length result into the
3417 // accumulator.
3418 inline void MACC2(unsigned long A, unsigned long B, unsigned long &T0, unsigned long &T1, unsigned long &T2) {
3419 unsigned long hi, lo;
3420 __asm__ __volatile__ (
3421 "mulld %[lo], %[A], %[B] \n"
3422 "mulhdu %[hi], %[A], %[B] \n"
3423 "addc %[T0], %[T0], %[lo] \n"
3424 "adde %[T1], %[T1], %[hi] \n"
3425 "addze %[T2], %[T2] \n"
3426 "addc %[T0], %[T0], %[lo] \n"
3427 "adde %[T1], %[T1], %[hi] \n"
3428 "addze %[T2], %[T2] \n"
3429 : [hi]"=&r"(hi), [lo]"=&r"(lo), [T0]"+r"(T0), [T1]"+r"(T1), [T2]"+r"(T2)
3430 : [A]"r"(A), [B]"r"(B)
3431 : "xer"
3432 );
3433 }
3434
3435 // Fast Montgomery multiplication. The derivation of the algorithm is
3436 // in "A Cryptographic Library for the Motorola DSP56000,
3437 // Dusse and Kaliski, Proc. EUROCRYPT 90, pp. 230-237".
3438 static void
3439 montgomery_multiply(unsigned long a[], unsigned long b[], unsigned long n[],
3440 unsigned long m[], unsigned long inv, int len) {
3441 unsigned long t0 = 0, t1 = 0, t2 = 0; // Triple-precision accumulator
3442 int i;
3443
3444 assert(inv * n[0] == -1UL, "broken inverse in Montgomery multiply");
3445
3446 for (i = 0; i < len; i++) {
3447 int j;
3448 for (j = 0; j < i; j++) {
3449 MACC(a[j], b[i-j], t0, t1, t2);
3450 MACC(m[j], n[i-j], t0, t1, t2);
3451 }
3452 MACC(a[i], b[0], t0, t1, t2);
3453 m[i] = t0 * inv;
3454 MACC(m[i], n[0], t0, t1, t2);
3455
3456 assert(t0 == 0, "broken Montgomery multiply");
3457
3458 t0 = t1; t1 = t2; t2 = 0;
3459 }
3460
3461 for (i = len; i < 2*len; i++) {
3462 int j;
3463 for (j = i-len+1; j < len; j++) {
3464 MACC(a[j], b[i-j], t0, t1, t2);
3465 MACC(m[j], n[i-j], t0, t1, t2);
3466 }
3467 m[i-len] = t0;
3468 t0 = t1; t1 = t2; t2 = 0;
3469 }
3470
3471 while (t0) {
3472 t0 = sub(m, n, t0, len);
3473 }
3474 }
3475
3476 // Fast Montgomery squaring. This uses asymptotically 25% fewer
3477 // multiplies so it should be up to 25% faster than Montgomery
3478 // multiplication. However, its loop control is more complex and it
3479 // may actually run slower on some machines.
3480 static void
3481 montgomery_square(unsigned long a[], unsigned long n[],
3482 unsigned long m[], unsigned long inv, int len) {
3483 unsigned long t0 = 0, t1 = 0, t2 = 0; // Triple-precision accumulator
3484 int i;
3485
3486 assert(inv * n[0] == -1UL, "broken inverse in Montgomery multiply");
3487
3488 for (i = 0; i < len; i++) {
3489 int j;
3490 int end = (i+1)/2;
3491 for (j = 0; j < end; j++) {
3492 MACC2(a[j], a[i-j], t0, t1, t2);
3493 MACC(m[j], n[i-j], t0, t1, t2);
3494 }
3495 if ((i & 1) == 0) {
3496 MACC(a[j], a[j], t0, t1, t2);
3497 }
3498 for (; j < i; j++) {
3499 MACC(m[j], n[i-j], t0, t1, t2);
3500 }
3501 m[i] = t0 * inv;
3502 MACC(m[i], n[0], t0, t1, t2);
3503
3504 assert(t0 == 0, "broken Montgomery square");
3505
3506 t0 = t1; t1 = t2; t2 = 0;
3507 }
3508
3509 for (i = len; i < 2*len; i++) {
3510 int start = i-len+1;
3511 int end = start + (len - start)/2;
3512 int j;
3513 for (j = start; j < end; j++) {
3514 MACC2(a[j], a[i-j], t0, t1, t2);
3515 MACC(m[j], n[i-j], t0, t1, t2);
3516 }
3517 if ((i & 1) == 0) {
3518 MACC(a[j], a[j], t0, t1, t2);
3519 }
3520 for (; j < len; j++) {
3521 MACC(m[j], n[i-j], t0, t1, t2);
3522 }
3523 m[i-len] = t0;
3524 t0 = t1; t1 = t2; t2 = 0;
3525 }
3526
3527 while (t0) {
3528 t0 = sub(m, n, t0, len);
3529 }
3530 }
3531
3532 // The threshold at which squaring is advantageous was determined
3533 // experimentally on an i7-3930K (Ivy Bridge) CPU @ 3.5GHz.
3534 // Doesn't seem to be relevant for Power8 so we use the same value.
3535 #define MONTGOMERY_SQUARING_THRESHOLD 64
3536
3537 // Copy len longwords from s to d, word-swapping as we go. The
3538 // destination array is reversed.
3539 static void reverse_words(unsigned long *s, unsigned long *d, int len) {
3540 d += len;
3541 while(len-- > 0) {
3542 d--;
3543 unsigned long s_val = *s;
3544 // Swap words in a longword on little endian machines.
3545 #ifdef VM_LITTLE_ENDIAN
3546 s_val = (s_val << 32) | (s_val >> 32);
3547 #endif
3548 *d = s_val;
3549 s++;
3550 }
3551 }
3552
3553 void SharedRuntime::montgomery_multiply(jint *a_ints, jint *b_ints, jint *n_ints,
3554 jint len, jlong inv,
3555 jint *m_ints) {
3556 len = len & 0x7fffFFFF; // C2 does not respect int to long conversion for stub calls.
3557 assert(len % 2 == 0, "array length in montgomery_multiply must be even");
3558 int longwords = len/2;
3559
3560 // Make very sure we don't use so much space that the stack might
3561 // overflow. 512 jints corresponds to an 16384-bit integer and
3562 // will use here a total of 8k bytes of stack space.
3563 int total_allocation = longwords * sizeof (unsigned long) * 4;
3564 guarantee(total_allocation <= 8192, "must be");
3565 unsigned long *scratch = (unsigned long *)alloca(total_allocation);
3566
3567 // Local scratch arrays
3568 unsigned long
3569 *a = scratch + 0 * longwords,
3570 *b = scratch + 1 * longwords,
3571 *n = scratch + 2 * longwords,
3572 *m = scratch + 3 * longwords;
3573
3574 reverse_words((unsigned long *)a_ints, a, longwords);
3575 reverse_words((unsigned long *)b_ints, b, longwords);
3576 reverse_words((unsigned long *)n_ints, n, longwords);
3577
3578 ::montgomery_multiply(a, b, n, m, (unsigned long)inv, longwords);
3579
3580 reverse_words(m, (unsigned long *)m_ints, longwords);
3581 }
3582
3583 void SharedRuntime::montgomery_square(jint *a_ints, jint *n_ints,
3584 jint len, jlong inv,
3585 jint *m_ints) {
3586 len = len & 0x7fffFFFF; // C2 does not respect int to long conversion for stub calls.
3587 assert(len % 2 == 0, "array length in montgomery_square must be even");
3588 int longwords = len/2;
3589
3590 // Make very sure we don't use so much space that the stack might
3591 // overflow. 512 jints corresponds to an 16384-bit integer and
3592 // will use here a total of 6k bytes of stack space.
3593 int total_allocation = longwords * sizeof (unsigned long) * 3;
3594 guarantee(total_allocation <= 8192, "must be");
3595 unsigned long *scratch = (unsigned long *)alloca(total_allocation);
3596
3597 // Local scratch arrays
3598 unsigned long
3599 *a = scratch + 0 * longwords,
3600 *n = scratch + 1 * longwords,
3601 *m = scratch + 2 * longwords;
3602
3603 reverse_words((unsigned long *)a_ints, a, longwords);
3604 reverse_words((unsigned long *)n_ints, n, longwords);
3605
3606 if (len >= MONTGOMERY_SQUARING_THRESHOLD) {
3607 ::montgomery_square(a, n, m, (unsigned long)inv, longwords);
3608 } else {
3609 ::montgomery_multiply(a, a, n, m, (unsigned long)inv, longwords);
3610 }
3611
3612 reverse_words(m, (unsigned long *)m_ints, longwords);
3613 }