1 /*
2 * Copyright (c) 2003, 2016, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #ifndef _WINDOWS
27 #include "alloca.h"
28 #endif
29 #include "asm/macroAssembler.hpp"
30 #include "asm/macroAssembler.inline.hpp"
31 #include "code/debugInfoRec.hpp"
32 #include "code/icBuffer.hpp"
33 #include "code/vtableStubs.hpp"
34 #include "interpreter/interpreter.hpp"
35 #include "logging/log.hpp"
36 #include "memory/resourceArea.hpp"
37 #include "oops/compiledICHolder.hpp"
38 #include "runtime/sharedRuntime.hpp"
39 #include "runtime/vframeArray.hpp"
40 #include "vmreg_x86.inline.hpp"
41 #ifdef COMPILER1
42 #include "c1/c1_Runtime1.hpp"
43 #endif
44 #ifdef COMPILER2
45 #include "opto/runtime.hpp"
46 #endif
47 #if INCLUDE_JVMCI
48 #include "jvmci/jvmciJavaClasses.hpp"
49 #endif
50
51 #define __ masm->
52
53 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
54
55 class SimpleRuntimeFrame {
56
57 public:
58
59 // Most of the runtime stubs have this simple frame layout.
60 // This class exists to make the layout shared in one place.
61 // Offsets are for compiler stack slots, which are jints.
62 enum layout {
63 // The frame sender code expects that rbp will be in the "natural" place and
64 // will override any oopMap setting for it. We must therefore force the layout
65 // so that it agrees with the frame sender code.
66 rbp_off = frame::arg_reg_save_area_bytes/BytesPerInt,
67 rbp_off2,
68 return_off, return_off2,
69 framesize
70 };
71 };
72
73 class RegisterSaver {
74 // Capture info about frame layout. Layout offsets are in jint
75 // units because compiler frame slots are jints.
76 #define XSAVE_AREA_BEGIN 160
77 #define XSAVE_AREA_YMM_BEGIN 576
78 #define XSAVE_AREA_ZMM_BEGIN 1152
79 #define XSAVE_AREA_UPPERBANK 1664
80 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
81 #define DEF_YMM_OFFS(regnum) ymm ## regnum ## _off = ymm_off + (regnum)*16/BytesPerInt, ymm ## regnum ## H_off
82 #define DEF_ZMM_OFFS(regnum) zmm ## regnum ## _off = zmm_off + (regnum-16)*64/BytesPerInt, zmm ## regnum ## H_off
83 enum layout {
84 fpu_state_off = frame::arg_reg_save_area_bytes/BytesPerInt, // fxsave save area
85 xmm_off = fpu_state_off + XSAVE_AREA_BEGIN/BytesPerInt, // offset in fxsave save area
86 DEF_XMM_OFFS(0),
87 DEF_XMM_OFFS(1),
88 // 2..15 are implied in range usage
89 ymm_off = xmm_off + (XSAVE_AREA_YMM_BEGIN - XSAVE_AREA_BEGIN)/BytesPerInt,
90 DEF_YMM_OFFS(0),
91 DEF_YMM_OFFS(1),
92 // 2..15 are implied in range usage
93 zmm_high = xmm_off + (XSAVE_AREA_ZMM_BEGIN - XSAVE_AREA_BEGIN)/BytesPerInt,
94 zmm_off = xmm_off + (XSAVE_AREA_UPPERBANK - XSAVE_AREA_BEGIN)/BytesPerInt,
95 DEF_ZMM_OFFS(16),
96 DEF_ZMM_OFFS(17),
97 // 18..31 are implied in range usage
98 fpu_state_end = fpu_state_off + ((FPUStateSizeInWords-1)*wordSize / BytesPerInt),
99 fpu_stateH_end,
100 r15_off, r15H_off,
101 r14_off, r14H_off,
102 r13_off, r13H_off,
103 r12_off, r12H_off,
104 r11_off, r11H_off,
105 r10_off, r10H_off,
106 r9_off, r9H_off,
107 r8_off, r8H_off,
108 rdi_off, rdiH_off,
109 rsi_off, rsiH_off,
110 ignore_off, ignoreH_off, // extra copy of rbp
111 rsp_off, rspH_off,
112 rbx_off, rbxH_off,
113 rdx_off, rdxH_off,
114 rcx_off, rcxH_off,
115 rax_off, raxH_off,
116 // 16-byte stack alignment fill word: see MacroAssembler::push/pop_IU_state
117 align_off, alignH_off,
118 flags_off, flagsH_off,
119 // The frame sender code expects that rbp will be in the "natural" place and
120 // will override any oopMap setting for it. We must therefore force the layout
121 // so that it agrees with the frame sender code.
122 rbp_off, rbpH_off, // copy of rbp we will restore
123 return_off, returnH_off, // slot for return address
124 reg_save_size // size in compiler stack slots
125 };
126
127 public:
128 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors = false);
129 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
130
131 // Offsets into the register save area
132 // Used by deoptimization when it is managing result register
133 // values on its own
134
135 static int rax_offset_in_bytes(void) { return BytesPerInt * rax_off; }
136 static int rdx_offset_in_bytes(void) { return BytesPerInt * rdx_off; }
137 static int rbx_offset_in_bytes(void) { return BytesPerInt * rbx_off; }
138 static int xmm0_offset_in_bytes(void) { return BytesPerInt * xmm0_off; }
139 static int return_offset_in_bytes(void) { return BytesPerInt * return_off; }
140
141 // During deoptimization only the result registers need to be restored,
142 // all the other values have already been extracted.
143 static void restore_result_registers(MacroAssembler* masm);
144 };
145
146 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) {
147 int off = 0;
148 int num_xmm_regs = XMMRegisterImpl::number_of_registers;
149 if (UseAVX < 3) {
150 num_xmm_regs = num_xmm_regs/2;
151 }
152 #if defined(COMPILER2) || INCLUDE_JVMCI
153 if (save_vectors) {
154 assert(UseAVX > 0, "up to 512bit vectors are supported with EVEX");
155 assert(MaxVectorSize <= 64, "up to 512bit vectors are supported now");
156 }
157 #else
158 assert(!save_vectors, "vectors are generated only by C2 and JVMCI");
159 #endif
160
161 // Always make the frame size 16-byte aligned, both vector and non vector stacks are always allocated
162 int frame_size_in_bytes = round_to(reg_save_size*BytesPerInt, num_xmm_regs);
163 // OopMap frame size is in compiler stack slots (jint's) not bytes or words
164 int frame_size_in_slots = frame_size_in_bytes / BytesPerInt;
165 // CodeBlob frame size is in words.
166 int frame_size_in_words = frame_size_in_bytes / wordSize;
167 *total_frame_words = frame_size_in_words;
168
169 // Save registers, fpu state, and flags.
170 // We assume caller has already pushed the return address onto the
171 // stack, so rsp is 8-byte aligned here.
172 // We push rpb twice in this sequence because we want the real rbp
173 // to be under the return like a normal enter.
174
175 __ enter(); // rsp becomes 16-byte aligned here
176 __ push_CPU_state(); // Push a multiple of 16 bytes
177
178 // push cpu state handles this on EVEX enabled targets
179 if (save_vectors) {
180 // Save upper half of YMM registers(0..15)
181 int base_addr = XSAVE_AREA_YMM_BEGIN;
182 for (int n = 0; n < 16; n++) {
183 __ vextractf128_high(Address(rsp, base_addr+n*16), as_XMMRegister(n));
184 }
185 if (VM_Version::supports_evex()) {
186 // Save upper half of ZMM registers(0..15)
187 base_addr = XSAVE_AREA_ZMM_BEGIN;
188 for (int n = 0; n < 16; n++) {
189 __ vextractf64x4_high(Address(rsp, base_addr+n*32), as_XMMRegister(n));
190 }
191 // Save full ZMM registers(16..num_xmm_regs)
192 base_addr = XSAVE_AREA_UPPERBANK;
193 off = 0;
194 int vector_len = Assembler::AVX_512bit;
195 for (int n = 16; n < num_xmm_regs; n++) {
196 __ evmovdqul(Address(rsp, base_addr+(off++*64)), as_XMMRegister(n), vector_len);
197 }
198 }
199 } else {
200 if (VM_Version::supports_evex()) {
201 // Save upper bank of ZMM registers(16..31) for double/float usage
202 int base_addr = XSAVE_AREA_UPPERBANK;
203 off = 0;
204 for (int n = 16; n < num_xmm_regs; n++) {
205 __ movsd(Address(rsp, base_addr+(off++*64)), as_XMMRegister(n));
206 }
207 }
208 }
209 if (frame::arg_reg_save_area_bytes != 0) {
210 // Allocate argument register save area
211 __ subptr(rsp, frame::arg_reg_save_area_bytes);
212 }
213
214 // Set an oopmap for the call site. This oopmap will map all
215 // oop-registers and debug-info registers as callee-saved. This
216 // will allow deoptimization at this safepoint to find all possible
217 // debug-info recordings, as well as let GC find all oops.
218
219 OopMapSet *oop_maps = new OopMapSet();
220 OopMap* map = new OopMap(frame_size_in_slots, 0);
221
222 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x))
223
224 map->set_callee_saved(STACK_OFFSET( rax_off ), rax->as_VMReg());
225 map->set_callee_saved(STACK_OFFSET( rcx_off ), rcx->as_VMReg());
226 map->set_callee_saved(STACK_OFFSET( rdx_off ), rdx->as_VMReg());
227 map->set_callee_saved(STACK_OFFSET( rbx_off ), rbx->as_VMReg());
228 // rbp location is known implicitly by the frame sender code, needs no oopmap
229 // and the location where rbp was saved by is ignored
230 map->set_callee_saved(STACK_OFFSET( rsi_off ), rsi->as_VMReg());
231 map->set_callee_saved(STACK_OFFSET( rdi_off ), rdi->as_VMReg());
232 map->set_callee_saved(STACK_OFFSET( r8_off ), r8->as_VMReg());
233 map->set_callee_saved(STACK_OFFSET( r9_off ), r9->as_VMReg());
234 map->set_callee_saved(STACK_OFFSET( r10_off ), r10->as_VMReg());
235 map->set_callee_saved(STACK_OFFSET( r11_off ), r11->as_VMReg());
236 map->set_callee_saved(STACK_OFFSET( r12_off ), r12->as_VMReg());
237 map->set_callee_saved(STACK_OFFSET( r13_off ), r13->as_VMReg());
238 map->set_callee_saved(STACK_OFFSET( r14_off ), r14->as_VMReg());
239 map->set_callee_saved(STACK_OFFSET( r15_off ), r15->as_VMReg());
240 // For both AVX and EVEX we will use the legacy FXSAVE area for xmm0..xmm15,
241 // on EVEX enabled targets, we get it included in the xsave area
242 off = xmm0_off;
243 int delta = xmm1_off - off;
244 for (int n = 0; n < 16; n++) {
245 XMMRegister xmm_name = as_XMMRegister(n);
246 map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg());
247 off += delta;
248 }
249 if(UseAVX > 2) {
250 // Obtain xmm16..xmm31 from the XSAVE area on EVEX enabled targets
251 off = zmm16_off;
252 delta = zmm17_off - off;
253 for (int n = 16; n < num_xmm_regs; n++) {
254 XMMRegister zmm_name = as_XMMRegister(n);
255 map->set_callee_saved(STACK_OFFSET(off), zmm_name->as_VMReg());
256 off += delta;
257 }
258 }
259
260 #if defined(COMPILER2) || INCLUDE_JVMCI
261 if (save_vectors) {
262 off = ymm0_off;
263 int delta = ymm1_off - off;
264 for (int n = 0; n < 16; n++) {
265 XMMRegister ymm_name = as_XMMRegister(n);
266 map->set_callee_saved(STACK_OFFSET(off), ymm_name->as_VMReg()->next(4));
267 off += delta;
268 }
269 }
270 #endif // COMPILER2 || INCLUDE_JVMCI
271
272 // %%% These should all be a waste but we'll keep things as they were for now
273 if (true) {
274 map->set_callee_saved(STACK_OFFSET( raxH_off ), rax->as_VMReg()->next());
275 map->set_callee_saved(STACK_OFFSET( rcxH_off ), rcx->as_VMReg()->next());
276 map->set_callee_saved(STACK_OFFSET( rdxH_off ), rdx->as_VMReg()->next());
277 map->set_callee_saved(STACK_OFFSET( rbxH_off ), rbx->as_VMReg()->next());
278 // rbp location is known implicitly by the frame sender code, needs no oopmap
279 map->set_callee_saved(STACK_OFFSET( rsiH_off ), rsi->as_VMReg()->next());
280 map->set_callee_saved(STACK_OFFSET( rdiH_off ), rdi->as_VMReg()->next());
281 map->set_callee_saved(STACK_OFFSET( r8H_off ), r8->as_VMReg()->next());
282 map->set_callee_saved(STACK_OFFSET( r9H_off ), r9->as_VMReg()->next());
283 map->set_callee_saved(STACK_OFFSET( r10H_off ), r10->as_VMReg()->next());
284 map->set_callee_saved(STACK_OFFSET( r11H_off ), r11->as_VMReg()->next());
285 map->set_callee_saved(STACK_OFFSET( r12H_off ), r12->as_VMReg()->next());
286 map->set_callee_saved(STACK_OFFSET( r13H_off ), r13->as_VMReg()->next());
287 map->set_callee_saved(STACK_OFFSET( r14H_off ), r14->as_VMReg()->next());
288 map->set_callee_saved(STACK_OFFSET( r15H_off ), r15->as_VMReg()->next());
289 // For both AVX and EVEX we will use the legacy FXSAVE area for xmm0..xmm15,
290 // on EVEX enabled targets, we get it included in the xsave area
291 off = xmm0H_off;
292 delta = xmm1H_off - off;
293 for (int n = 0; n < 16; n++) {
294 XMMRegister xmm_name = as_XMMRegister(n);
295 map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg()->next());
296 off += delta;
297 }
298 if (UseAVX > 2) {
299 // Obtain xmm16..xmm31 from the XSAVE area on EVEX enabled targets
300 off = zmm16H_off;
301 delta = zmm17H_off - off;
302 for (int n = 16; n < num_xmm_regs; n++) {
303 XMMRegister zmm_name = as_XMMRegister(n);
304 map->set_callee_saved(STACK_OFFSET(off), zmm_name->as_VMReg()->next());
305 off += delta;
306 }
307 }
308 }
309
310 return map;
311 }
312
313 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
314 int num_xmm_regs = XMMRegisterImpl::number_of_registers;
315 if (UseAVX < 3) {
316 num_xmm_regs = num_xmm_regs/2;
317 }
318 if (frame::arg_reg_save_area_bytes != 0) {
319 // Pop arg register save area
320 __ addptr(rsp, frame::arg_reg_save_area_bytes);
321 }
322
323 #if defined(COMPILER2) || INCLUDE_JVMCI
324 if (restore_vectors) {
325 assert(UseAVX > 0, "up to 512bit vectors are supported with EVEX");
326 assert(MaxVectorSize <= 64, "up to 512bit vectors are supported now");
327 }
328 #else
329 assert(!restore_vectors, "vectors are generated only by C2");
330 #endif
331
332 // On EVEX enabled targets everything is handled in pop fpu state
333 if (restore_vectors) {
334 // Restore upper half of YMM registers (0..15)
335 int base_addr = XSAVE_AREA_YMM_BEGIN;
336 for (int n = 0; n < 16; n++) {
337 __ vinsertf128_high(as_XMMRegister(n), Address(rsp, base_addr+n*16));
338 }
339 if (VM_Version::supports_evex()) {
340 // Restore upper half of ZMM registers (0..15)
341 base_addr = XSAVE_AREA_ZMM_BEGIN;
342 for (int n = 0; n < 16; n++) {
343 __ vinsertf64x4_high(as_XMMRegister(n), Address(rsp, base_addr+n*32));
344 }
345 // Restore full ZMM registers(16..num_xmm_regs)
346 base_addr = XSAVE_AREA_UPPERBANK;
347 int vector_len = Assembler::AVX_512bit;
348 int off = 0;
349 for (int n = 16; n < num_xmm_regs; n++) {
350 __ evmovdqul(as_XMMRegister(n), Address(rsp, base_addr+(off++*64)), vector_len);
351 }
352 }
353 } else {
354 if (VM_Version::supports_evex()) {
355 // Restore upper bank of ZMM registers(16..31) for double/float usage
356 int base_addr = XSAVE_AREA_UPPERBANK;
357 int off = 0;
358 for (int n = 16; n < num_xmm_regs; n++) {
359 __ movsd(as_XMMRegister(n), Address(rsp, base_addr+(off++*64)));
360 }
361 }
362 }
363
364 // Recover CPU state
365 __ pop_CPU_state();
366 // Get the rbp described implicitly by the calling convention (no oopMap)
367 __ pop(rbp);
368 }
369
370 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
371
372 // Just restore result register. Only used by deoptimization. By
373 // now any callee save register that needs to be restored to a c2
374 // caller of the deoptee has been extracted into the vframeArray
375 // and will be stuffed into the c2i adapter we create for later
376 // restoration so only result registers need to be restored here.
377
378 // Restore fp result register
379 __ movdbl(xmm0, Address(rsp, xmm0_offset_in_bytes()));
380 // Restore integer result register
381 __ movptr(rax, Address(rsp, rax_offset_in_bytes()));
382 __ movptr(rdx, Address(rsp, rdx_offset_in_bytes()));
383
384 // Pop all of the register save are off the stack except the return address
385 __ addptr(rsp, return_offset_in_bytes());
386 }
387
388 // Is vector's size (in bytes) bigger than a size saved by default?
389 // 16 bytes XMM registers are saved by default using fxsave/fxrstor instructions.
390 bool SharedRuntime::is_wide_vector(int size) {
391 return size > 16;
392 }
393
394 size_t SharedRuntime::trampoline_size() {
395 return 16;
396 }
397
398 void SharedRuntime::generate_trampoline(MacroAssembler *masm, address destination) {
399 __ jump(RuntimeAddress(destination));
400 }
401
402 // The java_calling_convention describes stack locations as ideal slots on
403 // a frame with no abi restrictions. Since we must observe abi restrictions
404 // (like the placement of the register window) the slots must be biased by
405 // the following value.
406 static int reg2offset_in(VMReg r) {
407 // Account for saved rbp and return address
408 // This should really be in_preserve_stack_slots
409 return (r->reg2stack() + 4) * VMRegImpl::stack_slot_size;
410 }
411
412 static int reg2offset_out(VMReg r) {
413 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
414 }
415
416 // ---------------------------------------------------------------------------
417 // Read the array of BasicTypes from a signature, and compute where the
418 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
419 // quantities. Values less than VMRegImpl::stack0 are registers, those above
420 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
421 // as framesizes are fixed.
422 // VMRegImpl::stack0 refers to the first slot 0(sp).
423 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
424 // up to RegisterImpl::number_of_registers) are the 64-bit
425 // integer registers.
426
427 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
428 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
429 // units regardless of build. Of course for i486 there is no 64 bit build
430
431 // The Java calling convention is a "shifted" version of the C ABI.
432 // By skipping the first C ABI register we can call non-static jni methods
433 // with small numbers of arguments without having to shuffle the arguments
434 // at all. Since we control the java ABI we ought to at least get some
435 // advantage out of it.
436
437 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
438 VMRegPair *regs,
439 int total_args_passed,
440 int is_outgoing) {
441
442 // Create the mapping between argument positions and
443 // registers.
444 static const Register INT_ArgReg[Argument::n_int_register_parameters_j] = {
445 j_rarg0, j_rarg1, j_rarg2, j_rarg3, j_rarg4, j_rarg5
446 };
447 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_j] = {
448 j_farg0, j_farg1, j_farg2, j_farg3,
449 j_farg4, j_farg5, j_farg6, j_farg7
450 };
451
452
453 uint int_args = 0;
454 uint fp_args = 0;
455 uint stk_args = 0; // inc by 2 each time
456
457 for (int i = 0; i < total_args_passed; i++) {
458 switch (sig_bt[i]) {
459 case T_BOOLEAN:
460 case T_CHAR:
461 case T_BYTE:
462 case T_SHORT:
463 case T_INT:
464 if (int_args < Argument::n_int_register_parameters_j) {
465 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
466 } else {
467 regs[i].set1(VMRegImpl::stack2reg(stk_args));
468 stk_args += 2;
469 }
470 break;
471 case T_VOID:
472 // halves of T_LONG or T_DOUBLE
473 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
474 regs[i].set_bad();
475 break;
476 case T_LONG:
477 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
478 // fall through
479 case T_OBJECT:
480 case T_ARRAY:
481 case T_ADDRESS:
482 if (int_args < Argument::n_int_register_parameters_j) {
483 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
484 } else {
485 regs[i].set2(VMRegImpl::stack2reg(stk_args));
486 stk_args += 2;
487 }
488 break;
489 case T_FLOAT:
490 if (fp_args < Argument::n_float_register_parameters_j) {
491 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
492 } else {
493 regs[i].set1(VMRegImpl::stack2reg(stk_args));
494 stk_args += 2;
495 }
496 break;
497 case T_DOUBLE:
498 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
499 if (fp_args < Argument::n_float_register_parameters_j) {
500 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
501 } else {
502 regs[i].set2(VMRegImpl::stack2reg(stk_args));
503 stk_args += 2;
504 }
505 break;
506 default:
507 ShouldNotReachHere();
508 break;
509 }
510 }
511
512 return round_to(stk_args, 2);
513 }
514
515 // Patch the callers callsite with entry to compiled code if it exists.
516 static void patch_callers_callsite(MacroAssembler *masm) {
517 Label L;
518 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
519 __ jcc(Assembler::equal, L);
520
521 // Save the current stack pointer
522 __ mov(r13, rsp);
523 // Schedule the branch target address early.
524 // Call into the VM to patch the caller, then jump to compiled callee
525 // rax isn't live so capture return address while we easily can
526 __ movptr(rax, Address(rsp, 0));
527
528 // align stack so push_CPU_state doesn't fault
529 __ andptr(rsp, -(StackAlignmentInBytes));
530 __ push_CPU_state();
531
532 // VM needs caller's callsite
533 // VM needs target method
534 // This needs to be a long call since we will relocate this adapter to
535 // the codeBuffer and it may not reach
536
537 // Allocate argument register save area
538 if (frame::arg_reg_save_area_bytes != 0) {
539 __ subptr(rsp, frame::arg_reg_save_area_bytes);
540 }
541 __ mov(c_rarg0, rbx);
542 __ mov(c_rarg1, rax);
543 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
544
545 // De-allocate argument register save area
546 if (frame::arg_reg_save_area_bytes != 0) {
547 __ addptr(rsp, frame::arg_reg_save_area_bytes);
548 }
549
550 __ pop_CPU_state();
551 // restore sp
552 __ mov(rsp, r13);
553 __ bind(L);
554 }
555
556
557 static void gen_c2i_adapter(MacroAssembler *masm,
558 int total_args_passed,
559 int comp_args_on_stack,
560 const BasicType *sig_bt,
561 const VMRegPair *regs,
562 Label& skip_fixup) {
563 // Before we get into the guts of the C2I adapter, see if we should be here
564 // at all. We've come from compiled code and are attempting to jump to the
565 // interpreter, which means the caller made a static call to get here
566 // (vcalls always get a compiled target if there is one). Check for a
567 // compiled target. If there is one, we need to patch the caller's call.
568 patch_callers_callsite(masm);
569
570 __ bind(skip_fixup);
571
572 // Since all args are passed on the stack, total_args_passed *
573 // Interpreter::stackElementSize is the space we need. Plus 1 because
574 // we also account for the return address location since
575 // we store it first rather than hold it in rax across all the shuffling
576
577 int extraspace = (total_args_passed * Interpreter::stackElementSize) + wordSize;
578
579 // stack is aligned, keep it that way
580 extraspace = round_to(extraspace, 2*wordSize);
581
582 // Get return address
583 __ pop(rax);
584
585 // set senderSP value
586 __ mov(r13, rsp);
587
588 __ subptr(rsp, extraspace);
589
590 // Store the return address in the expected location
591 __ movptr(Address(rsp, 0), rax);
592
593 // Now write the args into the outgoing interpreter space
594 for (int i = 0; i < total_args_passed; i++) {
595 if (sig_bt[i] == T_VOID) {
596 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
597 continue;
598 }
599
600 // offset to start parameters
601 int st_off = (total_args_passed - i) * Interpreter::stackElementSize;
602 int next_off = st_off - Interpreter::stackElementSize;
603
604 // Say 4 args:
605 // i st_off
606 // 0 32 T_LONG
607 // 1 24 T_VOID
608 // 2 16 T_OBJECT
609 // 3 8 T_BOOL
610 // - 0 return address
611 //
612 // However to make thing extra confusing. Because we can fit a long/double in
613 // a single slot on a 64 bt vm and it would be silly to break them up, the interpreter
614 // leaves one slot empty and only stores to a single slot. In this case the
615 // slot that is occupied is the T_VOID slot. See I said it was confusing.
616
617 VMReg r_1 = regs[i].first();
618 VMReg r_2 = regs[i].second();
619 if (!r_1->is_valid()) {
620 assert(!r_2->is_valid(), "");
621 continue;
622 }
623 if (r_1->is_stack()) {
624 // memory to memory use rax
625 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
626 if (!r_2->is_valid()) {
627 // sign extend??
628 __ movl(rax, Address(rsp, ld_off));
629 __ movptr(Address(rsp, st_off), rax);
630
631 } else {
632
633 __ movq(rax, Address(rsp, ld_off));
634
635 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
636 // T_DOUBLE and T_LONG use two slots in the interpreter
637 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
638 // ld_off == LSW, ld_off+wordSize == MSW
639 // st_off == MSW, next_off == LSW
640 __ movq(Address(rsp, next_off), rax);
641 #ifdef ASSERT
642 // Overwrite the unused slot with known junk
643 __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
644 __ movptr(Address(rsp, st_off), rax);
645 #endif /* ASSERT */
646 } else {
647 __ movq(Address(rsp, st_off), rax);
648 }
649 }
650 } else if (r_1->is_Register()) {
651 Register r = r_1->as_Register();
652 if (!r_2->is_valid()) {
653 // must be only an int (or less ) so move only 32bits to slot
654 // why not sign extend??
655 __ movl(Address(rsp, st_off), r);
656 } else {
657 // Two VMREgs|OptoRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
658 // T_DOUBLE and T_LONG use two slots in the interpreter
659 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
660 // long/double in gpr
661 #ifdef ASSERT
662 // Overwrite the unused slot with known junk
663 __ mov64(rax, CONST64(0xdeadffffdeadaaab));
664 __ movptr(Address(rsp, st_off), rax);
665 #endif /* ASSERT */
666 __ movq(Address(rsp, next_off), r);
667 } else {
668 __ movptr(Address(rsp, st_off), r);
669 }
670 }
671 } else {
672 assert(r_1->is_XMMRegister(), "");
673 if (!r_2->is_valid()) {
674 // only a float use just part of the slot
675 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
676 } else {
677 #ifdef ASSERT
678 // Overwrite the unused slot with known junk
679 __ mov64(rax, CONST64(0xdeadffffdeadaaac));
680 __ movptr(Address(rsp, st_off), rax);
681 #endif /* ASSERT */
682 __ movdbl(Address(rsp, next_off), r_1->as_XMMRegister());
683 }
684 }
685 }
686
687 // Schedule the branch target address early.
688 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
689 __ jmp(rcx);
690 }
691
692 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
693 address code_start, address code_end,
694 Label& L_ok) {
695 Label L_fail;
696 __ lea(temp_reg, ExternalAddress(code_start));
697 __ cmpptr(pc_reg, temp_reg);
698 __ jcc(Assembler::belowEqual, L_fail);
699 __ lea(temp_reg, ExternalAddress(code_end));
700 __ cmpptr(pc_reg, temp_reg);
701 __ jcc(Assembler::below, L_ok);
702 __ bind(L_fail);
703 }
704
705 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
706 int total_args_passed,
707 int comp_args_on_stack,
708 const BasicType *sig_bt,
709 const VMRegPair *regs) {
710
711 // Note: r13 contains the senderSP on entry. We must preserve it since
712 // we may do a i2c -> c2i transition if we lose a race where compiled
713 // code goes non-entrant while we get args ready.
714 // In addition we use r13 to locate all the interpreter args as
715 // we must align the stack to 16 bytes on an i2c entry else we
716 // lose alignment we expect in all compiled code and register
717 // save code can segv when fxsave instructions find improperly
718 // aligned stack pointer.
719
720 // Adapters can be frameless because they do not require the caller
721 // to perform additional cleanup work, such as correcting the stack pointer.
722 // An i2c adapter is frameless because the *caller* frame, which is interpreted,
723 // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
724 // even if a callee has modified the stack pointer.
725 // A c2i adapter is frameless because the *callee* frame, which is interpreted,
726 // routinely repairs its caller's stack pointer (from sender_sp, which is set
727 // up via the senderSP register).
728 // In other words, if *either* the caller or callee is interpreted, we can
729 // get the stack pointer repaired after a call.
730 // This is why c2i and i2c adapters cannot be indefinitely composed.
731 // In particular, if a c2i adapter were to somehow call an i2c adapter,
732 // both caller and callee would be compiled methods, and neither would
733 // clean up the stack pointer changes performed by the two adapters.
734 // If this happens, control eventually transfers back to the compiled
735 // caller, but with an uncorrected stack, causing delayed havoc.
736
737 // Pick up the return address
738 __ movptr(rax, Address(rsp, 0));
739
740 if (VerifyAdapterCalls &&
741 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
742 // So, let's test for cascading c2i/i2c adapters right now.
743 // assert(Interpreter::contains($return_addr) ||
744 // StubRoutines::contains($return_addr),
745 // "i2c adapter must return to an interpreter frame");
746 __ block_comment("verify_i2c { ");
747 Label L_ok;
748 if (Interpreter::code() != NULL)
749 range_check(masm, rax, r11,
750 Interpreter::code()->code_start(), Interpreter::code()->code_end(),
751 L_ok);
752 if (StubRoutines::code1() != NULL)
753 range_check(masm, rax, r11,
754 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
755 L_ok);
756 if (StubRoutines::code2() != NULL)
757 range_check(masm, rax, r11,
758 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
759 L_ok);
760 const char* msg = "i2c adapter must return to an interpreter frame";
761 __ block_comment(msg);
762 __ stop(msg);
763 __ bind(L_ok);
764 __ block_comment("} verify_i2ce ");
765 }
766
767 // Must preserve original SP for loading incoming arguments because
768 // we need to align the outgoing SP for compiled code.
769 __ movptr(r11, rsp);
770
771 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
772 // in registers, we will occasionally have no stack args.
773 int comp_words_on_stack = 0;
774 if (comp_args_on_stack) {
775 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
776 // registers are below. By subtracting stack0, we either get a negative
777 // number (all values in registers) or the maximum stack slot accessed.
778
779 // Convert 4-byte c2 stack slots to words.
780 comp_words_on_stack = round_to(comp_args_on_stack*VMRegImpl::stack_slot_size, wordSize)>>LogBytesPerWord;
781 // Round up to miminum stack alignment, in wordSize
782 comp_words_on_stack = round_to(comp_words_on_stack, 2);
783 __ subptr(rsp, comp_words_on_stack * wordSize);
784 }
785
786
787 // Ensure compiled code always sees stack at proper alignment
788 __ andptr(rsp, -16);
789
790 // push the return address and misalign the stack that youngest frame always sees
791 // as far as the placement of the call instruction
792 __ push(rax);
793
794 // Put saved SP in another register
795 const Register saved_sp = rax;
796 __ movptr(saved_sp, r11);
797
798 // Will jump to the compiled code just as if compiled code was doing it.
799 // Pre-load the register-jump target early, to schedule it better.
800 __ movptr(r11, Address(rbx, in_bytes(Method::from_compiled_offset())));
801
802 #if INCLUDE_JVMCI
803 if (EnableJVMCI || UseAOT) {
804 // check if this call should be routed towards a specific entry point
805 __ cmpptr(Address(r15_thread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())), 0);
806 Label no_alternative_target;
807 __ jcc(Assembler::equal, no_alternative_target);
808 __ movptr(r11, Address(r15_thread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())));
809 __ movptr(Address(r15_thread, in_bytes(JavaThread::jvmci_alternate_call_target_offset())), 0);
810 __ bind(no_alternative_target);
811 }
812 #endif // INCLUDE_JVMCI
813
814 // Now generate the shuffle code. Pick up all register args and move the
815 // rest through the floating point stack top.
816 for (int i = 0; i < total_args_passed; i++) {
817 if (sig_bt[i] == T_VOID) {
818 // Longs and doubles are passed in native word order, but misaligned
819 // in the 32-bit build.
820 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
821 continue;
822 }
823
824 // Pick up 0, 1 or 2 words from SP+offset.
825
826 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
827 "scrambled load targets?");
828 // Load in argument order going down.
829 int ld_off = (total_args_passed - i)*Interpreter::stackElementSize;
830 // Point to interpreter value (vs. tag)
831 int next_off = ld_off - Interpreter::stackElementSize;
832 //
833 //
834 //
835 VMReg r_1 = regs[i].first();
836 VMReg r_2 = regs[i].second();
837 if (!r_1->is_valid()) {
838 assert(!r_2->is_valid(), "");
839 continue;
840 }
841 if (r_1->is_stack()) {
842 // Convert stack slot to an SP offset (+ wordSize to account for return address )
843 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
844
845 // We can use r13 as a temp here because compiled code doesn't need r13 as an input
846 // and if we end up going thru a c2i because of a miss a reasonable value of r13
847 // will be generated.
848 if (!r_2->is_valid()) {
849 // sign extend???
850 __ movl(r13, Address(saved_sp, ld_off));
851 __ movptr(Address(rsp, st_off), r13);
852 } else {
853 //
854 // We are using two optoregs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
855 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
856 // So we must adjust where to pick up the data to match the interpreter.
857 //
858 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
859 // are accessed as negative so LSW is at LOW address
860
861 // ld_off is MSW so get LSW
862 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
863 next_off : ld_off;
864 __ movq(r13, Address(saved_sp, offset));
865 // st_off is LSW (i.e. reg.first())
866 __ movq(Address(rsp, st_off), r13);
867 }
868 } else if (r_1->is_Register()) { // Register argument
869 Register r = r_1->as_Register();
870 assert(r != rax, "must be different");
871 if (r_2->is_valid()) {
872 //
873 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
874 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
875 // So we must adjust where to pick up the data to match the interpreter.
876
877 const int offset = (sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
878 next_off : ld_off;
879
880 // this can be a misaligned move
881 __ movq(r, Address(saved_sp, offset));
882 } else {
883 // sign extend and use a full word?
884 __ movl(r, Address(saved_sp, ld_off));
885 }
886 } else {
887 if (!r_2->is_valid()) {
888 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
889 } else {
890 __ movdbl(r_1->as_XMMRegister(), Address(saved_sp, next_off));
891 }
892 }
893 }
894
895 // 6243940 We might end up in handle_wrong_method if
896 // the callee is deoptimized as we race thru here. If that
897 // happens we don't want to take a safepoint because the
898 // caller frame will look interpreted and arguments are now
899 // "compiled" so it is much better to make this transition
900 // invisible to the stack walking code. Unfortunately if
901 // we try and find the callee by normal means a safepoint
902 // is possible. So we stash the desired callee in the thread
903 // and the vm will find there should this case occur.
904
905 __ movptr(Address(r15_thread, JavaThread::callee_target_offset()), rbx);
906
907 // put Method* where a c2i would expect should we end up there
908 // only needed becaus eof c2 resolve stubs return Method* as a result in
909 // rax
910 __ mov(rax, rbx);
911 __ jmp(r11);
912 }
913
914 // ---------------------------------------------------------------
915 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
916 int total_args_passed,
917 int comp_args_on_stack,
918 const BasicType *sig_bt,
919 const VMRegPair *regs,
920 AdapterFingerPrint* fingerprint) {
921 address i2c_entry = __ pc();
922
923 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
924
925 // -------------------------------------------------------------------------
926 // Generate a C2I adapter. On entry we know rbx holds the Method* during calls
927 // to the interpreter. The args start out packed in the compiled layout. They
928 // need to be unpacked into the interpreter layout. This will almost always
929 // require some stack space. We grow the current (compiled) stack, then repack
930 // the args. We finally end in a jump to the generic interpreter entry point.
931 // On exit from the interpreter, the interpreter will restore our SP (lest the
932 // compiled code, which relys solely on SP and not RBP, get sick).
933
934 address c2i_unverified_entry = __ pc();
935 Label skip_fixup;
936 Label ok;
937
938 Register holder = rax;
939 Register receiver = j_rarg0;
940 Register temp = rbx;
941
942 {
943 __ load_klass(temp, receiver);
944 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset()));
945 __ movptr(rbx, Address(holder, CompiledICHolder::holder_method_offset()));
946 __ jcc(Assembler::equal, ok);
947 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
948
949 __ bind(ok);
950 // Method might have been compiled since the call site was patched to
951 // interpreted if that is the case treat it as a miss so we can get
952 // the call site corrected.
953 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
954 __ jcc(Assembler::equal, skip_fixup);
955 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
956 }
957
958 address c2i_entry = __ pc();
959
960 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
961
962 __ flush();
963 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
964 }
965
966 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
967 VMRegPair *regs,
968 VMRegPair *regs2,
969 int total_args_passed) {
970 assert(regs2 == NULL, "not needed on x86");
971 // We return the amount of VMRegImpl stack slots we need to reserve for all
972 // the arguments NOT counting out_preserve_stack_slots.
973
974 // NOTE: These arrays will have to change when c1 is ported
975 #ifdef _WIN64
976 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
977 c_rarg0, c_rarg1, c_rarg2, c_rarg3
978 };
979 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
980 c_farg0, c_farg1, c_farg2, c_farg3
981 };
982 #else
983 static const Register INT_ArgReg[Argument::n_int_register_parameters_c] = {
984 c_rarg0, c_rarg1, c_rarg2, c_rarg3, c_rarg4, c_rarg5
985 };
986 static const XMMRegister FP_ArgReg[Argument::n_float_register_parameters_c] = {
987 c_farg0, c_farg1, c_farg2, c_farg3,
988 c_farg4, c_farg5, c_farg6, c_farg7
989 };
990 #endif // _WIN64
991
992
993 uint int_args = 0;
994 uint fp_args = 0;
995 uint stk_args = 0; // inc by 2 each time
996
997 for (int i = 0; i < total_args_passed; i++) {
998 switch (sig_bt[i]) {
999 case T_BOOLEAN:
1000 case T_CHAR:
1001 case T_BYTE:
1002 case T_SHORT:
1003 case T_INT:
1004 if (int_args < Argument::n_int_register_parameters_c) {
1005 regs[i].set1(INT_ArgReg[int_args++]->as_VMReg());
1006 #ifdef _WIN64
1007 fp_args++;
1008 // Allocate slots for callee to stuff register args the stack.
1009 stk_args += 2;
1010 #endif
1011 } else {
1012 regs[i].set1(VMRegImpl::stack2reg(stk_args));
1013 stk_args += 2;
1014 }
1015 break;
1016 case T_LONG:
1017 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
1018 // fall through
1019 case T_OBJECT:
1020 case T_ARRAY:
1021 case T_ADDRESS:
1022 case T_METADATA:
1023 if (int_args < Argument::n_int_register_parameters_c) {
1024 regs[i].set2(INT_ArgReg[int_args++]->as_VMReg());
1025 #ifdef _WIN64
1026 fp_args++;
1027 stk_args += 2;
1028 #endif
1029 } else {
1030 regs[i].set2(VMRegImpl::stack2reg(stk_args));
1031 stk_args += 2;
1032 }
1033 break;
1034 case T_FLOAT:
1035 if (fp_args < Argument::n_float_register_parameters_c) {
1036 regs[i].set1(FP_ArgReg[fp_args++]->as_VMReg());
1037 #ifdef _WIN64
1038 int_args++;
1039 // Allocate slots for callee to stuff register args the stack.
1040 stk_args += 2;
1041 #endif
1042 } else {
1043 regs[i].set1(VMRegImpl::stack2reg(stk_args));
1044 stk_args += 2;
1045 }
1046 break;
1047 case T_DOUBLE:
1048 assert((i + 1) < total_args_passed && sig_bt[i + 1] == T_VOID, "expecting half");
1049 if (fp_args < Argument::n_float_register_parameters_c) {
1050 regs[i].set2(FP_ArgReg[fp_args++]->as_VMReg());
1051 #ifdef _WIN64
1052 int_args++;
1053 // Allocate slots for callee to stuff register args the stack.
1054 stk_args += 2;
1055 #endif
1056 } else {
1057 regs[i].set2(VMRegImpl::stack2reg(stk_args));
1058 stk_args += 2;
1059 }
1060 break;
1061 case T_VOID: // Halves of longs and doubles
1062 assert(i != 0 && (sig_bt[i - 1] == T_LONG || sig_bt[i - 1] == T_DOUBLE), "expecting half");
1063 regs[i].set_bad();
1064 break;
1065 default:
1066 ShouldNotReachHere();
1067 break;
1068 }
1069 }
1070 #ifdef _WIN64
1071 // windows abi requires that we always allocate enough stack space
1072 // for 4 64bit registers to be stored down.
1073 if (stk_args < 8) {
1074 stk_args = 8;
1075 }
1076 #endif // _WIN64
1077
1078 return stk_args;
1079 }
1080
1081 // On 64 bit we will store integer like items to the stack as
1082 // 64 bits items (sparc abi) even though java would only store
1083 // 32bits for a parameter. On 32bit it will simply be 32 bits
1084 // So this routine will do 32->32 on 32bit and 32->64 on 64bit
1085 static void move32_64(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1086 if (src.first()->is_stack()) {
1087 if (dst.first()->is_stack()) {
1088 // stack to stack
1089 __ movslq(rax, Address(rbp, reg2offset_in(src.first())));
1090 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1091 } else {
1092 // stack to reg
1093 __ movslq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1094 }
1095 } else if (dst.first()->is_stack()) {
1096 // reg to stack
1097 // Do we really have to sign extend???
1098 // __ movslq(src.first()->as_Register(), src.first()->as_Register());
1099 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1100 } else {
1101 // Do we really have to sign extend???
1102 // __ movslq(dst.first()->as_Register(), src.first()->as_Register());
1103 if (dst.first() != src.first()) {
1104 __ movq(dst.first()->as_Register(), src.first()->as_Register());
1105 }
1106 }
1107 }
1108
1109 static void move_ptr(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1110 if (src.first()->is_stack()) {
1111 if (dst.first()->is_stack()) {
1112 // stack to stack
1113 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1114 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1115 } else {
1116 // stack to reg
1117 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1118 }
1119 } else if (dst.first()->is_stack()) {
1120 // reg to stack
1121 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1122 } else {
1123 if (dst.first() != src.first()) {
1124 __ movq(dst.first()->as_Register(), src.first()->as_Register());
1125 }
1126 }
1127 }
1128
1129 // An oop arg. Must pass a handle not the oop itself
1130 static void object_move(MacroAssembler* masm,
1131 OopMap* map,
1132 int oop_handle_offset,
1133 int framesize_in_slots,
1134 VMRegPair src,
1135 VMRegPair dst,
1136 bool is_receiver,
1137 int* receiver_offset) {
1138
1139 // must pass a handle. First figure out the location we use as a handle
1140
1141 Register rHandle = dst.first()->is_stack() ? rax : dst.first()->as_Register();
1142
1143 // See if oop is NULL if it is we need no handle
1144
1145 if (src.first()->is_stack()) {
1146
1147 // Oop is already on the stack as an argument
1148 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1149 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1150 if (is_receiver) {
1151 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1152 }
1153
1154 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
1155 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1156 // conditionally move a NULL
1157 __ cmovptr(Assembler::equal, rHandle, Address(rbp, reg2offset_in(src.first())));
1158 } else {
1159
1160 // Oop is in an a register we must store it to the space we reserve
1161 // on the stack for oop_handles and pass a handle if oop is non-NULL
1162
1163 const Register rOop = src.first()->as_Register();
1164 int oop_slot;
1165 if (rOop == j_rarg0)
1166 oop_slot = 0;
1167 else if (rOop == j_rarg1)
1168 oop_slot = 1;
1169 else if (rOop == j_rarg2)
1170 oop_slot = 2;
1171 else if (rOop == j_rarg3)
1172 oop_slot = 3;
1173 else if (rOop == j_rarg4)
1174 oop_slot = 4;
1175 else {
1176 assert(rOop == j_rarg5, "wrong register");
1177 oop_slot = 5;
1178 }
1179
1180 oop_slot = oop_slot * VMRegImpl::slots_per_word + oop_handle_offset;
1181 int offset = oop_slot*VMRegImpl::stack_slot_size;
1182
1183 map->set_oop(VMRegImpl::stack2reg(oop_slot));
1184 // Store oop in handle area, may be NULL
1185 __ movptr(Address(rsp, offset), rOop);
1186 if (is_receiver) {
1187 *receiver_offset = offset;
1188 }
1189
1190 __ cmpptr(rOop, (int32_t)NULL_WORD);
1191 __ lea(rHandle, Address(rsp, offset));
1192 // conditionally move a NULL from the handle area where it was just stored
1193 __ cmovptr(Assembler::equal, rHandle, Address(rsp, offset));
1194 }
1195
1196 // If arg is on the stack then place it otherwise it is already in correct reg.
1197 if (dst.first()->is_stack()) {
1198 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1199 }
1200 }
1201
1202 // A float arg may have to do float reg int reg conversion
1203 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1204 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1205
1206 // The calling conventions assures us that each VMregpair is either
1207 // all really one physical register or adjacent stack slots.
1208 // This greatly simplifies the cases here compared to sparc.
1209
1210 if (src.first()->is_stack()) {
1211 if (dst.first()->is_stack()) {
1212 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1213 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1214 } else {
1215 // stack to reg
1216 assert(dst.first()->is_XMMRegister(), "only expect xmm registers as parameters");
1217 __ movflt(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_in(src.first())));
1218 }
1219 } else if (dst.first()->is_stack()) {
1220 // reg to stack
1221 assert(src.first()->is_XMMRegister(), "only expect xmm registers as parameters");
1222 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1223 } else {
1224 // reg to reg
1225 // In theory these overlap but the ordering is such that this is likely a nop
1226 if ( src.first() != dst.first()) {
1227 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
1228 }
1229 }
1230 }
1231
1232 // A long move
1233 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1234
1235 // The calling conventions assures us that each VMregpair is either
1236 // all really one physical register or adjacent stack slots.
1237 // This greatly simplifies the cases here compared to sparc.
1238
1239 if (src.is_single_phys_reg() ) {
1240 if (dst.is_single_phys_reg()) {
1241 if (dst.first() != src.first()) {
1242 __ mov(dst.first()->as_Register(), src.first()->as_Register());
1243 }
1244 } else {
1245 assert(dst.is_single_reg(), "not a stack pair");
1246 __ movq(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1247 }
1248 } else if (dst.is_single_phys_reg()) {
1249 assert(src.is_single_reg(), "not a stack pair");
1250 __ movq(dst.first()->as_Register(), Address(rbp, reg2offset_out(src.first())));
1251 } else {
1252 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
1253 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1254 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1255 }
1256 }
1257
1258 // A double move
1259 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1260
1261 // The calling conventions assures us that each VMregpair is either
1262 // all really one physical register or adjacent stack slots.
1263 // This greatly simplifies the cases here compared to sparc.
1264
1265 if (src.is_single_phys_reg() ) {
1266 if (dst.is_single_phys_reg()) {
1267 // In theory these overlap but the ordering is such that this is likely a nop
1268 if ( src.first() != dst.first()) {
1269 __ movdbl(dst.first()->as_XMMRegister(), src.first()->as_XMMRegister());
1270 }
1271 } else {
1272 assert(dst.is_single_reg(), "not a stack pair");
1273 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1274 }
1275 } else if (dst.is_single_phys_reg()) {
1276 assert(src.is_single_reg(), "not a stack pair");
1277 __ movdbl(dst.first()->as_XMMRegister(), Address(rbp, reg2offset_out(src.first())));
1278 } else {
1279 assert(src.is_single_reg() && dst.is_single_reg(), "not stack pairs");
1280 __ movq(rax, Address(rbp, reg2offset_in(src.first())));
1281 __ movq(Address(rsp, reg2offset_out(dst.first())), rax);
1282 }
1283 }
1284
1285
1286 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1287 // We always ignore the frame_slots arg and just use the space just below frame pointer
1288 // which by this time is free to use
1289 switch (ret_type) {
1290 case T_FLOAT:
1291 __ movflt(Address(rbp, -wordSize), xmm0);
1292 break;
1293 case T_DOUBLE:
1294 __ movdbl(Address(rbp, -wordSize), xmm0);
1295 break;
1296 case T_VOID: break;
1297 default: {
1298 __ movptr(Address(rbp, -wordSize), rax);
1299 }
1300 }
1301 }
1302
1303 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1304 // We always ignore the frame_slots arg and just use the space just below frame pointer
1305 // which by this time is free to use
1306 switch (ret_type) {
1307 case T_FLOAT:
1308 __ movflt(xmm0, Address(rbp, -wordSize));
1309 break;
1310 case T_DOUBLE:
1311 __ movdbl(xmm0, Address(rbp, -wordSize));
1312 break;
1313 case T_VOID: break;
1314 default: {
1315 __ movptr(rax, Address(rbp, -wordSize));
1316 }
1317 }
1318 }
1319
1320 static void save_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1321 for ( int i = first_arg ; i < arg_count ; i++ ) {
1322 if (args[i].first()->is_Register()) {
1323 __ push(args[i].first()->as_Register());
1324 } else if (args[i].first()->is_XMMRegister()) {
1325 __ subptr(rsp, 2*wordSize);
1326 __ movdbl(Address(rsp, 0), args[i].first()->as_XMMRegister());
1327 }
1328 }
1329 }
1330
1331 static void restore_args(MacroAssembler *masm, int arg_count, int first_arg, VMRegPair *args) {
1332 for ( int i = arg_count - 1 ; i >= first_arg ; i-- ) {
1333 if (args[i].first()->is_Register()) {
1334 __ pop(args[i].first()->as_Register());
1335 } else if (args[i].first()->is_XMMRegister()) {
1336 __ movdbl(args[i].first()->as_XMMRegister(), Address(rsp, 0));
1337 __ addptr(rsp, 2*wordSize);
1338 }
1339 }
1340 }
1341
1342
1343 static void save_or_restore_arguments(MacroAssembler* masm,
1344 const int stack_slots,
1345 const int total_in_args,
1346 const int arg_save_area,
1347 OopMap* map,
1348 VMRegPair* in_regs,
1349 BasicType* in_sig_bt) {
1350 // if map is non-NULL then the code should store the values,
1351 // otherwise it should load them.
1352 int slot = arg_save_area;
1353 // Save down double word first
1354 for ( int i = 0; i < total_in_args; i++) {
1355 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) {
1356 int offset = slot * VMRegImpl::stack_slot_size;
1357 slot += VMRegImpl::slots_per_word;
1358 assert(slot <= stack_slots, "overflow");
1359 if (map != NULL) {
1360 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1361 } else {
1362 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1363 }
1364 }
1365 if (in_regs[i].first()->is_Register() &&
1366 (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_ARRAY)) {
1367 int offset = slot * VMRegImpl::stack_slot_size;
1368 if (map != NULL) {
1369 __ movq(Address(rsp, offset), in_regs[i].first()->as_Register());
1370 if (in_sig_bt[i] == T_ARRAY) {
1371 map->set_oop(VMRegImpl::stack2reg(slot));;
1372 }
1373 } else {
1374 __ movq(in_regs[i].first()->as_Register(), Address(rsp, offset));
1375 }
1376 slot += VMRegImpl::slots_per_word;
1377 }
1378 }
1379 // Save or restore single word registers
1380 for ( int i = 0; i < total_in_args; i++) {
1381 if (in_regs[i].first()->is_Register()) {
1382 int offset = slot * VMRegImpl::stack_slot_size;
1383 slot++;
1384 assert(slot <= stack_slots, "overflow");
1385
1386 // Value is in an input register pass we must flush it to the stack
1387 const Register reg = in_regs[i].first()->as_Register();
1388 switch (in_sig_bt[i]) {
1389 case T_BOOLEAN:
1390 case T_CHAR:
1391 case T_BYTE:
1392 case T_SHORT:
1393 case T_INT:
1394 if (map != NULL) {
1395 __ movl(Address(rsp, offset), reg);
1396 } else {
1397 __ movl(reg, Address(rsp, offset));
1398 }
1399 break;
1400 case T_ARRAY:
1401 case T_LONG:
1402 // handled above
1403 break;
1404 case T_OBJECT:
1405 default: ShouldNotReachHere();
1406 }
1407 } else if (in_regs[i].first()->is_XMMRegister()) {
1408 if (in_sig_bt[i] == T_FLOAT) {
1409 int offset = slot * VMRegImpl::stack_slot_size;
1410 slot++;
1411 assert(slot <= stack_slots, "overflow");
1412 if (map != NULL) {
1413 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1414 } else {
1415 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1416 }
1417 }
1418 } else if (in_regs[i].first()->is_stack()) {
1419 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1420 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1421 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1422 }
1423 }
1424 }
1425 }
1426
1427
1428 // Check GCLocker::needs_gc and enter the runtime if it's true. This
1429 // keeps a new JNI critical region from starting until a GC has been
1430 // forced. Save down any oops in registers and describe them in an
1431 // OopMap.
1432 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1433 int stack_slots,
1434 int total_c_args,
1435 int total_in_args,
1436 int arg_save_area,
1437 OopMapSet* oop_maps,
1438 VMRegPair* in_regs,
1439 BasicType* in_sig_bt) {
1440 __ block_comment("check GCLocker::needs_gc");
1441 Label cont;
1442 __ cmp8(ExternalAddress((address)GCLocker::needs_gc_address()), false);
1443 __ jcc(Assembler::equal, cont);
1444
1445 // Save down any incoming oops and call into the runtime to halt for a GC
1446
1447 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1448 save_or_restore_arguments(masm, stack_slots, total_in_args,
1449 arg_save_area, map, in_regs, in_sig_bt);
1450
1451 address the_pc = __ pc();
1452 oop_maps->add_gc_map( __ offset(), map);
1453 __ set_last_Java_frame(rsp, noreg, the_pc);
1454
1455 __ block_comment("block_for_jni_critical");
1456 __ movptr(c_rarg0, r15_thread);
1457 __ mov(r12, rsp); // remember sp
1458 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
1459 __ andptr(rsp, -16); // align stack as required by ABI
1460 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical)));
1461 __ mov(rsp, r12); // restore sp
1462 __ reinit_heapbase();
1463
1464 __ reset_last_Java_frame(false);
1465
1466 save_or_restore_arguments(masm, stack_slots, total_in_args,
1467 arg_save_area, NULL, in_regs, in_sig_bt);
1468
1469 __ bind(cont);
1470 #ifdef ASSERT
1471 if (StressCriticalJNINatives) {
1472 // Stress register saving
1473 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1474 save_or_restore_arguments(masm, stack_slots, total_in_args,
1475 arg_save_area, map, in_regs, in_sig_bt);
1476 // Destroy argument registers
1477 for (int i = 0; i < total_in_args - 1; i++) {
1478 if (in_regs[i].first()->is_Register()) {
1479 const Register reg = in_regs[i].first()->as_Register();
1480 __ xorptr(reg, reg);
1481 } else if (in_regs[i].first()->is_XMMRegister()) {
1482 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister());
1483 } else if (in_regs[i].first()->is_FloatRegister()) {
1484 ShouldNotReachHere();
1485 } else if (in_regs[i].first()->is_stack()) {
1486 // Nothing to do
1487 } else {
1488 ShouldNotReachHere();
1489 }
1490 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) {
1491 i++;
1492 }
1493 }
1494
1495 save_or_restore_arguments(masm, stack_slots, total_in_args,
1496 arg_save_area, NULL, in_regs, in_sig_bt);
1497 }
1498 #endif
1499 }
1500
1501 // Unpack an array argument into a pointer to the body and the length
1502 // if the array is non-null, otherwise pass 0 for both.
1503 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1504 Register tmp_reg = rax;
1505 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1506 "possible collision");
1507 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1508 "possible collision");
1509
1510 __ block_comment("unpack_array_argument {");
1511
1512 // Pass the length, ptr pair
1513 Label is_null, done;
1514 VMRegPair tmp;
1515 tmp.set_ptr(tmp_reg->as_VMReg());
1516 if (reg.first()->is_stack()) {
1517 // Load the arg up from the stack
1518 move_ptr(masm, reg, tmp);
1519 reg = tmp;
1520 }
1521 __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1522 __ jccb(Assembler::equal, is_null);
1523 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1524 move_ptr(masm, tmp, body_arg);
1525 // load the length relative to the body.
1526 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
1527 arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1528 move32_64(masm, tmp, length_arg);
1529 __ jmpb(done);
1530 __ bind(is_null);
1531 // Pass zeros
1532 __ xorptr(tmp_reg, tmp_reg);
1533 move_ptr(masm, tmp, body_arg);
1534 move32_64(masm, tmp, length_arg);
1535 __ bind(done);
1536
1537 __ block_comment("} unpack_array_argument");
1538 }
1539
1540
1541 // Different signatures may require very different orders for the move
1542 // to avoid clobbering other arguments. There's no simple way to
1543 // order them safely. Compute a safe order for issuing stores and
1544 // break any cycles in those stores. This code is fairly general but
1545 // it's not necessary on the other platforms so we keep it in the
1546 // platform dependent code instead of moving it into a shared file.
1547 // (See bugs 7013347 & 7145024.)
1548 // Note that this code is specific to LP64.
1549 class ComputeMoveOrder: public StackObj {
1550 class MoveOperation: public ResourceObj {
1551 friend class ComputeMoveOrder;
1552 private:
1553 VMRegPair _src;
1554 VMRegPair _dst;
1555 int _src_index;
1556 int _dst_index;
1557 bool _processed;
1558 MoveOperation* _next;
1559 MoveOperation* _prev;
1560
1561 static int get_id(VMRegPair r) {
1562 return r.first()->value();
1563 }
1564
1565 public:
1566 MoveOperation(int src_index, VMRegPair src, int dst_index, VMRegPair dst):
1567 _src(src)
1568 , _src_index(src_index)
1569 , _dst(dst)
1570 , _dst_index(dst_index)
1571 , _next(NULL)
1572 , _prev(NULL)
1573 , _processed(false) {
1574 }
1575
1576 VMRegPair src() const { return _src; }
1577 int src_id() const { return get_id(src()); }
1578 int src_index() const { return _src_index; }
1579 VMRegPair dst() const { return _dst; }
1580 void set_dst(int i, VMRegPair dst) { _dst_index = i, _dst = dst; }
1581 int dst_index() const { return _dst_index; }
1582 int dst_id() const { return get_id(dst()); }
1583 MoveOperation* next() const { return _next; }
1584 MoveOperation* prev() const { return _prev; }
1585 void set_processed() { _processed = true; }
1586 bool is_processed() const { return _processed; }
1587
1588 // insert
1589 void break_cycle(VMRegPair temp_register) {
1590 // create a new store following the last store
1591 // to move from the temp_register to the original
1592 MoveOperation* new_store = new MoveOperation(-1, temp_register, dst_index(), dst());
1593
1594 // break the cycle of links and insert new_store at the end
1595 // break the reverse link.
1596 MoveOperation* p = prev();
1597 assert(p->next() == this, "must be");
1598 _prev = NULL;
1599 p->_next = new_store;
1600 new_store->_prev = p;
1601
1602 // change the original store to save it's value in the temp.
1603 set_dst(-1, temp_register);
1604 }
1605
1606 void link(GrowableArray<MoveOperation*>& killer) {
1607 // link this store in front the store that it depends on
1608 MoveOperation* n = killer.at_grow(src_id(), NULL);
1609 if (n != NULL) {
1610 assert(_next == NULL && n->_prev == NULL, "shouldn't have been set yet");
1611 _next = n;
1612 n->_prev = this;
1613 }
1614 }
1615 };
1616
1617 private:
1618 GrowableArray<MoveOperation*> edges;
1619
1620 public:
1621 ComputeMoveOrder(int total_in_args, VMRegPair* in_regs, int total_c_args, VMRegPair* out_regs,
1622 BasicType* in_sig_bt, GrowableArray<int>& arg_order, VMRegPair tmp_vmreg) {
1623 // Move operations where the dest is the stack can all be
1624 // scheduled first since they can't interfere with the other moves.
1625 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
1626 if (in_sig_bt[i] == T_ARRAY) {
1627 c_arg--;
1628 if (out_regs[c_arg].first()->is_stack() &&
1629 out_regs[c_arg + 1].first()->is_stack()) {
1630 arg_order.push(i);
1631 arg_order.push(c_arg);
1632 } else {
1633 if (out_regs[c_arg].first()->is_stack() ||
1634 in_regs[i].first() == out_regs[c_arg].first()) {
1635 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg + 1]);
1636 } else {
1637 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]);
1638 }
1639 }
1640 } else if (in_sig_bt[i] == T_VOID) {
1641 arg_order.push(i);
1642 arg_order.push(c_arg);
1643 } else {
1644 if (out_regs[c_arg].first()->is_stack() ||
1645 in_regs[i].first() == out_regs[c_arg].first()) {
1646 arg_order.push(i);
1647 arg_order.push(c_arg);
1648 } else {
1649 add_edge(i, in_regs[i].first(), c_arg, out_regs[c_arg]);
1650 }
1651 }
1652 }
1653 // Break any cycles in the register moves and emit the in the
1654 // proper order.
1655 GrowableArray<MoveOperation*>* stores = get_store_order(tmp_vmreg);
1656 for (int i = 0; i < stores->length(); i++) {
1657 arg_order.push(stores->at(i)->src_index());
1658 arg_order.push(stores->at(i)->dst_index());
1659 }
1660 }
1661
1662 // Collected all the move operations
1663 void add_edge(int src_index, VMRegPair src, int dst_index, VMRegPair dst) {
1664 if (src.first() == dst.first()) return;
1665 edges.append(new MoveOperation(src_index, src, dst_index, dst));
1666 }
1667
1668 // Walk the edges breaking cycles between moves. The result list
1669 // can be walked in order to produce the proper set of loads
1670 GrowableArray<MoveOperation*>* get_store_order(VMRegPair temp_register) {
1671 // Record which moves kill which values
1672 GrowableArray<MoveOperation*> killer;
1673 for (int i = 0; i < edges.length(); i++) {
1674 MoveOperation* s = edges.at(i);
1675 assert(killer.at_grow(s->dst_id(), NULL) == NULL, "only one killer");
1676 killer.at_put_grow(s->dst_id(), s, NULL);
1677 }
1678 assert(killer.at_grow(MoveOperation::get_id(temp_register), NULL) == NULL,
1679 "make sure temp isn't in the registers that are killed");
1680
1681 // create links between loads and stores
1682 for (int i = 0; i < edges.length(); i++) {
1683 edges.at(i)->link(killer);
1684 }
1685
1686 // at this point, all the move operations are chained together
1687 // in a doubly linked list. Processing it backwards finds
1688 // the beginning of the chain, forwards finds the end. If there's
1689 // a cycle it can be broken at any point, so pick an edge and walk
1690 // backward until the list ends or we end where we started.
1691 GrowableArray<MoveOperation*>* stores = new GrowableArray<MoveOperation*>();
1692 for (int e = 0; e < edges.length(); e++) {
1693 MoveOperation* s = edges.at(e);
1694 if (!s->is_processed()) {
1695 MoveOperation* start = s;
1696 // search for the beginning of the chain or cycle
1697 while (start->prev() != NULL && start->prev() != s) {
1698 start = start->prev();
1699 }
1700 if (start->prev() == s) {
1701 start->break_cycle(temp_register);
1702 }
1703 // walk the chain forward inserting to store list
1704 while (start != NULL) {
1705 stores->append(start);
1706 start->set_processed();
1707 start = start->next();
1708 }
1709 }
1710 }
1711 return stores;
1712 }
1713 };
1714
1715 static void verify_oop_args(MacroAssembler* masm,
1716 const methodHandle& method,
1717 const BasicType* sig_bt,
1718 const VMRegPair* regs) {
1719 Register temp_reg = rbx; // not part of any compiled calling seq
1720 if (VerifyOops) {
1721 for (int i = 0; i < method->size_of_parameters(); i++) {
1722 if (sig_bt[i] == T_OBJECT ||
1723 sig_bt[i] == T_ARRAY) {
1724 VMReg r = regs[i].first();
1725 assert(r->is_valid(), "bad oop arg");
1726 if (r->is_stack()) {
1727 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1728 __ verify_oop(temp_reg);
1729 } else {
1730 __ verify_oop(r->as_Register());
1731 }
1732 }
1733 }
1734 }
1735 }
1736
1737 static void gen_special_dispatch(MacroAssembler* masm,
1738 methodHandle method,
1739 const BasicType* sig_bt,
1740 const VMRegPair* regs) {
1741 verify_oop_args(masm, method, sig_bt, regs);
1742 vmIntrinsics::ID iid = method->intrinsic_id();
1743
1744 // Now write the args into the outgoing interpreter space
1745 bool has_receiver = false;
1746 Register receiver_reg = noreg;
1747 int member_arg_pos = -1;
1748 Register member_reg = noreg;
1749 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1750 if (ref_kind != 0) {
1751 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1752 member_reg = rbx; // known to be free at this point
1753 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1754 } else if (iid == vmIntrinsics::_invokeBasic) {
1755 has_receiver = true;
1756 } else {
1757 fatal("unexpected intrinsic id %d", iid);
1758 }
1759
1760 if (member_reg != noreg) {
1761 // Load the member_arg into register, if necessary.
1762 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1763 VMReg r = regs[member_arg_pos].first();
1764 if (r->is_stack()) {
1765 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1766 } else {
1767 // no data motion is needed
1768 member_reg = r->as_Register();
1769 }
1770 }
1771
1772 if (has_receiver) {
1773 // Make sure the receiver is loaded into a register.
1774 assert(method->size_of_parameters() > 0, "oob");
1775 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1776 VMReg r = regs[0].first();
1777 assert(r->is_valid(), "bad receiver arg");
1778 if (r->is_stack()) {
1779 // Porting note: This assumes that compiled calling conventions always
1780 // pass the receiver oop in a register. If this is not true on some
1781 // platform, pick a temp and load the receiver from stack.
1782 fatal("receiver always in a register");
1783 receiver_reg = j_rarg0; // known to be free at this point
1784 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1785 } else {
1786 // no data motion is needed
1787 receiver_reg = r->as_Register();
1788 }
1789 }
1790
1791 // Figure out which address we are really jumping to:
1792 MethodHandles::generate_method_handle_dispatch(masm, iid,
1793 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1794 }
1795
1796 // ---------------------------------------------------------------------------
1797 // Generate a native wrapper for a given method. The method takes arguments
1798 // in the Java compiled code convention, marshals them to the native
1799 // convention (handlizes oops, etc), transitions to native, makes the call,
1800 // returns to java state (possibly blocking), unhandlizes any result and
1801 // returns.
1802 //
1803 // Critical native functions are a shorthand for the use of
1804 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1805 // functions. The wrapper is expected to unpack the arguments before
1806 // passing them to the callee and perform checks before and after the
1807 // native call to ensure that they GCLocker
1808 // lock_critical/unlock_critical semantics are followed. Some other
1809 // parts of JNI setup are skipped like the tear down of the JNI handle
1810 // block and the check for pending exceptions it's impossible for them
1811 // to be thrown.
1812 //
1813 // They are roughly structured like this:
1814 // if (GCLocker::needs_gc())
1815 // SharedRuntime::block_for_jni_critical();
1816 // tranistion to thread_in_native
1817 // unpack arrray arguments and call native entry point
1818 // check for safepoint in progress
1819 // check if any thread suspend flags are set
1820 // call into JVM and possible unlock the JNI critical
1821 // if a GC was suppressed while in the critical native.
1822 // transition back to thread_in_Java
1823 // return to caller
1824 //
1825 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1826 const methodHandle& method,
1827 int compile_id,
1828 BasicType* in_sig_bt,
1829 VMRegPair* in_regs,
1830 BasicType ret_type) {
1831 if (method->is_method_handle_intrinsic()) {
1832 vmIntrinsics::ID iid = method->intrinsic_id();
1833 intptr_t start = (intptr_t)__ pc();
1834 int vep_offset = ((intptr_t)__ pc()) - start;
1835 gen_special_dispatch(masm,
1836 method,
1837 in_sig_bt,
1838 in_regs);
1839 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1840 __ flush();
1841 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1842 return nmethod::new_native_nmethod(method,
1843 compile_id,
1844 masm->code(),
1845 vep_offset,
1846 frame_complete,
1847 stack_slots / VMRegImpl::slots_per_word,
1848 in_ByteSize(-1),
1849 in_ByteSize(-1),
1850 (OopMapSet*)NULL);
1851 }
1852 bool is_critical_native = true;
1853 address native_func = method->critical_native_function();
1854 if (native_func == NULL) {
1855 native_func = method->native_function();
1856 is_critical_native = false;
1857 }
1858 assert(native_func != NULL, "must have function");
1859
1860 // An OopMap for lock (and class if static)
1861 OopMapSet *oop_maps = new OopMapSet();
1862 intptr_t start = (intptr_t)__ pc();
1863
1864 // We have received a description of where all the java arg are located
1865 // on entry to the wrapper. We need to convert these args to where
1866 // the jni function will expect them. To figure out where they go
1867 // we convert the java signature to a C signature by inserting
1868 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1869
1870 const int total_in_args = method->size_of_parameters();
1871 int total_c_args = total_in_args;
1872 if (!is_critical_native) {
1873 total_c_args += 1;
1874 if (method->is_static()) {
1875 total_c_args++;
1876 }
1877 } else {
1878 for (int i = 0; i < total_in_args; i++) {
1879 if (in_sig_bt[i] == T_ARRAY) {
1880 total_c_args++;
1881 }
1882 }
1883 }
1884
1885 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1886 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1887 BasicType* in_elem_bt = NULL;
1888
1889 int argc = 0;
1890 if (!is_critical_native) {
1891 out_sig_bt[argc++] = T_ADDRESS;
1892 if (method->is_static()) {
1893 out_sig_bt[argc++] = T_OBJECT;
1894 }
1895
1896 for (int i = 0; i < total_in_args ; i++ ) {
1897 out_sig_bt[argc++] = in_sig_bt[i];
1898 }
1899 } else {
1900 Thread* THREAD = Thread::current();
1901 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
1902 SignatureStream ss(method->signature());
1903 for (int i = 0; i < total_in_args ; i++ ) {
1904 if (in_sig_bt[i] == T_ARRAY) {
1905 // Arrays are passed as int, elem* pair
1906 out_sig_bt[argc++] = T_INT;
1907 out_sig_bt[argc++] = T_ADDRESS;
1908 Symbol* atype = ss.as_symbol(CHECK_NULL);
1909 const char* at = atype->as_C_string();
1910 if (strlen(at) == 2) {
1911 assert(at[0] == '[', "must be");
1912 switch (at[1]) {
1913 case 'B': in_elem_bt[i] = T_BYTE; break;
1914 case 'C': in_elem_bt[i] = T_CHAR; break;
1915 case 'D': in_elem_bt[i] = T_DOUBLE; break;
1916 case 'F': in_elem_bt[i] = T_FLOAT; break;
1917 case 'I': in_elem_bt[i] = T_INT; break;
1918 case 'J': in_elem_bt[i] = T_LONG; break;
1919 case 'S': in_elem_bt[i] = T_SHORT; break;
1920 case 'Z': in_elem_bt[i] = T_BOOLEAN; break;
1921 default: ShouldNotReachHere();
1922 }
1923 }
1924 } else {
1925 out_sig_bt[argc++] = in_sig_bt[i];
1926 in_elem_bt[i] = T_VOID;
1927 }
1928 if (in_sig_bt[i] != T_VOID) {
1929 assert(in_sig_bt[i] == ss.type(), "must match");
1930 ss.next();
1931 }
1932 }
1933 }
1934
1935 // Now figure out where the args must be stored and how much stack space
1936 // they require.
1937 int out_arg_slots;
1938 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args);
1939
1940 // Compute framesize for the wrapper. We need to handlize all oops in
1941 // incoming registers
1942
1943 // Calculate the total number of stack slots we will need.
1944
1945 // First count the abi requirement plus all of the outgoing args
1946 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1947
1948 // Now the space for the inbound oop handle area
1949 int total_save_slots = 6 * VMRegImpl::slots_per_word; // 6 arguments passed in registers
1950 if (is_critical_native) {
1951 // Critical natives may have to call out so they need a save area
1952 // for register arguments.
1953 int double_slots = 0;
1954 int single_slots = 0;
1955 for ( int i = 0; i < total_in_args; i++) {
1956 if (in_regs[i].first()->is_Register()) {
1957 const Register reg = in_regs[i].first()->as_Register();
1958 switch (in_sig_bt[i]) {
1959 case T_BOOLEAN:
1960 case T_BYTE:
1961 case T_SHORT:
1962 case T_CHAR:
1963 case T_INT: single_slots++; break;
1964 case T_ARRAY: // specific to LP64 (7145024)
1965 case T_LONG: double_slots++; break;
1966 default: ShouldNotReachHere();
1967 }
1968 } else if (in_regs[i].first()->is_XMMRegister()) {
1969 switch (in_sig_bt[i]) {
1970 case T_FLOAT: single_slots++; break;
1971 case T_DOUBLE: double_slots++; break;
1972 default: ShouldNotReachHere();
1973 }
1974 } else if (in_regs[i].first()->is_FloatRegister()) {
1975 ShouldNotReachHere();
1976 }
1977 }
1978 total_save_slots = double_slots * 2 + single_slots;
1979 // align the save area
1980 if (double_slots != 0) {
1981 stack_slots = round_to(stack_slots, 2);
1982 }
1983 }
1984
1985 int oop_handle_offset = stack_slots;
1986 stack_slots += total_save_slots;
1987
1988 // Now any space we need for handlizing a klass if static method
1989
1990 int klass_slot_offset = 0;
1991 int klass_offset = -1;
1992 int lock_slot_offset = 0;
1993 bool is_static = false;
1994
1995 if (method->is_static()) {
1996 klass_slot_offset = stack_slots;
1997 stack_slots += VMRegImpl::slots_per_word;
1998 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1999 is_static = true;
2000 }
2001
2002 // Plus a lock if needed
2003
2004 if (method->is_synchronized()) {
2005 lock_slot_offset = stack_slots;
2006 stack_slots += VMRegImpl::slots_per_word;
2007 }
2008
2009 // Now a place (+2) to save return values or temp during shuffling
2010 // + 4 for return address (which we own) and saved rbp
2011 stack_slots += 6;
2012
2013 // Ok The space we have allocated will look like:
2014 //
2015 //
2016 // FP-> | |
2017 // |---------------------|
2018 // | 2 slots for moves |
2019 // |---------------------|
2020 // | lock box (if sync) |
2021 // |---------------------| <- lock_slot_offset
2022 // | klass (if static) |
2023 // |---------------------| <- klass_slot_offset
2024 // | oopHandle area |
2025 // |---------------------| <- oop_handle_offset (6 java arg registers)
2026 // | outbound memory |
2027 // | based arguments |
2028 // | |
2029 // |---------------------|
2030 // | |
2031 // SP-> | out_preserved_slots |
2032 //
2033 //
2034
2035
2036 // Now compute actual number of stack words we need rounding to make
2037 // stack properly aligned.
2038 stack_slots = round_to(stack_slots, StackAlignmentInSlots);
2039
2040 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
2041
2042 // First thing make an ic check to see if we should even be here
2043
2044 // We are free to use all registers as temps without saving them and
2045 // restoring them except rbp. rbp is the only callee save register
2046 // as far as the interpreter and the compiler(s) are concerned.
2047
2048
2049 const Register ic_reg = rax;
2050 const Register receiver = j_rarg0;
2051
2052 Label hit;
2053 Label exception_pending;
2054
2055 assert_different_registers(ic_reg, receiver, rscratch1);
2056 __ verify_oop(receiver);
2057 __ load_klass(rscratch1, receiver);
2058 __ cmpq(ic_reg, rscratch1);
2059 __ jcc(Assembler::equal, hit);
2060
2061 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
2062
2063 // Verified entry point must be aligned
2064 __ align(8);
2065
2066 __ bind(hit);
2067
2068 int vep_offset = ((intptr_t)__ pc()) - start;
2069
2070 #ifdef COMPILER1
2071 // For Object.hashCode, System.identityHashCode try to pull hashCode from object header if available.
2072 if ((InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) || (method->intrinsic_id() == vmIntrinsics::_identityHashCode)) {
2073 inline_check_hashcode_from_object_header(masm, method, j_rarg0 /*obj_reg*/, rax /*result*/);
2074 }
2075 #endif // COMPILER1
2076
2077 // The instruction at the verified entry point must be 5 bytes or longer
2078 // because it can be patched on the fly by make_non_entrant. The stack bang
2079 // instruction fits that requirement.
2080
2081 // Generate stack overflow check
2082
2083 if (UseStackBanging) {
2084 __ bang_stack_with_offset((int)JavaThread::stack_shadow_zone_size());
2085 } else {
2086 // need a 5 byte instruction to allow MT safe patching to non-entrant
2087 __ fat_nop();
2088 }
2089
2090 // Generate a new frame for the wrapper.
2091 __ enter();
2092 // -2 because return address is already present and so is saved rbp
2093 __ subptr(rsp, stack_size - 2*wordSize);
2094
2095 // Frame is now completed as far as size and linkage.
2096 int frame_complete = ((intptr_t)__ pc()) - start;
2097
2098 if (UseRTMLocking) {
2099 // Abort RTM transaction before calling JNI
2100 // because critical section will be large and will be
2101 // aborted anyway. Also nmethod could be deoptimized.
2102 __ xabort(0);
2103 }
2104
2105 #ifdef ASSERT
2106 {
2107 Label L;
2108 __ mov(rax, rsp);
2109 __ andptr(rax, -16); // must be 16 byte boundary (see amd64 ABI)
2110 __ cmpptr(rax, rsp);
2111 __ jcc(Assembler::equal, L);
2112 __ stop("improperly aligned stack");
2113 __ bind(L);
2114 }
2115 #endif /* ASSERT */
2116
2117
2118 // We use r14 as the oop handle for the receiver/klass
2119 // It is callee save so it survives the call to native
2120
2121 const Register oop_handle_reg = r14;
2122
2123 if (is_critical_native) {
2124 check_needs_gc_for_critical_native(masm, stack_slots, total_c_args, total_in_args,
2125 oop_handle_offset, oop_maps, in_regs, in_sig_bt);
2126 }
2127
2128 //
2129 // We immediately shuffle the arguments so that any vm call we have to
2130 // make from here on out (sync slow path, jvmti, etc.) we will have
2131 // captured the oops from our caller and have a valid oopMap for
2132 // them.
2133
2134 // -----------------
2135 // The Grand Shuffle
2136
2137 // The Java calling convention is either equal (linux) or denser (win64) than the
2138 // c calling convention. However the because of the jni_env argument the c calling
2139 // convention always has at least one more (and two for static) arguments than Java.
2140 // Therefore if we move the args from java -> c backwards then we will never have
2141 // a register->register conflict and we don't have to build a dependency graph
2142 // and figure out how to break any cycles.
2143 //
2144
2145 // Record esp-based slot for receiver on stack for non-static methods
2146 int receiver_offset = -1;
2147
2148 // This is a trick. We double the stack slots so we can claim
2149 // the oops in the caller's frame. Since we are sure to have
2150 // more args than the caller doubling is enough to make
2151 // sure we can capture all the incoming oop args from the
2152 // caller.
2153 //
2154 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
2155
2156 // Mark location of rbp (someday)
2157 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, vmreg(rbp));
2158
2159 // Use eax, ebx as temporaries during any memory-memory moves we have to do
2160 // All inbound args are referenced based on rbp and all outbound args via rsp.
2161
2162
2163 #ifdef ASSERT
2164 bool reg_destroyed[RegisterImpl::number_of_registers];
2165 bool freg_destroyed[XMMRegisterImpl::number_of_registers];
2166 for ( int r = 0 ; r < RegisterImpl::number_of_registers ; r++ ) {
2167 reg_destroyed[r] = false;
2168 }
2169 for ( int f = 0 ; f < XMMRegisterImpl::number_of_registers ; f++ ) {
2170 freg_destroyed[f] = false;
2171 }
2172
2173 #endif /* ASSERT */
2174
2175 // This may iterate in two different directions depending on the
2176 // kind of native it is. The reason is that for regular JNI natives
2177 // the incoming and outgoing registers are offset upwards and for
2178 // critical natives they are offset down.
2179 GrowableArray<int> arg_order(2 * total_in_args);
2180 VMRegPair tmp_vmreg;
2181 tmp_vmreg.set1(rbx->as_VMReg());
2182
2183 if (!is_critical_native) {
2184 for (int i = total_in_args - 1, c_arg = total_c_args - 1; i >= 0; i--, c_arg--) {
2185 arg_order.push(i);
2186 arg_order.push(c_arg);
2187 }
2188 } else {
2189 // Compute a valid move order, using tmp_vmreg to break any cycles
2190 ComputeMoveOrder cmo(total_in_args, in_regs, total_c_args, out_regs, in_sig_bt, arg_order, tmp_vmreg);
2191 }
2192
2193 int temploc = -1;
2194 for (int ai = 0; ai < arg_order.length(); ai += 2) {
2195 int i = arg_order.at(ai);
2196 int c_arg = arg_order.at(ai + 1);
2197 __ block_comment(err_msg("move %d -> %d", i, c_arg));
2198 if (c_arg == -1) {
2199 assert(is_critical_native, "should only be required for critical natives");
2200 // This arg needs to be moved to a temporary
2201 __ mov(tmp_vmreg.first()->as_Register(), in_regs[i].first()->as_Register());
2202 in_regs[i] = tmp_vmreg;
2203 temploc = i;
2204 continue;
2205 } else if (i == -1) {
2206 assert(is_critical_native, "should only be required for critical natives");
2207 // Read from the temporary location
2208 assert(temploc != -1, "must be valid");
2209 i = temploc;
2210 temploc = -1;
2211 }
2212 #ifdef ASSERT
2213 if (in_regs[i].first()->is_Register()) {
2214 assert(!reg_destroyed[in_regs[i].first()->as_Register()->encoding()], "destroyed reg!");
2215 } else if (in_regs[i].first()->is_XMMRegister()) {
2216 assert(!freg_destroyed[in_regs[i].first()->as_XMMRegister()->encoding()], "destroyed reg!");
2217 }
2218 if (out_regs[c_arg].first()->is_Register()) {
2219 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
2220 } else if (out_regs[c_arg].first()->is_XMMRegister()) {
2221 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true;
2222 }
2223 #endif /* ASSERT */
2224 switch (in_sig_bt[i]) {
2225 case T_ARRAY:
2226 if (is_critical_native) {
2227 unpack_array_argument(masm, in_regs[i], in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
2228 c_arg++;
2229 #ifdef ASSERT
2230 if (out_regs[c_arg].first()->is_Register()) {
2231 reg_destroyed[out_regs[c_arg].first()->as_Register()->encoding()] = true;
2232 } else if (out_regs[c_arg].first()->is_XMMRegister()) {
2233 freg_destroyed[out_regs[c_arg].first()->as_XMMRegister()->encoding()] = true;
2234 }
2235 #endif
2236 break;
2237 }
2238 case T_OBJECT:
2239 assert(!is_critical_native, "no oop arguments");
2240 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
2241 ((i == 0) && (!is_static)),
2242 &receiver_offset);
2243 break;
2244 case T_VOID:
2245 break;
2246
2247 case T_FLOAT:
2248 float_move(masm, in_regs[i], out_regs[c_arg]);
2249 break;
2250
2251 case T_DOUBLE:
2252 assert( i + 1 < total_in_args &&
2253 in_sig_bt[i + 1] == T_VOID &&
2254 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
2255 double_move(masm, in_regs[i], out_regs[c_arg]);
2256 break;
2257
2258 case T_LONG :
2259 long_move(masm, in_regs[i], out_regs[c_arg]);
2260 break;
2261
2262 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
2263
2264 default:
2265 move32_64(masm, in_regs[i], out_regs[c_arg]);
2266 }
2267 }
2268
2269 int c_arg;
2270
2271 // Pre-load a static method's oop into r14. Used both by locking code and
2272 // the normal JNI call code.
2273 if (!is_critical_native) {
2274 // point c_arg at the first arg that is already loaded in case we
2275 // need to spill before we call out
2276 c_arg = total_c_args - total_in_args;
2277
2278 if (method->is_static()) {
2279
2280 // load oop into a register
2281 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
2282
2283 // Now handlize the static class mirror it's known not-null.
2284 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
2285 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
2286
2287 // Now get the handle
2288 __ lea(oop_handle_reg, Address(rsp, klass_offset));
2289 // store the klass handle as second argument
2290 __ movptr(c_rarg1, oop_handle_reg);
2291 // and protect the arg if we must spill
2292 c_arg--;
2293 }
2294 } else {
2295 // For JNI critical methods we need to save all registers in save_args.
2296 c_arg = 0;
2297 }
2298
2299 // Change state to native (we save the return address in the thread, since it might not
2300 // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
2301 // points into the right code segment. It does not have to be the correct return pc.
2302 // We use the same pc/oopMap repeatedly when we call out
2303
2304 intptr_t the_pc = (intptr_t) __ pc();
2305 oop_maps->add_gc_map(the_pc - start, map);
2306
2307 __ set_last_Java_frame(rsp, noreg, (address)the_pc);
2308
2309
2310 // We have all of the arguments setup at this point. We must not touch any register
2311 // argument registers at this point (what if we save/restore them there are no oop?
2312
2313 {
2314 SkipIfEqual skip(masm, &DTraceMethodProbes, false);
2315 // protect the args we've loaded
2316 save_args(masm, total_c_args, c_arg, out_regs);
2317 __ mov_metadata(c_rarg1, method());
2318 __ call_VM_leaf(
2319 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2320 r15_thread, c_rarg1);
2321 restore_args(masm, total_c_args, c_arg, out_regs);
2322 }
2323
2324 // RedefineClasses() tracing support for obsolete method entry
2325 if (log_is_enabled(Trace, redefine, class, obsolete)) {
2326 // protect the args we've loaded
2327 save_args(masm, total_c_args, c_arg, out_regs);
2328 __ mov_metadata(c_rarg1, method());
2329 __ call_VM_leaf(
2330 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
2331 r15_thread, c_rarg1);
2332 restore_args(masm, total_c_args, c_arg, out_regs);
2333 }
2334
2335 // Lock a synchronized method
2336
2337 // Register definitions used by locking and unlocking
2338
2339 const Register swap_reg = rax; // Must use rax for cmpxchg instruction
2340 const Register obj_reg = rbx; // Will contain the oop
2341 const Register lock_reg = r13; // Address of compiler lock object (BasicLock)
2342 const Register old_hdr = r13; // value of old header at unlock time
2343
2344 Label slow_path_lock;
2345 Label lock_done;
2346
2347 if (method->is_synchronized()) {
2348 assert(!is_critical_native, "unhandled");
2349
2350
2351 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
2352
2353 // Get the handle (the 2nd argument)
2354 __ mov(oop_handle_reg, c_rarg1);
2355
2356 // Get address of the box
2357
2358 __ lea(lock_reg, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
2359
2360 // Load the oop from the handle
2361 __ movptr(obj_reg, Address(oop_handle_reg, 0));
2362
2363 if (UseBiasedLocking) {
2364 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, rscratch1, false, lock_done, &slow_path_lock);
2365 }
2366
2367 // Load immediate 1 into swap_reg %rax
2368 __ movl(swap_reg, 1);
2369
2370 // Load (object->mark() | 1) into swap_reg %rax
2371 __ orptr(swap_reg, Address(obj_reg, 0));
2372
2373 // Save (object->mark() | 1) into BasicLock's displaced header
2374 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2375
2376 if (os::is_MP()) {
2377 __ lock();
2378 }
2379
2380 // src -> dest iff dest == rax else rax <- dest
2381 __ cmpxchgptr(lock_reg, Address(obj_reg, 0));
2382 __ jcc(Assembler::equal, lock_done);
2383
2384 // Hmm should this move to the slow path code area???
2385
2386 // Test if the oopMark is an obvious stack pointer, i.e.,
2387 // 1) (mark & 3) == 0, and
2388 // 2) rsp <= mark < mark + os::pagesize()
2389 // These 3 tests can be done by evaluating the following
2390 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
2391 // assuming both stack pointer and pagesize have their
2392 // least significant 2 bits clear.
2393 // NOTE: the oopMark is in swap_reg %rax as the result of cmpxchg
2394
2395 __ subptr(swap_reg, rsp);
2396 __ andptr(swap_reg, 3 - os::vm_page_size());
2397
2398 // Save the test result, for recursive case, the result is zero
2399 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2400 __ jcc(Assembler::notEqual, slow_path_lock);
2401
2402 // Slow path will re-enter here
2403
2404 __ bind(lock_done);
2405 }
2406
2407
2408 // Finally just about ready to make the JNI call
2409
2410
2411 // get JNIEnv* which is first argument to native
2412 if (!is_critical_native) {
2413 __ lea(c_rarg0, Address(r15_thread, in_bytes(JavaThread::jni_environment_offset())));
2414 }
2415
2416 // Now set thread in native
2417 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native);
2418
2419 __ call(RuntimeAddress(native_func));
2420
2421 // Verify or restore cpu control state after JNI call
2422 __ restore_cpu_control_state_after_jni();
2423
2424 // Unpack native results.
2425 switch (ret_type) {
2426 case T_BOOLEAN: __ c2bool(rax); break;
2427 case T_CHAR : __ movzwl(rax, rax); break;
2428 case T_BYTE : __ sign_extend_byte (rax); break;
2429 case T_SHORT : __ sign_extend_short(rax); break;
2430 case T_INT : /* nothing to do */ break;
2431 case T_DOUBLE :
2432 case T_FLOAT :
2433 // Result is in xmm0 we'll save as needed
2434 break;
2435 case T_ARRAY: // Really a handle
2436 case T_OBJECT: // Really a handle
2437 break; // can't de-handlize until after safepoint check
2438 case T_VOID: break;
2439 case T_LONG: break;
2440 default : ShouldNotReachHere();
2441 }
2442
2443 // Switch thread to "native transition" state before reading the synchronization state.
2444 // This additional state is necessary because reading and testing the synchronization
2445 // state is not atomic w.r.t. GC, as this scenario demonstrates:
2446 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
2447 // VM thread changes sync state to synchronizing and suspends threads for GC.
2448 // Thread A is resumed to finish this native method, but doesn't block here since it
2449 // didn't see any synchronization is progress, and escapes.
2450 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
2451
2452 if(os::is_MP()) {
2453 if (UseMembar) {
2454 // Force this write out before the read below
2455 __ membar(Assembler::Membar_mask_bits(
2456 Assembler::LoadLoad | Assembler::LoadStore |
2457 Assembler::StoreLoad | Assembler::StoreStore));
2458 } else {
2459 // Write serialization page so VM thread can do a pseudo remote membar.
2460 // We use the current thread pointer to calculate a thread specific
2461 // offset to write to within the page. This minimizes bus traffic
2462 // due to cache line collision.
2463 __ serialize_memory(r15_thread, rcx);
2464 }
2465 }
2466
2467 Label after_transition;
2468
2469 // check for safepoint operation in progress and/or pending suspend requests
2470 {
2471 Label Continue;
2472
2473 __ cmp32(ExternalAddress((address)SafepointSynchronize::address_of_state()),
2474 SafepointSynchronize::_not_synchronized);
2475
2476 Label L;
2477 __ jcc(Assembler::notEqual, L);
2478 __ cmpl(Address(r15_thread, JavaThread::suspend_flags_offset()), 0);
2479 __ jcc(Assembler::equal, Continue);
2480 __ bind(L);
2481
2482 // Don't use call_VM as it will see a possible pending exception and forward it
2483 // and never return here preventing us from clearing _last_native_pc down below.
2484 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
2485 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
2486 // by hand.
2487 //
2488 save_native_result(masm, ret_type, stack_slots);
2489 __ mov(c_rarg0, r15_thread);
2490 __ mov(r12, rsp); // remember sp
2491 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
2492 __ andptr(rsp, -16); // align stack as required by ABI
2493 if (!is_critical_native) {
2494 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans)));
2495 } else {
2496 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, JavaThread::check_special_condition_for_native_trans_and_transition)));
2497 }
2498 __ mov(rsp, r12); // restore sp
2499 __ reinit_heapbase();
2500 // Restore any method result value
2501 restore_native_result(masm, ret_type, stack_slots);
2502
2503 if (is_critical_native) {
2504 // The call above performed the transition to thread_in_Java so
2505 // skip the transition logic below.
2506 __ jmpb(after_transition);
2507 }
2508
2509 __ bind(Continue);
2510 }
2511
2512 // change thread state
2513 __ movl(Address(r15_thread, JavaThread::thread_state_offset()), _thread_in_Java);
2514 __ bind(after_transition);
2515
2516 Label reguard;
2517 Label reguard_done;
2518 __ cmpl(Address(r15_thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_reserved_disabled);
2519 __ jcc(Assembler::equal, reguard);
2520 __ bind(reguard_done);
2521
2522 // native result if any is live
2523
2524 // Unlock
2525 Label unlock_done;
2526 Label slow_path_unlock;
2527 if (method->is_synchronized()) {
2528
2529 // Get locked oop from the handle we passed to jni
2530 __ movptr(obj_reg, Address(oop_handle_reg, 0));
2531
2532 Label done;
2533
2534 if (UseBiasedLocking) {
2535 __ biased_locking_exit(obj_reg, old_hdr, done);
2536 }
2537
2538 // Simple recursive lock?
2539
2540 __ cmpptr(Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size), (int32_t)NULL_WORD);
2541 __ jcc(Assembler::equal, done);
2542
2543 // Must save rax if if it is live now because cmpxchg must use it
2544 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2545 save_native_result(masm, ret_type, stack_slots);
2546 }
2547
2548
2549 // get address of the stack lock
2550 __ lea(rax, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
2551 // get old displaced header
2552 __ movptr(old_hdr, Address(rax, 0));
2553
2554 // Atomic swap old header if oop still contains the stack lock
2555 if (os::is_MP()) {
2556 __ lock();
2557 }
2558 __ cmpxchgptr(old_hdr, Address(obj_reg, 0));
2559 __ jcc(Assembler::notEqual, slow_path_unlock);
2560
2561 // slow path re-enters here
2562 __ bind(unlock_done);
2563 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2564 restore_native_result(masm, ret_type, stack_slots);
2565 }
2566
2567 __ bind(done);
2568
2569 }
2570 {
2571 SkipIfEqual skip(masm, &DTraceMethodProbes, false);
2572 save_native_result(masm, ret_type, stack_slots);
2573 __ mov_metadata(c_rarg1, method());
2574 __ call_VM_leaf(
2575 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2576 r15_thread, c_rarg1);
2577 restore_native_result(masm, ret_type, stack_slots);
2578 }
2579
2580 __ reset_last_Java_frame(false);
2581
2582 // Unpack oop result
2583 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
2584 Label L;
2585 __ testptr(rax, rax);
2586 __ jcc(Assembler::zero, L);
2587 __ movptr(rax, Address(rax, 0));
2588 __ bind(L);
2589 __ verify_oop(rax);
2590 }
2591
2592 if (CheckJNICalls) {
2593 // clear_pending_jni_exception_check
2594 __ movptr(Address(r15_thread, JavaThread::pending_jni_exception_check_fn_offset()), NULL_WORD);
2595 }
2596
2597 if (!is_critical_native) {
2598 // reset handle block
2599 __ movptr(rcx, Address(r15_thread, JavaThread::active_handles_offset()));
2600 __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), (int32_t)NULL_WORD);
2601 }
2602
2603 // pop our frame
2604
2605 __ leave();
2606
2607 if (!is_critical_native) {
2608 // Any exception pending?
2609 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2610 __ jcc(Assembler::notEqual, exception_pending);
2611 }
2612
2613 // Return
2614
2615 __ ret(0);
2616
2617 // Unexpected paths are out of line and go here
2618
2619 if (!is_critical_native) {
2620 // forward the exception
2621 __ bind(exception_pending);
2622
2623 // and forward the exception
2624 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2625 }
2626
2627 // Slow path locking & unlocking
2628 if (method->is_synchronized()) {
2629
2630 // BEGIN Slow path lock
2631 __ bind(slow_path_lock);
2632
2633 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2634 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2635
2636 // protect the args we've loaded
2637 save_args(masm, total_c_args, c_arg, out_regs);
2638
2639 __ mov(c_rarg0, obj_reg);
2640 __ mov(c_rarg1, lock_reg);
2641 __ mov(c_rarg2, r15_thread);
2642
2643 // Not a leaf but we have last_Java_frame setup as we want
2644 __ call_VM_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C), 3);
2645 restore_args(masm, total_c_args, c_arg, out_regs);
2646
2647 #ifdef ASSERT
2648 { Label L;
2649 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2650 __ jcc(Assembler::equal, L);
2651 __ stop("no pending exception allowed on exit from monitorenter");
2652 __ bind(L);
2653 }
2654 #endif
2655 __ jmp(lock_done);
2656
2657 // END Slow path lock
2658
2659 // BEGIN Slow path unlock
2660 __ bind(slow_path_unlock);
2661
2662 // If we haven't already saved the native result we must save it now as xmm registers
2663 // are still exposed.
2664
2665 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2666 save_native_result(masm, ret_type, stack_slots);
2667 }
2668
2669 __ lea(c_rarg1, Address(rsp, lock_slot_offset * VMRegImpl::stack_slot_size));
2670
2671 __ mov(c_rarg0, obj_reg);
2672 __ mov(c_rarg2, r15_thread);
2673 __ mov(r12, rsp); // remember sp
2674 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
2675 __ andptr(rsp, -16); // align stack as required by ABI
2676
2677 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2678 // NOTE that obj_reg == rbx currently
2679 __ movptr(rbx, Address(r15_thread, in_bytes(Thread::pending_exception_offset())));
2680 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2681
2682 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2683 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
2684 __ mov(rsp, r12); // restore sp
2685 __ reinit_heapbase();
2686 #ifdef ASSERT
2687 {
2688 Label L;
2689 __ cmpptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
2690 __ jcc(Assembler::equal, L);
2691 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2692 __ bind(L);
2693 }
2694 #endif /* ASSERT */
2695
2696 __ movptr(Address(r15_thread, in_bytes(Thread::pending_exception_offset())), rbx);
2697
2698 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2699 restore_native_result(masm, ret_type, stack_slots);
2700 }
2701 __ jmp(unlock_done);
2702
2703 // END Slow path unlock
2704
2705 } // synchronized
2706
2707 // SLOW PATH Reguard the stack if needed
2708
2709 __ bind(reguard);
2710 save_native_result(masm, ret_type, stack_slots);
2711 __ mov(r12, rsp); // remember sp
2712 __ subptr(rsp, frame::arg_reg_save_area_bytes); // windows
2713 __ andptr(rsp, -16); // align stack as required by ABI
2714 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
2715 __ mov(rsp, r12); // restore sp
2716 __ reinit_heapbase();
2717 restore_native_result(masm, ret_type, stack_slots);
2718 // and continue
2719 __ jmp(reguard_done);
2720
2721
2722
2723 __ flush();
2724
2725 nmethod *nm = nmethod::new_native_nmethod(method,
2726 compile_id,
2727 masm->code(),
2728 vep_offset,
2729 frame_complete,
2730 stack_slots / VMRegImpl::slots_per_word,
2731 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2732 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2733 oop_maps);
2734
2735 if (is_critical_native) {
2736 nm->set_lazy_critical_native(true);
2737 }
2738
2739 return nm;
2740
2741 }
2742
2743 // this function returns the adjust size (in number of words) to a c2i adapter
2744 // activation for use during deoptimization
2745 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2746 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2747 }
2748
2749
2750 uint SharedRuntime::out_preserve_stack_slots() {
2751 return 0;
2752 }
2753
2754 //------------------------------generate_deopt_blob----------------------------
2755 void SharedRuntime::generate_deopt_blob() {
2756 // Allocate space for the code
2757 ResourceMark rm;
2758 // Setup code generation tools
2759 int pad = 0;
2760 #if INCLUDE_JVMCI
2761 if (EnableJVMCI || UseAOT) {
2762 pad += 512; // Increase the buffer size when compiling for JVMCI
2763 }
2764 #endif
2765 CodeBuffer buffer("deopt_blob", 2048+pad, 1024);
2766 MacroAssembler* masm = new MacroAssembler(&buffer);
2767 int frame_size_in_words;
2768 OopMap* map = NULL;
2769 OopMapSet *oop_maps = new OopMapSet();
2770
2771 // -------------
2772 // This code enters when returning to a de-optimized nmethod. A return
2773 // address has been pushed on the the stack, and return values are in
2774 // registers.
2775 // If we are doing a normal deopt then we were called from the patched
2776 // nmethod from the point we returned to the nmethod. So the return
2777 // address on the stack is wrong by NativeCall::instruction_size
2778 // We will adjust the value so it looks like we have the original return
2779 // address on the stack (like when we eagerly deoptimized).
2780 // In the case of an exception pending when deoptimizing, we enter
2781 // with a return address on the stack that points after the call we patched
2782 // into the exception handler. We have the following register state from,
2783 // e.g., the forward exception stub (see stubGenerator_x86_64.cpp).
2784 // rax: exception oop
2785 // rbx: exception handler
2786 // rdx: throwing pc
2787 // So in this case we simply jam rdx into the useless return address and
2788 // the stack looks just like we want.
2789 //
2790 // At this point we need to de-opt. We save the argument return
2791 // registers. We call the first C routine, fetch_unroll_info(). This
2792 // routine captures the return values and returns a structure which
2793 // describes the current frame size and the sizes of all replacement frames.
2794 // The current frame is compiled code and may contain many inlined
2795 // functions, each with their own JVM state. We pop the current frame, then
2796 // push all the new frames. Then we call the C routine unpack_frames() to
2797 // populate these frames. Finally unpack_frames() returns us the new target
2798 // address. Notice that callee-save registers are BLOWN here; they have
2799 // already been captured in the vframeArray at the time the return PC was
2800 // patched.
2801 address start = __ pc();
2802 Label cont;
2803
2804 // Prolog for non exception case!
2805
2806 // Save everything in sight.
2807 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
2808
2809 // Normal deoptimization. Save exec mode for unpack_frames.
2810 __ movl(r14, Deoptimization::Unpack_deopt); // callee-saved
2811 __ jmp(cont);
2812
2813 int reexecute_offset = __ pc() - start;
2814 #if INCLUDE_JVMCI && !defined(COMPILER1)
2815 if (EnableJVMCI && UseJVMCICompiler) {
2816 // JVMCI does not use this kind of deoptimization
2817 __ should_not_reach_here();
2818 }
2819 #endif
2820
2821 // Reexecute case
2822 // return address is the pc describes what bci to do re-execute at
2823
2824 // No need to update map as each call to save_live_registers will produce identical oopmap
2825 (void) RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
2826
2827 __ movl(r14, Deoptimization::Unpack_reexecute); // callee-saved
2828 __ jmp(cont);
2829
2830 #if INCLUDE_JVMCI
2831 Label after_fetch_unroll_info_call;
2832 int implicit_exception_uncommon_trap_offset = 0;
2833 int uncommon_trap_offset = 0;
2834
2835 if (EnableJVMCI || UseAOT) {
2836 implicit_exception_uncommon_trap_offset = __ pc() - start;
2837
2838 __ pushptr(Address(r15_thread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())));
2839 __ movptr(Address(r15_thread, in_bytes(JavaThread::jvmci_implicit_exception_pc_offset())), (int32_t)NULL_WORD);
2840
2841 uncommon_trap_offset = __ pc() - start;
2842
2843 // Save everything in sight.
2844 RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
2845 // fetch_unroll_info needs to call last_java_frame()
2846 __ set_last_Java_frame(noreg, noreg, NULL);
2847
2848 __ movl(c_rarg1, Address(r15_thread, in_bytes(JavaThread::pending_deoptimization_offset())));
2849 __ movl(Address(r15_thread, in_bytes(JavaThread::pending_deoptimization_offset())), -1);
2850
2851 __ movl(r14, (int32_t)Deoptimization::Unpack_reexecute);
2852 __ mov(c_rarg0, r15_thread);
2853 __ movl(c_rarg2, r14); // exec mode
2854 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
2855 oop_maps->add_gc_map( __ pc()-start, map->deep_copy());
2856
2857 __ reset_last_Java_frame(false);
2858
2859 __ jmp(after_fetch_unroll_info_call);
2860 } // EnableJVMCI
2861 #endif // INCLUDE_JVMCI
2862
2863 int exception_offset = __ pc() - start;
2864
2865 // Prolog for exception case
2866
2867 // all registers are dead at this entry point, except for rax, and
2868 // rdx which contain the exception oop and exception pc
2869 // respectively. Set them in TLS and fall thru to the
2870 // unpack_with_exception_in_tls entry point.
2871
2872 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
2873 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), rax);
2874
2875 int exception_in_tls_offset = __ pc() - start;
2876
2877 // new implementation because exception oop is now passed in JavaThread
2878
2879 // Prolog for exception case
2880 // All registers must be preserved because they might be used by LinearScan
2881 // Exceptiop oop and throwing PC are passed in JavaThread
2882 // tos: stack at point of call to method that threw the exception (i.e. only
2883 // args are on the stack, no return address)
2884
2885 // make room on stack for the return address
2886 // It will be patched later with the throwing pc. The correct value is not
2887 // available now because loading it from memory would destroy registers.
2888 __ push(0);
2889
2890 // Save everything in sight.
2891 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
2892
2893 // Now it is safe to overwrite any register
2894
2895 // Deopt during an exception. Save exec mode for unpack_frames.
2896 __ movl(r14, Deoptimization::Unpack_exception); // callee-saved
2897
2898 // load throwing pc from JavaThread and patch it as the return address
2899 // of the current frame. Then clear the field in JavaThread
2900
2901 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
2902 __ movptr(Address(rbp, wordSize), rdx);
2903 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
2904
2905 #ifdef ASSERT
2906 // verify that there is really an exception oop in JavaThread
2907 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
2908 __ verify_oop(rax);
2909
2910 // verify that there is no pending exception
2911 Label no_pending_exception;
2912 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
2913 __ testptr(rax, rax);
2914 __ jcc(Assembler::zero, no_pending_exception);
2915 __ stop("must not have pending exception here");
2916 __ bind(no_pending_exception);
2917 #endif
2918
2919 __ bind(cont);
2920
2921 // Call C code. Need thread and this frame, but NOT official VM entry
2922 // crud. We cannot block on this call, no GC can happen.
2923 //
2924 // UnrollBlock* fetch_unroll_info(JavaThread* thread)
2925
2926 // fetch_unroll_info needs to call last_java_frame().
2927
2928 __ set_last_Java_frame(noreg, noreg, NULL);
2929 #ifdef ASSERT
2930 { Label L;
2931 __ cmpptr(Address(r15_thread,
2932 JavaThread::last_Java_fp_offset()),
2933 (int32_t)0);
2934 __ jcc(Assembler::equal, L);
2935 __ stop("SharedRuntime::generate_deopt_blob: last_Java_fp not cleared");
2936 __ bind(L);
2937 }
2938 #endif // ASSERT
2939 __ mov(c_rarg0, r15_thread);
2940 __ movl(c_rarg1, r14); // exec_mode
2941 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2942
2943 // Need to have an oopmap that tells fetch_unroll_info where to
2944 // find any register it might need.
2945 oop_maps->add_gc_map(__ pc() - start, map);
2946
2947 __ reset_last_Java_frame(false);
2948
2949 #if INCLUDE_JVMCI
2950 if (EnableJVMCI || UseAOT) {
2951 __ bind(after_fetch_unroll_info_call);
2952 }
2953 #endif
2954
2955 // Load UnrollBlock* into rdi
2956 __ mov(rdi, rax);
2957
2958 __ movl(r14, Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()));
2959 Label noException;
2960 __ cmpl(r14, Deoptimization::Unpack_exception); // Was exception pending?
2961 __ jcc(Assembler::notEqual, noException);
2962 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
2963 // QQQ this is useless it was NULL above
2964 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
2965 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int32_t)NULL_WORD);
2966 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int32_t)NULL_WORD);
2967
2968 __ verify_oop(rax);
2969
2970 // Overwrite the result registers with the exception results.
2971 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
2972 // I think this is useless
2973 __ movptr(Address(rsp, RegisterSaver::rdx_offset_in_bytes()), rdx);
2974
2975 __ bind(noException);
2976
2977 // Only register save data is on the stack.
2978 // Now restore the result registers. Everything else is either dead
2979 // or captured in the vframeArray.
2980 RegisterSaver::restore_result_registers(masm);
2981
2982 // All of the register save area has been popped of the stack. Only the
2983 // return address remains.
2984
2985 // Pop all the frames we must move/replace.
2986 //
2987 // Frame picture (youngest to oldest)
2988 // 1: self-frame (no frame link)
2989 // 2: deopting frame (no frame link)
2990 // 3: caller of deopting frame (could be compiled/interpreted).
2991 //
2992 // Note: by leaving the return address of self-frame on the stack
2993 // and using the size of frame 2 to adjust the stack
2994 // when we are done the return to frame 3 will still be on the stack.
2995
2996 // Pop deoptimized frame
2997 __ movl(rcx, Address(rdi, Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2998 __ addptr(rsp, rcx);
2999
3000 // rsp should be pointing at the return address to the caller (3)
3001
3002 // Pick up the initial fp we should save
3003 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
3004 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
3005
3006 #ifdef ASSERT
3007 // Compilers generate code that bang the stack by as much as the
3008 // interpreter would need. So this stack banging should never
3009 // trigger a fault. Verify that it does not on non product builds.
3010 if (UseStackBanging) {
3011 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
3012 __ bang_stack_size(rbx, rcx);
3013 }
3014 #endif
3015
3016 // Load address of array of frame pcs into rcx
3017 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
3018
3019 // Trash the old pc
3020 __ addptr(rsp, wordSize);
3021
3022 // Load address of array of frame sizes into rsi
3023 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
3024
3025 // Load counter into rdx
3026 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
3027
3028 // Now adjust the caller's stack to make up for the extra locals
3029 // but record the original sp so that we can save it in the skeletal interpreter
3030 // frame and the stack walking of interpreter_sender will get the unextended sp
3031 // value and not the "real" sp value.
3032
3033 const Register sender_sp = r8;
3034
3035 __ mov(sender_sp, rsp);
3036 __ movl(rbx, Address(rdi,
3037 Deoptimization::UnrollBlock::
3038 caller_adjustment_offset_in_bytes()));
3039 __ subptr(rsp, rbx);
3040
3041 // Push interpreter frames in a loop
3042 Label loop;
3043 __ bind(loop);
3044 __ movptr(rbx, Address(rsi, 0)); // Load frame size
3045 __ subptr(rbx, 2*wordSize); // We'll push pc and ebp by hand
3046 __ pushptr(Address(rcx, 0)); // Save return address
3047 __ enter(); // Save old & set new ebp
3048 __ subptr(rsp, rbx); // Prolog
3049 // This value is corrected by layout_activation_impl
3050 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
3051 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), sender_sp); // Make it walkable
3052 __ mov(sender_sp, rsp); // Pass sender_sp to next frame
3053 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
3054 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
3055 __ decrementl(rdx); // Decrement counter
3056 __ jcc(Assembler::notZero, loop);
3057 __ pushptr(Address(rcx, 0)); // Save final return address
3058
3059 // Re-push self-frame
3060 __ enter(); // Save old & set new ebp
3061
3062 // Allocate a full sized register save area.
3063 // Return address and rbp are in place, so we allocate two less words.
3064 __ subptr(rsp, (frame_size_in_words - 2) * wordSize);
3065
3066 // Restore frame locals after moving the frame
3067 __ movdbl(Address(rsp, RegisterSaver::xmm0_offset_in_bytes()), xmm0);
3068 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
3069
3070 // Call C code. Need thread but NOT official VM entry
3071 // crud. We cannot block on this call, no GC can happen. Call should
3072 // restore return values to their stack-slots with the new SP.
3073 //
3074 // void Deoptimization::unpack_frames(JavaThread* thread, int exec_mode)
3075
3076 // Use rbp because the frames look interpreted now
3077 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP.
3078 // Don't need the precise return PC here, just precise enough to point into this code blob.
3079 address the_pc = __ pc();
3080 __ set_last_Java_frame(noreg, rbp, the_pc);
3081
3082 __ andptr(rsp, -(StackAlignmentInBytes)); // Fix stack alignment as required by ABI
3083 __ mov(c_rarg0, r15_thread);
3084 __ movl(c_rarg1, r14); // second arg: exec_mode
3085 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3086 // Revert SP alignment after call since we're going to do some SP relative addressing below
3087 __ movptr(rsp, Address(r15_thread, JavaThread::last_Java_sp_offset()));
3088
3089 // Set an oopmap for the call site
3090 // Use the same PC we used for the last java frame
3091 oop_maps->add_gc_map(the_pc - start,
3092 new OopMap( frame_size_in_words, 0 ));
3093
3094 // Clear fp AND pc
3095 __ reset_last_Java_frame(true);
3096
3097 // Collect return values
3098 __ movdbl(xmm0, Address(rsp, RegisterSaver::xmm0_offset_in_bytes()));
3099 __ movptr(rax, Address(rsp, RegisterSaver::rax_offset_in_bytes()));
3100 // I think this is useless (throwing pc?)
3101 __ movptr(rdx, Address(rsp, RegisterSaver::rdx_offset_in_bytes()));
3102
3103 // Pop self-frame.
3104 __ leave(); // Epilog
3105
3106 // Jump to interpreter
3107 __ ret(0);
3108
3109 // Make sure all code is generated
3110 masm->flush();
3111
3112 _deopt_blob = DeoptimizationBlob::create(&buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
3113 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
3114 #if INCLUDE_JVMCI
3115 if (EnableJVMCI || UseAOT) {
3116 _deopt_blob->set_uncommon_trap_offset(uncommon_trap_offset);
3117 _deopt_blob->set_implicit_exception_uncommon_trap_offset(implicit_exception_uncommon_trap_offset);
3118 }
3119 #endif
3120 }
3121
3122 #ifdef COMPILER2
3123 //------------------------------generate_uncommon_trap_blob--------------------
3124 void SharedRuntime::generate_uncommon_trap_blob() {
3125 // Allocate space for the code
3126 ResourceMark rm;
3127 // Setup code generation tools
3128 CodeBuffer buffer("uncommon_trap_blob", 2048, 1024);
3129 MacroAssembler* masm = new MacroAssembler(&buffer);
3130
3131 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
3132
3133 address start = __ pc();
3134
3135 if (UseRTMLocking) {
3136 // Abort RTM transaction before possible nmethod deoptimization.
3137 __ xabort(0);
3138 }
3139
3140 // Push self-frame. We get here with a return address on the
3141 // stack, so rsp is 8-byte aligned until we allocate our frame.
3142 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog!
3143
3144 // No callee saved registers. rbp is assumed implicitly saved
3145 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
3146
3147 // compiler left unloaded_class_index in j_rarg0 move to where the
3148 // runtime expects it.
3149 __ movl(c_rarg1, j_rarg0);
3150
3151 __ set_last_Java_frame(noreg, noreg, NULL);
3152
3153 // Call C code. Need thread but NOT official VM entry
3154 // crud. We cannot block on this call, no GC can happen. Call should
3155 // capture callee-saved registers as well as return values.
3156 // Thread is in rdi already.
3157 //
3158 // UnrollBlock* uncommon_trap(JavaThread* thread, jint unloaded_class_index);
3159
3160 __ mov(c_rarg0, r15_thread);
3161 __ movl(c_rarg2, Deoptimization::Unpack_uncommon_trap);
3162 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
3163
3164 // Set an oopmap for the call site
3165 OopMapSet* oop_maps = new OopMapSet();
3166 OopMap* map = new OopMap(SimpleRuntimeFrame::framesize, 0);
3167
3168 // location of rbp is known implicitly by the frame sender code
3169
3170 oop_maps->add_gc_map(__ pc() - start, map);
3171
3172 __ reset_last_Java_frame(false);
3173
3174 // Load UnrollBlock* into rdi
3175 __ mov(rdi, rax);
3176
3177 #ifdef ASSERT
3178 { Label L;
3179 __ cmpptr(Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()),
3180 (int32_t)Deoptimization::Unpack_uncommon_trap);
3181 __ jcc(Assembler::equal, L);
3182 __ stop("SharedRuntime::generate_deopt_blob: expected Unpack_uncommon_trap");
3183 __ bind(L);
3184 }
3185 #endif
3186
3187 // Pop all the frames we must move/replace.
3188 //
3189 // Frame picture (youngest to oldest)
3190 // 1: self-frame (no frame link)
3191 // 2: deopting frame (no frame link)
3192 // 3: caller of deopting frame (could be compiled/interpreted).
3193
3194 // Pop self-frame. We have no frame, and must rely only on rax and rsp.
3195 __ addptr(rsp, (SimpleRuntimeFrame::framesize - 2) << LogBytesPerInt); // Epilog!
3196
3197 // Pop deoptimized frame (int)
3198 __ movl(rcx, Address(rdi,
3199 Deoptimization::UnrollBlock::
3200 size_of_deoptimized_frame_offset_in_bytes()));
3201 __ addptr(rsp, rcx);
3202
3203 // rsp should be pointing at the return address to the caller (3)
3204
3205 // Pick up the initial fp we should save
3206 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
3207 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
3208
3209 #ifdef ASSERT
3210 // Compilers generate code that bang the stack by as much as the
3211 // interpreter would need. So this stack banging should never
3212 // trigger a fault. Verify that it does not on non product builds.
3213 if (UseStackBanging) {
3214 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
3215 __ bang_stack_size(rbx, rcx);
3216 }
3217 #endif
3218
3219 // Load address of array of frame pcs into rcx (address*)
3220 __ movptr(rcx, Address(rdi, Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
3221
3222 // Trash the return pc
3223 __ addptr(rsp, wordSize);
3224
3225 // Load address of array of frame sizes into rsi (intptr_t*)
3226 __ movptr(rsi, Address(rdi, Deoptimization::UnrollBlock:: frame_sizes_offset_in_bytes()));
3227
3228 // Counter
3229 __ movl(rdx, Address(rdi, Deoptimization::UnrollBlock:: number_of_frames_offset_in_bytes())); // (int)
3230
3231 // Now adjust the caller's stack to make up for the extra locals but
3232 // record the original sp so that we can save it in the skeletal
3233 // interpreter frame and the stack walking of interpreter_sender
3234 // will get the unextended sp value and not the "real" sp value.
3235
3236 const Register sender_sp = r8;
3237
3238 __ mov(sender_sp, rsp);
3239 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock:: caller_adjustment_offset_in_bytes())); // (int)
3240 __ subptr(rsp, rbx);
3241
3242 // Push interpreter frames in a loop
3243 Label loop;
3244 __ bind(loop);
3245 __ movptr(rbx, Address(rsi, 0)); // Load frame size
3246 __ subptr(rbx, 2 * wordSize); // We'll push pc and rbp by hand
3247 __ pushptr(Address(rcx, 0)); // Save return address
3248 __ enter(); // Save old & set new rbp
3249 __ subptr(rsp, rbx); // Prolog
3250 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize),
3251 sender_sp); // Make it walkable
3252 // This value is corrected by layout_activation_impl
3253 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), (int32_t)NULL_WORD );
3254 __ mov(sender_sp, rsp); // Pass sender_sp to next frame
3255 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
3256 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
3257 __ decrementl(rdx); // Decrement counter
3258 __ jcc(Assembler::notZero, loop);
3259 __ pushptr(Address(rcx, 0)); // Save final return address
3260
3261 // Re-push self-frame
3262 __ enter(); // Save old & set new rbp
3263 __ subptr(rsp, (SimpleRuntimeFrame::framesize - 4) << LogBytesPerInt);
3264 // Prolog
3265
3266 // Use rbp because the frames look interpreted now
3267 // Save "the_pc" since it cannot easily be retrieved using the last_java_SP after we aligned SP.
3268 // Don't need the precise return PC here, just precise enough to point into this code blob.
3269 address the_pc = __ pc();
3270 __ set_last_Java_frame(noreg, rbp, the_pc);
3271
3272 // Call C code. Need thread but NOT official VM entry
3273 // crud. We cannot block on this call, no GC can happen. Call should
3274 // restore return values to their stack-slots with the new SP.
3275 // Thread is in rdi already.
3276 //
3277 // BasicType unpack_frames(JavaThread* thread, int exec_mode);
3278
3279 __ andptr(rsp, -(StackAlignmentInBytes)); // Align SP as required by ABI
3280 __ mov(c_rarg0, r15_thread);
3281 __ movl(c_rarg1, Deoptimization::Unpack_uncommon_trap);
3282 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3283
3284 // Set an oopmap for the call site
3285 // Use the same PC we used for the last java frame
3286 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
3287
3288 // Clear fp AND pc
3289 __ reset_last_Java_frame(true);
3290
3291 // Pop self-frame.
3292 __ leave(); // Epilog
3293
3294 // Jump to interpreter
3295 __ ret(0);
3296
3297 // Make sure all code is generated
3298 masm->flush();
3299
3300 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps,
3301 SimpleRuntimeFrame::framesize >> 1);
3302 }
3303 #endif // COMPILER2
3304
3305
3306 //------------------------------generate_handler_blob------
3307 //
3308 // Generate a special Compile2Runtime blob that saves all registers,
3309 // and setup oopmap.
3310 //
3311 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
3312 assert(StubRoutines::forward_exception_entry() != NULL,
3313 "must be generated before");
3314
3315 ResourceMark rm;
3316 OopMapSet *oop_maps = new OopMapSet();
3317 OopMap* map;
3318
3319 // Allocate space for the code. Setup code generation tools.
3320 CodeBuffer buffer("handler_blob", 2048, 1024);
3321 MacroAssembler* masm = new MacroAssembler(&buffer);
3322
3323 address start = __ pc();
3324 address call_pc = NULL;
3325 int frame_size_in_words;
3326 bool cause_return = (poll_type == POLL_AT_RETURN);
3327 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
3328
3329 if (UseRTMLocking) {
3330 // Abort RTM transaction before calling runtime
3331 // because critical section will be large and will be
3332 // aborted anyway. Also nmethod could be deoptimized.
3333 __ xabort(0);
3334 }
3335
3336 // Make room for return address (or push it again)
3337 if (!cause_return) {
3338 __ push(rbx);
3339 }
3340
3341 // Save registers, fpu state, and flags
3342 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words, save_vectors);
3343
3344 // The following is basically a call_VM. However, we need the precise
3345 // address of the call in order to generate an oopmap. Hence, we do all the
3346 // work outselves.
3347
3348 __ set_last_Java_frame(noreg, noreg, NULL);
3349
3350 // The return address must always be correct so that frame constructor never
3351 // sees an invalid pc.
3352
3353 if (!cause_return) {
3354 // overwrite the dummy value we pushed on entry
3355 __ movptr(c_rarg0, Address(r15_thread, JavaThread::saved_exception_pc_offset()));
3356 __ movptr(Address(rbp, wordSize), c_rarg0);
3357 }
3358
3359 // Do the call
3360 __ mov(c_rarg0, r15_thread);
3361 __ call(RuntimeAddress(call_ptr));
3362
3363 // Set an oopmap for the call site. This oopmap will map all
3364 // oop-registers and debug-info registers as callee-saved. This
3365 // will allow deoptimization at this safepoint to find all possible
3366 // debug-info recordings, as well as let GC find all oops.
3367
3368 oop_maps->add_gc_map( __ pc() - start, map);
3369
3370 Label noException;
3371
3372 __ reset_last_Java_frame(false);
3373
3374 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3375 __ jcc(Assembler::equal, noException);
3376
3377 // Exception pending
3378
3379 RegisterSaver::restore_live_registers(masm, save_vectors);
3380
3381 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3382
3383 // No exception case
3384 __ bind(noException);
3385
3386 // Normal exit, restore registers and exit.
3387 RegisterSaver::restore_live_registers(masm, save_vectors);
3388
3389 __ ret(0);
3390
3391 // Make sure all code is generated
3392 masm->flush();
3393
3394 // Fill-out other meta info
3395 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3396 }
3397
3398 //
3399 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3400 //
3401 // Generate a stub that calls into vm to find out the proper destination
3402 // of a java call. All the argument registers are live at this point
3403 // but since this is generic code we don't know what they are and the caller
3404 // must do any gc of the args.
3405 //
3406 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3407 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3408
3409 // allocate space for the code
3410 ResourceMark rm;
3411
3412 CodeBuffer buffer(name, 1000, 512);
3413 MacroAssembler* masm = new MacroAssembler(&buffer);
3414
3415 int frame_size_in_words;
3416
3417 OopMapSet *oop_maps = new OopMapSet();
3418 OopMap* map = NULL;
3419
3420 int start = __ offset();
3421
3422 map = RegisterSaver::save_live_registers(masm, 0, &frame_size_in_words);
3423
3424 int frame_complete = __ offset();
3425
3426 __ set_last_Java_frame(noreg, noreg, NULL);
3427
3428 __ mov(c_rarg0, r15_thread);
3429
3430 __ call(RuntimeAddress(destination));
3431
3432
3433 // Set an oopmap for the call site.
3434 // We need this not only for callee-saved registers, but also for volatile
3435 // registers that the compiler might be keeping live across a safepoint.
3436
3437 oop_maps->add_gc_map( __ offset() - start, map);
3438
3439 // rax contains the address we are going to jump to assuming no exception got installed
3440
3441 // clear last_Java_sp
3442 __ reset_last_Java_frame(false);
3443 // check for pending exceptions
3444 Label pending;
3445 __ cmpptr(Address(r15_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3446 __ jcc(Assembler::notEqual, pending);
3447
3448 // get the returned Method*
3449 __ get_vm_result_2(rbx, r15_thread);
3450 __ movptr(Address(rsp, RegisterSaver::rbx_offset_in_bytes()), rbx);
3451
3452 __ movptr(Address(rsp, RegisterSaver::rax_offset_in_bytes()), rax);
3453
3454 RegisterSaver::restore_live_registers(masm);
3455
3456 // We are back the the original state on entry and ready to go.
3457
3458 __ jmp(rax);
3459
3460 // Pending exception after the safepoint
3461
3462 __ bind(pending);
3463
3464 RegisterSaver::restore_live_registers(masm);
3465
3466 // exception pending => remove activation and forward to exception handler
3467
3468 __ movptr(Address(r15_thread, JavaThread::vm_result_offset()), (int)NULL_WORD);
3469
3470 __ movptr(rax, Address(r15_thread, Thread::pending_exception_offset()));
3471 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3472
3473 // -------------
3474 // make sure all code is generated
3475 masm->flush();
3476
3477 // return the blob
3478 // frame_size_words or bytes??
3479 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_in_words, oop_maps, true);
3480 }
3481
3482
3483 //------------------------------Montgomery multiplication------------------------
3484 //
3485
3486 #ifndef _WINDOWS
3487
3488 #define ASM_SUBTRACT
3489
3490 #ifdef ASM_SUBTRACT
3491 // Subtract 0:b from carry:a. Return carry.
3492 static unsigned long
3493 sub(unsigned long a[], unsigned long b[], unsigned long carry, long len) {
3494 long i = 0, cnt = len;
3495 unsigned long tmp;
3496 asm volatile("clc; "
3497 "0: ; "
3498 "mov (%[b], %[i], 8), %[tmp]; "
3499 "sbb %[tmp], (%[a], %[i], 8); "
3500 "inc %[i]; dec %[cnt]; "
3501 "jne 0b; "
3502 "mov %[carry], %[tmp]; sbb $0, %[tmp]; "
3503 : [i]"+r"(i), [cnt]"+r"(cnt), [tmp]"=&r"(tmp)
3504 : [a]"r"(a), [b]"r"(b), [carry]"r"(carry)
3505 : "memory");
3506 return tmp;
3507 }
3508 #else // ASM_SUBTRACT
3509 typedef int __attribute__((mode(TI))) int128;
3510
3511 // Subtract 0:b from carry:a. Return carry.
3512 static unsigned long
3513 sub(unsigned long a[], unsigned long b[], unsigned long carry, int len) {
3514 int128 tmp = 0;
3515 int i;
3516 for (i = 0; i < len; i++) {
3517 tmp += a[i];
3518 tmp -= b[i];
3519 a[i] = tmp;
3520 tmp >>= 64;
3521 assert(-1 <= tmp && tmp <= 0, "invariant");
3522 }
3523 return tmp + carry;
3524 }
3525 #endif // ! ASM_SUBTRACT
3526
3527 // Multiply (unsigned) Long A by Long B, accumulating the double-
3528 // length result into the accumulator formed of T0, T1, and T2.
3529 #define MACC(A, B, T0, T1, T2) \
3530 do { \
3531 unsigned long hi, lo; \
3532 __asm__ ("mul %5; add %%rax, %2; adc %%rdx, %3; adc $0, %4" \
3533 : "=&d"(hi), "=a"(lo), "+r"(T0), "+r"(T1), "+g"(T2) \
3534 : "r"(A), "a"(B) : "cc"); \
3535 } while(0)
3536
3537 // As above, but add twice the double-length result into the
3538 // accumulator.
3539 #define MACC2(A, B, T0, T1, T2) \
3540 do { \
3541 unsigned long hi, lo; \
3542 __asm__ ("mul %5; add %%rax, %2; adc %%rdx, %3; adc $0, %4; " \
3543 "add %%rax, %2; adc %%rdx, %3; adc $0, %4" \
3544 : "=&d"(hi), "=a"(lo), "+r"(T0), "+r"(T1), "+g"(T2) \
3545 : "r"(A), "a"(B) : "cc"); \
3546 } while(0)
3547
3548 // Fast Montgomery multiplication. The derivation of the algorithm is
3549 // in A Cryptographic Library for the Motorola DSP56000,
3550 // Dusse and Kaliski, Proc. EUROCRYPT 90, pp. 230-237.
3551
3552 static void __attribute__((noinline))
3553 montgomery_multiply(unsigned long a[], unsigned long b[], unsigned long n[],
3554 unsigned long m[], unsigned long inv, int len) {
3555 unsigned long t0 = 0, t1 = 0, t2 = 0; // Triple-precision accumulator
3556 int i;
3557
3558 assert(inv * n[0] == -1UL, "broken inverse in Montgomery multiply");
3559
3560 for (i = 0; i < len; i++) {
3561 int j;
3562 for (j = 0; j < i; j++) {
3563 MACC(a[j], b[i-j], t0, t1, t2);
3564 MACC(m[j], n[i-j], t0, t1, t2);
3565 }
3566 MACC(a[i], b[0], t0, t1, t2);
3567 m[i] = t0 * inv;
3568 MACC(m[i], n[0], t0, t1, t2);
3569
3570 assert(t0 == 0, "broken Montgomery multiply");
3571
3572 t0 = t1; t1 = t2; t2 = 0;
3573 }
3574
3575 for (i = len; i < 2*len; i++) {
3576 int j;
3577 for (j = i-len+1; j < len; j++) {
3578 MACC(a[j], b[i-j], t0, t1, t2);
3579 MACC(m[j], n[i-j], t0, t1, t2);
3580 }
3581 m[i-len] = t0;
3582 t0 = t1; t1 = t2; t2 = 0;
3583 }
3584
3585 while (t0)
3586 t0 = sub(m, n, t0, len);
3587 }
3588
3589 // Fast Montgomery squaring. This uses asymptotically 25% fewer
3590 // multiplies so it should be up to 25% faster than Montgomery
3591 // multiplication. However, its loop control is more complex and it
3592 // may actually run slower on some machines.
3593
3594 static void __attribute__((noinline))
3595 montgomery_square(unsigned long a[], unsigned long n[],
3596 unsigned long m[], unsigned long inv, int len) {
3597 unsigned long t0 = 0, t1 = 0, t2 = 0; // Triple-precision accumulator
3598 int i;
3599
3600 assert(inv * n[0] == -1UL, "broken inverse in Montgomery multiply");
3601
3602 for (i = 0; i < len; i++) {
3603 int j;
3604 int end = (i+1)/2;
3605 for (j = 0; j < end; j++) {
3606 MACC2(a[j], a[i-j], t0, t1, t2);
3607 MACC(m[j], n[i-j], t0, t1, t2);
3608 }
3609 if ((i & 1) == 0) {
3610 MACC(a[j], a[j], t0, t1, t2);
3611 }
3612 for (; j < i; j++) {
3613 MACC(m[j], n[i-j], t0, t1, t2);
3614 }
3615 m[i] = t0 * inv;
3616 MACC(m[i], n[0], t0, t1, t2);
3617
3618 assert(t0 == 0, "broken Montgomery square");
3619
3620 t0 = t1; t1 = t2; t2 = 0;
3621 }
3622
3623 for (i = len; i < 2*len; i++) {
3624 int start = i-len+1;
3625 int end = start + (len - start)/2;
3626 int j;
3627 for (j = start; j < end; j++) {
3628 MACC2(a[j], a[i-j], t0, t1, t2);
3629 MACC(m[j], n[i-j], t0, t1, t2);
3630 }
3631 if ((i & 1) == 0) {
3632 MACC(a[j], a[j], t0, t1, t2);
3633 }
3634 for (; j < len; j++) {
3635 MACC(m[j], n[i-j], t0, t1, t2);
3636 }
3637 m[i-len] = t0;
3638 t0 = t1; t1 = t2; t2 = 0;
3639 }
3640
3641 while (t0)
3642 t0 = sub(m, n, t0, len);
3643 }
3644
3645 // Swap words in a longword.
3646 static unsigned long swap(unsigned long x) {
3647 return (x << 32) | (x >> 32);
3648 }
3649
3650 // Copy len longwords from s to d, word-swapping as we go. The
3651 // destination array is reversed.
3652 static void reverse_words(unsigned long *s, unsigned long *d, int len) {
3653 d += len;
3654 while(len-- > 0) {
3655 d--;
3656 *d = swap(*s);
3657 s++;
3658 }
3659 }
3660
3661 // The threshold at which squaring is advantageous was determined
3662 // experimentally on an i7-3930K (Ivy Bridge) CPU @ 3.5GHz.
3663 #define MONTGOMERY_SQUARING_THRESHOLD 64
3664
3665 void SharedRuntime::montgomery_multiply(jint *a_ints, jint *b_ints, jint *n_ints,
3666 jint len, jlong inv,
3667 jint *m_ints) {
3668 assert(len % 2 == 0, "array length in montgomery_multiply must be even");
3669 int longwords = len/2;
3670
3671 // Make very sure we don't use so much space that the stack might
3672 // overflow. 512 jints corresponds to an 16384-bit integer and
3673 // will use here a total of 8k bytes of stack space.
3674 int total_allocation = longwords * sizeof (unsigned long) * 4;
3675 guarantee(total_allocation <= 8192, "must be");
3676 unsigned long *scratch = (unsigned long *)alloca(total_allocation);
3677
3678 // Local scratch arrays
3679 unsigned long
3680 *a = scratch + 0 * longwords,
3681 *b = scratch + 1 * longwords,
3682 *n = scratch + 2 * longwords,
3683 *m = scratch + 3 * longwords;
3684
3685 reverse_words((unsigned long *)a_ints, a, longwords);
3686 reverse_words((unsigned long *)b_ints, b, longwords);
3687 reverse_words((unsigned long *)n_ints, n, longwords);
3688
3689 ::montgomery_multiply(a, b, n, m, (unsigned long)inv, longwords);
3690
3691 reverse_words(m, (unsigned long *)m_ints, longwords);
3692 }
3693
3694 void SharedRuntime::montgomery_square(jint *a_ints, jint *n_ints,
3695 jint len, jlong inv,
3696 jint *m_ints) {
3697 assert(len % 2 == 0, "array length in montgomery_square must be even");
3698 int longwords = len/2;
3699
3700 // Make very sure we don't use so much space that the stack might
3701 // overflow. 512 jints corresponds to an 16384-bit integer and
3702 // will use here a total of 6k bytes of stack space.
3703 int total_allocation = longwords * sizeof (unsigned long) * 3;
3704 guarantee(total_allocation <= 8192, "must be");
3705 unsigned long *scratch = (unsigned long *)alloca(total_allocation);
3706
3707 // Local scratch arrays
3708 unsigned long
3709 *a = scratch + 0 * longwords,
3710 *n = scratch + 1 * longwords,
3711 *m = scratch + 2 * longwords;
3712
3713 reverse_words((unsigned long *)a_ints, a, longwords);
3714 reverse_words((unsigned long *)n_ints, n, longwords);
3715
3716 if (len >= MONTGOMERY_SQUARING_THRESHOLD) {
3717 ::montgomery_square(a, n, m, (unsigned long)inv, longwords);
3718 } else {
3719 ::montgomery_multiply(a, a, n, m, (unsigned long)inv, longwords);
3720 }
3721
3722 reverse_words(m, (unsigned long *)m_ints, longwords);
3723 }
3724
3725 #endif // WINDOWS
3726
3727 #ifdef COMPILER2
3728 // This is here instead of runtime_x86_64.cpp because it uses SimpleRuntimeFrame
3729 //
3730 //------------------------------generate_exception_blob---------------------------
3731 // creates exception blob at the end
3732 // Using exception blob, this code is jumped from a compiled method.
3733 // (see emit_exception_handler in x86_64.ad file)
3734 //
3735 // Given an exception pc at a call we call into the runtime for the
3736 // handler in this method. This handler might merely restore state
3737 // (i.e. callee save registers) unwind the frame and jump to the
3738 // exception handler for the nmethod if there is no Java level handler
3739 // for the nmethod.
3740 //
3741 // This code is entered with a jmp.
3742 //
3743 // Arguments:
3744 // rax: exception oop
3745 // rdx: exception pc
3746 //
3747 // Results:
3748 // rax: exception oop
3749 // rdx: exception pc in caller or ???
3750 // destination: exception handler of caller
3751 //
3752 // Note: the exception pc MUST be at a call (precise debug information)
3753 // Registers rax, rdx, rcx, rsi, rdi, r8-r11 are not callee saved.
3754 //
3755
3756 void OptoRuntime::generate_exception_blob() {
3757 assert(!OptoRuntime::is_callee_saved_register(RDX_num), "");
3758 assert(!OptoRuntime::is_callee_saved_register(RAX_num), "");
3759 assert(!OptoRuntime::is_callee_saved_register(RCX_num), "");
3760
3761 assert(SimpleRuntimeFrame::framesize % 4 == 0, "sp not 16-byte aligned");
3762
3763 // Allocate space for the code
3764 ResourceMark rm;
3765 // Setup code generation tools
3766 CodeBuffer buffer("exception_blob", 2048, 1024);
3767 MacroAssembler* masm = new MacroAssembler(&buffer);
3768
3769
3770 address start = __ pc();
3771
3772 // Exception pc is 'return address' for stack walker
3773 __ push(rdx);
3774 __ subptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Prolog
3775
3776 // Save callee-saved registers. See x86_64.ad.
3777
3778 // rbp is an implicitly saved callee saved register (i.e., the calling
3779 // convention will save/restore it in the prolog/epilog). Other than that
3780 // there are no callee save registers now that adapter frames are gone.
3781
3782 __ movptr(Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt), rbp);
3783
3784 // Store exception in Thread object. We cannot pass any arguments to the
3785 // handle_exception call, since we do not want to make any assumption
3786 // about the size of the frame where the exception happened in.
3787 // c_rarg0 is either rdi (Linux) or rcx (Windows).
3788 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()),rax);
3789 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), rdx);
3790
3791 // This call does all the hard work. It checks if an exception handler
3792 // exists in the method.
3793 // If so, it returns the handler address.
3794 // If not, it prepares for stack-unwinding, restoring the callee-save
3795 // registers of the frame being removed.
3796 //
3797 // address OptoRuntime::handle_exception_C(JavaThread* thread)
3798
3799 // At a method handle call, the stack may not be properly aligned
3800 // when returning with an exception.
3801 address the_pc = __ pc();
3802 __ set_last_Java_frame(noreg, noreg, the_pc);
3803 __ mov(c_rarg0, r15_thread);
3804 __ andptr(rsp, -(StackAlignmentInBytes)); // Align stack
3805 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, OptoRuntime::handle_exception_C)));
3806
3807 // Set an oopmap for the call site. This oopmap will only be used if we
3808 // are unwinding the stack. Hence, all locations will be dead.
3809 // Callee-saved registers will be the same as the frame above (i.e.,
3810 // handle_exception_stub), since they were restored when we got the
3811 // exception.
3812
3813 OopMapSet* oop_maps = new OopMapSet();
3814
3815 oop_maps->add_gc_map(the_pc - start, new OopMap(SimpleRuntimeFrame::framesize, 0));
3816
3817 __ reset_last_Java_frame(false);
3818
3819 // Restore callee-saved registers
3820
3821 // rbp is an implicitly saved callee-saved register (i.e., the calling
3822 // convention will save restore it in prolog/epilog) Other than that
3823 // there are no callee save registers now that adapter frames are gone.
3824
3825 __ movptr(rbp, Address(rsp, SimpleRuntimeFrame::rbp_off << LogBytesPerInt));
3826
3827 __ addptr(rsp, SimpleRuntimeFrame::return_off << LogBytesPerInt); // Epilog
3828 __ pop(rdx); // No need for exception pc anymore
3829
3830 // rax: exception handler
3831
3832 // We have a handler in rax (could be deopt blob).
3833 __ mov(r8, rax);
3834
3835 // Get the exception oop
3836 __ movptr(rax, Address(r15_thread, JavaThread::exception_oop_offset()));
3837 // Get the exception pc in case we are deoptimized
3838 __ movptr(rdx, Address(r15_thread, JavaThread::exception_pc_offset()));
3839 #ifdef ASSERT
3840 __ movptr(Address(r15_thread, JavaThread::exception_handler_pc_offset()), (int)NULL_WORD);
3841 __ movptr(Address(r15_thread, JavaThread::exception_pc_offset()), (int)NULL_WORD);
3842 #endif
3843 // Clear the exception oop so GC no longer processes it as a root.
3844 __ movptr(Address(r15_thread, JavaThread::exception_oop_offset()), (int)NULL_WORD);
3845
3846 // rax: exception oop
3847 // r8: exception handler
3848 // rdx: exception pc
3849 // Jump to handler
3850
3851 __ jmp(r8);
3852
3853 // Make sure all code is generated
3854 masm->flush();
3855
3856 // Set exception blob
3857 _exception_blob = ExceptionBlob::create(&buffer, oop_maps, SimpleRuntimeFrame::framesize >> 1);
3858 }
3859 #endif // COMPILER2