1 /*
2 * Copyright (c) 1997, 2011, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "interp_masm_sparc.hpp"
27 #include "interpreter/interpreter.hpp"
28 #include "interpreter/interpreterRuntime.hpp"
29 #include "oops/arrayOop.hpp"
30 #include "oops/markOop.hpp"
31 #include "oops/methodDataOop.hpp"
32 #include "oops/methodOop.hpp"
33 #include "prims/jvmtiExport.hpp"
34 #include "prims/jvmtiRedefineClassesTrace.hpp"
35 #include "prims/jvmtiThreadState.hpp"
36 #include "runtime/basicLock.hpp"
37 #include "runtime/biasedLocking.hpp"
38 #include "runtime/sharedRuntime.hpp"
39 #ifdef TARGET_OS_FAMILY_linux
40 # include "thread_linux.inline.hpp"
41 #endif
42 #ifdef TARGET_OS_FAMILY_solaris
43 # include "thread_solaris.inline.hpp"
44 #endif
45
46 #ifndef CC_INTERP
47 #ifndef FAST_DISPATCH
48 #define FAST_DISPATCH 1
49 #endif
50 #undef FAST_DISPATCH
51
52 // Implementation of InterpreterMacroAssembler
53
54 // This file specializes the assember with interpreter-specific macros
55
56 const Address InterpreterMacroAssembler::l_tmp(FP, (frame::interpreter_frame_l_scratch_fp_offset * wordSize) + STACK_BIAS);
57 const Address InterpreterMacroAssembler::d_tmp(FP, (frame::interpreter_frame_d_scratch_fp_offset * wordSize) + STACK_BIAS);
58
59 #else // CC_INTERP
60 #ifndef STATE
61 #define STATE(field_name) Lstate, in_bytes(byte_offset_of(BytecodeInterpreter, field_name))
62 #endif // STATE
63
64 #endif // CC_INTERP
65
66 void InterpreterMacroAssembler::compute_extra_locals_size_in_bytes(Register args_size, Register locals_size, Register delta) {
67 // Note: this algorithm is also used by C1's OSR entry sequence.
68 // Any changes should also be applied to CodeEmitter::emit_osr_entry().
69 assert_different_registers(args_size, locals_size);
70 // max_locals*2 for TAGS. Assumes that args_size has already been adjusted.
71 subcc(locals_size, args_size, delta);// extra space for non-arguments locals in words
72 // Use br/mov combination because it works on both V8 and V9 and is
73 // faster.
74 Label skip_move;
75 br(Assembler::negative, true, Assembler::pt, skip_move);
76 delayed()->mov(G0, delta);
77 bind(skip_move);
78 round_to(delta, WordsPerLong); // make multiple of 2 (SP must be 2-word aligned)
79 sll(delta, LogBytesPerWord, delta); // extra space for locals in bytes
80 }
81
82 #ifndef CC_INTERP
83
84 // Dispatch code executed in the prolog of a bytecode which does not do it's
85 // own dispatch. The dispatch address is computed and placed in IdispatchAddress
86 void InterpreterMacroAssembler::dispatch_prolog(TosState state, int bcp_incr) {
87 assert_not_delayed();
88 #ifdef FAST_DISPATCH
89 // FAST_DISPATCH and ProfileInterpreter are mutually exclusive since
90 // they both use I2.
91 assert(!ProfileInterpreter, "FAST_DISPATCH and +ProfileInterpreter are mutually exclusive");
92 ldub(Lbcp, bcp_incr, Lbyte_code); // load next bytecode
93 add(Lbyte_code, Interpreter::distance_from_dispatch_table(state), Lbyte_code);
94 // add offset to correct dispatch table
95 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
96 ld_ptr(IdispatchTables, Lbyte_code, IdispatchAddress);// get entry addr
97 #else
98 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
99 // dispatch table to use
100 AddressLiteral tbl(Interpreter::dispatch_table(state));
101 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
102 set(tbl, G3_scratch); // compute addr of table
103 ld_ptr(G3_scratch, Lbyte_code, IdispatchAddress); // get entry addr
104 #endif
105 }
106
107
108 // Dispatch code executed in the epilog of a bytecode which does not do it's
109 // own dispatch. The dispatch address in IdispatchAddress is used for the
110 // dispatch.
111 void InterpreterMacroAssembler::dispatch_epilog(TosState state, int bcp_incr) {
112 assert_not_delayed();
113 verify_FPU(1, state);
114 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
115 jmp( IdispatchAddress, 0 );
116 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr);
117 else delayed()->nop();
118 }
119
120
121 void InterpreterMacroAssembler::dispatch_next(TosState state, int bcp_incr) {
122 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
123 assert_not_delayed();
124 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
125 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr);
126 }
127
128
129 void InterpreterMacroAssembler::dispatch_next_noverify_oop(TosState state, int bcp_incr) {
130 // %%%% consider branching to a single shared dispatch stub (for each bcp_incr)
131 assert_not_delayed();
132 ldub( Lbcp, bcp_incr, Lbyte_code); // load next bytecode
133 dispatch_Lbyte_code(state, Interpreter::dispatch_table(state), bcp_incr, false);
134 }
135
136
137 void InterpreterMacroAssembler::dispatch_via(TosState state, address* table) {
138 // load current bytecode
139 assert_not_delayed();
140 ldub( Lbcp, 0, Lbyte_code); // load next bytecode
141 dispatch_base(state, table);
142 }
143
144
145 void InterpreterMacroAssembler::call_VM_leaf_base(
146 Register java_thread,
147 address entry_point,
148 int number_of_arguments
149 ) {
150 if (!java_thread->is_valid())
151 java_thread = L7_thread_cache;
152 // super call
153 MacroAssembler::call_VM_leaf_base(java_thread, entry_point, number_of_arguments);
154 }
155
156
157 void InterpreterMacroAssembler::call_VM_base(
158 Register oop_result,
159 Register java_thread,
160 Register last_java_sp,
161 address entry_point,
162 int number_of_arguments,
163 bool check_exception
164 ) {
165 if (!java_thread->is_valid())
166 java_thread = L7_thread_cache;
167 // See class ThreadInVMfromInterpreter, which assumes that the interpreter
168 // takes responsibility for setting its own thread-state on call-out.
169 // However, ThreadInVMfromInterpreter resets the state to "in_Java".
170
171 //save_bcp(); // save bcp
172 MacroAssembler::call_VM_base(oop_result, java_thread, last_java_sp, entry_point, number_of_arguments, check_exception);
173 //restore_bcp(); // restore bcp
174 //restore_locals(); // restore locals pointer
175 }
176
177
178 void InterpreterMacroAssembler::check_and_handle_popframe(Register scratch_reg) {
179 if (JvmtiExport::can_pop_frame()) {
180 Label L;
181
182 // Check the "pending popframe condition" flag in the current thread
183 ld(G2_thread, JavaThread::popframe_condition_offset(), scratch_reg);
184
185 // Initiate popframe handling only if it is not already being processed. If the flag
186 // has the popframe_processing bit set, it means that this code is called *during* popframe
187 // handling - we don't want to reenter.
188 btst(JavaThread::popframe_pending_bit, scratch_reg);
189 br(zero, false, pt, L);
190 delayed()->nop();
191 btst(JavaThread::popframe_processing_bit, scratch_reg);
192 br(notZero, false, pt, L);
193 delayed()->nop();
194
195 // Call Interpreter::remove_activation_preserving_args_entry() to get the
196 // address of the same-named entrypoint in the generated interpreter code.
197 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, Interpreter::remove_activation_preserving_args_entry));
198
199 // Jump to Interpreter::_remove_activation_preserving_args_entry
200 jmpl(O0, G0, G0);
201 delayed()->nop();
202 bind(L);
203 }
204 }
205
206
207 void InterpreterMacroAssembler::load_earlyret_value(TosState state) {
208 Register thr_state = G4_scratch;
209 ld_ptr(G2_thread, JavaThread::jvmti_thread_state_offset(), thr_state);
210 const Address tos_addr(thr_state, JvmtiThreadState::earlyret_tos_offset());
211 const Address oop_addr(thr_state, JvmtiThreadState::earlyret_oop_offset());
212 const Address val_addr(thr_state, JvmtiThreadState::earlyret_value_offset());
213 switch (state) {
214 case ltos: ld_long(val_addr, Otos_l); break;
215 case atos: ld_ptr(oop_addr, Otos_l);
216 st_ptr(G0, oop_addr); break;
217 case btos: // fall through
218 case ctos: // fall through
219 case stos: // fall through
220 case itos: ld(val_addr, Otos_l1); break;
221 case ftos: ldf(FloatRegisterImpl::S, val_addr, Ftos_f); break;
222 case dtos: ldf(FloatRegisterImpl::D, val_addr, Ftos_d); break;
223 case vtos: /* nothing to do */ break;
224 default : ShouldNotReachHere();
225 }
226 // Clean up tos value in the jvmti thread state
227 or3(G0, ilgl, G3_scratch);
228 stw(G3_scratch, tos_addr);
229 st_long(G0, val_addr);
230 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
231 }
232
233
234 void InterpreterMacroAssembler::check_and_handle_earlyret(Register scratch_reg) {
235 if (JvmtiExport::can_force_early_return()) {
236 Label L;
237 Register thr_state = G3_scratch;
238 ld_ptr(G2_thread, JavaThread::jvmti_thread_state_offset(), thr_state);
239 br_null_short(thr_state, pt, L); // if (thread->jvmti_thread_state() == NULL) exit;
240
241 // Initiate earlyret handling only if it is not already being processed.
242 // If the flag has the earlyret_processing bit set, it means that this code
243 // is called *during* earlyret handling - we don't want to reenter.
244 ld(thr_state, JvmtiThreadState::earlyret_state_offset(), G4_scratch);
245 cmp_and_br_short(G4_scratch, JvmtiThreadState::earlyret_pending, Assembler::notEqual, pt, L);
246
247 // Call Interpreter::remove_activation_early_entry() to get the address of the
248 // same-named entrypoint in the generated interpreter code
249 ld(thr_state, JvmtiThreadState::earlyret_tos_offset(), Otos_l1);
250 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, Interpreter::remove_activation_early_entry), Otos_l1);
251
252 // Jump to Interpreter::_remove_activation_early_entry
253 jmpl(O0, G0, G0);
254 delayed()->nop();
255 bind(L);
256 }
257 }
258
259
260 void InterpreterMacroAssembler::super_call_VM_leaf(Register thread_cache, address entry_point, Register arg_1, Register arg_2) {
261 mov(arg_1, O0);
262 mov(arg_2, O1);
263 MacroAssembler::call_VM_leaf_base(thread_cache, entry_point, 2);
264 }
265 #endif /* CC_INTERP */
266
267
268 #ifndef CC_INTERP
269
270 void InterpreterMacroAssembler::dispatch_base(TosState state, address* table) {
271 assert_not_delayed();
272 dispatch_Lbyte_code(state, table);
273 }
274
275
276 void InterpreterMacroAssembler::dispatch_normal(TosState state) {
277 dispatch_base(state, Interpreter::normal_table(state));
278 }
279
280
281 void InterpreterMacroAssembler::dispatch_only(TosState state) {
282 dispatch_base(state, Interpreter::dispatch_table(state));
283 }
284
285
286 // common code to dispatch and dispatch_only
287 // dispatch value in Lbyte_code and increment Lbcp
288
289 void InterpreterMacroAssembler::dispatch_Lbyte_code(TosState state, address* table, int bcp_incr, bool verify) {
290 verify_FPU(1, state);
291 // %%%%% maybe implement +VerifyActivationFrameSize here
292 //verify_thread(); //too slow; we will just verify on method entry & exit
293 if (verify) interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
294 #ifdef FAST_DISPATCH
295 if (table == Interpreter::dispatch_table(state)) {
296 // use IdispatchTables
297 add(Lbyte_code, Interpreter::distance_from_dispatch_table(state), Lbyte_code);
298 // add offset to correct dispatch table
299 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
300 ld_ptr(IdispatchTables, Lbyte_code, G3_scratch); // get entry addr
301 } else {
302 #endif
303 // dispatch table to use
304 AddressLiteral tbl(table);
305 sll(Lbyte_code, LogBytesPerWord, Lbyte_code); // multiply by wordSize
306 set(tbl, G3_scratch); // compute addr of table
307 ld_ptr(G3_scratch, Lbyte_code, G3_scratch); // get entry addr
308 #ifdef FAST_DISPATCH
309 }
310 #endif
311 jmp( G3_scratch, 0 );
312 if (bcp_incr != 0) delayed()->inc(Lbcp, bcp_incr);
313 else delayed()->nop();
314 }
315
316
317 // Helpers for expression stack
318
319 // Longs and doubles are Category 2 computational types in the
320 // JVM specification (section 3.11.1) and take 2 expression stack or
321 // local slots.
322 // Aligning them on 32 bit with tagged stacks is hard because the code generated
323 // for the dup* bytecodes depends on what types are already on the stack.
324 // If the types are split into the two stack/local slots, that is much easier
325 // (and we can use 0 for non-reference tags).
326
327 // Known good alignment in _LP64 but unknown otherwise
328 void InterpreterMacroAssembler::load_unaligned_double(Register r1, int offset, FloatRegister d) {
329 assert_not_delayed();
330
331 #ifdef _LP64
332 ldf(FloatRegisterImpl::D, r1, offset, d);
333 #else
334 ldf(FloatRegisterImpl::S, r1, offset, d);
335 ldf(FloatRegisterImpl::S, r1, offset + Interpreter::stackElementSize, d->successor());
336 #endif
337 }
338
339 // Known good alignment in _LP64 but unknown otherwise
340 void InterpreterMacroAssembler::store_unaligned_double(FloatRegister d, Register r1, int offset) {
341 assert_not_delayed();
342
343 #ifdef _LP64
344 stf(FloatRegisterImpl::D, d, r1, offset);
345 // store something more useful here
346 debug_only(stx(G0, r1, offset+Interpreter::stackElementSize);)
347 #else
348 stf(FloatRegisterImpl::S, d, r1, offset);
349 stf(FloatRegisterImpl::S, d->successor(), r1, offset + Interpreter::stackElementSize);
350 #endif
351 }
352
353
354 // Known good alignment in _LP64 but unknown otherwise
355 void InterpreterMacroAssembler::load_unaligned_long(Register r1, int offset, Register rd) {
356 assert_not_delayed();
357 #ifdef _LP64
358 ldx(r1, offset, rd);
359 #else
360 ld(r1, offset, rd);
361 ld(r1, offset + Interpreter::stackElementSize, rd->successor());
362 #endif
363 }
364
365 // Known good alignment in _LP64 but unknown otherwise
366 void InterpreterMacroAssembler::store_unaligned_long(Register l, Register r1, int offset) {
367 assert_not_delayed();
368
369 #ifdef _LP64
370 stx(l, r1, offset);
371 // store something more useful here
372 debug_only(stx(G0, r1, offset+Interpreter::stackElementSize);)
373 #else
374 st(l, r1, offset);
375 st(l->successor(), r1, offset + Interpreter::stackElementSize);
376 #endif
377 }
378
379 void InterpreterMacroAssembler::pop_i(Register r) {
380 assert_not_delayed();
381 ld(Lesp, Interpreter::expr_offset_in_bytes(0), r);
382 inc(Lesp, Interpreter::stackElementSize);
383 debug_only(verify_esp(Lesp));
384 }
385
386 void InterpreterMacroAssembler::pop_ptr(Register r, Register scratch) {
387 assert_not_delayed();
388 ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(0), r);
389 inc(Lesp, Interpreter::stackElementSize);
390 debug_only(verify_esp(Lesp));
391 }
392
393 void InterpreterMacroAssembler::pop_l(Register r) {
394 assert_not_delayed();
395 load_unaligned_long(Lesp, Interpreter::expr_offset_in_bytes(0), r);
396 inc(Lesp, 2*Interpreter::stackElementSize);
397 debug_only(verify_esp(Lesp));
398 }
399
400
401 void InterpreterMacroAssembler::pop_f(FloatRegister f, Register scratch) {
402 assert_not_delayed();
403 ldf(FloatRegisterImpl::S, Lesp, Interpreter::expr_offset_in_bytes(0), f);
404 inc(Lesp, Interpreter::stackElementSize);
405 debug_only(verify_esp(Lesp));
406 }
407
408
409 void InterpreterMacroAssembler::pop_d(FloatRegister f, Register scratch) {
410 assert_not_delayed();
411 load_unaligned_double(Lesp, Interpreter::expr_offset_in_bytes(0), f);
412 inc(Lesp, 2*Interpreter::stackElementSize);
413 debug_only(verify_esp(Lesp));
414 }
415
416
417 void InterpreterMacroAssembler::push_i(Register r) {
418 assert_not_delayed();
419 debug_only(verify_esp(Lesp));
420 st(r, Lesp, 0);
421 dec(Lesp, Interpreter::stackElementSize);
422 }
423
424 void InterpreterMacroAssembler::push_ptr(Register r) {
425 assert_not_delayed();
426 st_ptr(r, Lesp, 0);
427 dec(Lesp, Interpreter::stackElementSize);
428 }
429
430 // remember: our convention for longs in SPARC is:
431 // O0 (Otos_l1) has high-order part in first word,
432 // O1 (Otos_l2) has low-order part in second word
433
434 void InterpreterMacroAssembler::push_l(Register r) {
435 assert_not_delayed();
436 debug_only(verify_esp(Lesp));
437 // Longs are stored in memory-correct order, even if unaligned.
438 int offset = -Interpreter::stackElementSize;
439 store_unaligned_long(r, Lesp, offset);
440 dec(Lesp, 2 * Interpreter::stackElementSize);
441 }
442
443
444 void InterpreterMacroAssembler::push_f(FloatRegister f) {
445 assert_not_delayed();
446 debug_only(verify_esp(Lesp));
447 stf(FloatRegisterImpl::S, f, Lesp, 0);
448 dec(Lesp, Interpreter::stackElementSize);
449 }
450
451
452 void InterpreterMacroAssembler::push_d(FloatRegister d) {
453 assert_not_delayed();
454 debug_only(verify_esp(Lesp));
455 // Longs are stored in memory-correct order, even if unaligned.
456 int offset = -Interpreter::stackElementSize;
457 store_unaligned_double(d, Lesp, offset);
458 dec(Lesp, 2 * Interpreter::stackElementSize);
459 }
460
461
462 void InterpreterMacroAssembler::push(TosState state) {
463 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
464 switch (state) {
465 case atos: push_ptr(); break;
466 case btos: push_i(); break;
467 case ctos:
468 case stos: push_i(); break;
469 case itos: push_i(); break;
470 case ltos: push_l(); break;
471 case ftos: push_f(); break;
472 case dtos: push_d(); break;
473 case vtos: /* nothing to do */ break;
474 default : ShouldNotReachHere();
475 }
476 }
477
478
479 void InterpreterMacroAssembler::pop(TosState state) {
480 switch (state) {
481 case atos: pop_ptr(); break;
482 case btos: pop_i(); break;
483 case ctos:
484 case stos: pop_i(); break;
485 case itos: pop_i(); break;
486 case ltos: pop_l(); break;
487 case ftos: pop_f(); break;
488 case dtos: pop_d(); break;
489 case vtos: /* nothing to do */ break;
490 default : ShouldNotReachHere();
491 }
492 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
493 }
494
495
496 // Helpers for swap and dup
497 void InterpreterMacroAssembler::load_ptr(int n, Register val) {
498 ld_ptr(Lesp, Interpreter::expr_offset_in_bytes(n), val);
499 }
500 void InterpreterMacroAssembler::store_ptr(int n, Register val) {
501 st_ptr(val, Lesp, Interpreter::expr_offset_in_bytes(n));
502 }
503
504
505 void InterpreterMacroAssembler::load_receiver(Register param_count,
506 Register recv) {
507 sll(param_count, Interpreter::logStackElementSize, param_count);
508 ld_ptr(Lesp, param_count, recv); // gets receiver Oop
509 }
510
511 void InterpreterMacroAssembler::empty_expression_stack() {
512 // Reset Lesp.
513 sub( Lmonitors, wordSize, Lesp );
514
515 // Reset SP by subtracting more space from Lesp.
516 Label done;
517 verify_oop(Lmethod);
518 assert(G4_scratch != Gframe_size, "Only you can prevent register aliasing!");
519
520 // A native does not need to do this, since its callee does not change SP.
521 ld(Lmethod, methodOopDesc::access_flags_offset(), Gframe_size); // Load access flags.
522 btst(JVM_ACC_NATIVE, Gframe_size);
523 br(Assembler::notZero, false, Assembler::pt, done);
524 delayed()->nop();
525
526 // Compute max expression stack+register save area
527 lduh(Lmethod, in_bytes(methodOopDesc::max_stack_offset()), Gframe_size); // Load max stack.
528 add( Gframe_size, frame::memory_parameter_word_sp_offset, Gframe_size );
529
530 //
531 // now set up a stack frame with the size computed above
532 //
533 //round_to( Gframe_size, WordsPerLong ); // -- moved down to the "and" below
534 sll( Gframe_size, LogBytesPerWord, Gframe_size );
535 sub( Lesp, Gframe_size, Gframe_size );
536 and3( Gframe_size, -(2 * wordSize), Gframe_size ); // align SP (downwards) to an 8/16-byte boundary
537 debug_only(verify_sp(Gframe_size, G4_scratch));
538 #ifdef _LP64
539 sub(Gframe_size, STACK_BIAS, Gframe_size );
540 #endif
541 mov(Gframe_size, SP);
542
543 bind(done);
544 }
545
546
547 #ifdef ASSERT
548 void InterpreterMacroAssembler::verify_sp(Register Rsp, Register Rtemp) {
549 Label Bad, OK;
550
551 // Saved SP must be aligned.
552 #ifdef _LP64
553 btst(2*BytesPerWord-1, Rsp);
554 #else
555 btst(LongAlignmentMask, Rsp);
556 #endif
557 br(Assembler::notZero, false, Assembler::pn, Bad);
558 delayed()->nop();
559
560 // Saved SP, plus register window size, must not be above FP.
561 add(Rsp, frame::register_save_words * wordSize, Rtemp);
562 #ifdef _LP64
563 sub(Rtemp, STACK_BIAS, Rtemp); // Bias Rtemp before cmp to FP
564 #endif
565 cmp_and_brx_short(Rtemp, FP, Assembler::greaterUnsigned, Assembler::pn, Bad);
566
567 // Saved SP must not be ridiculously below current SP.
568 size_t maxstack = MAX2(JavaThread::stack_size_at_create(), (size_t) 4*K*K);
569 set(maxstack, Rtemp);
570 sub(SP, Rtemp, Rtemp);
571 #ifdef _LP64
572 add(Rtemp, STACK_BIAS, Rtemp); // Unbias Rtemp before cmp to Rsp
573 #endif
574 cmp_and_brx_short(Rsp, Rtemp, Assembler::lessUnsigned, Assembler::pn, Bad);
575
576 ba_short(OK);
577
578 bind(Bad);
579 stop("on return to interpreted call, restored SP is corrupted");
580
581 bind(OK);
582 }
583
584
585 void InterpreterMacroAssembler::verify_esp(Register Resp) {
586 // about to read or write Resp[0]
587 // make sure it is not in the monitors or the register save area
588 Label OK1, OK2;
589
590 cmp(Resp, Lmonitors);
591 brx(Assembler::lessUnsigned, true, Assembler::pt, OK1);
592 delayed()->sub(Resp, frame::memory_parameter_word_sp_offset * wordSize, Resp);
593 stop("too many pops: Lesp points into monitor area");
594 bind(OK1);
595 #ifdef _LP64
596 sub(Resp, STACK_BIAS, Resp);
597 #endif
598 cmp(Resp, SP);
599 brx(Assembler::greaterEqualUnsigned, false, Assembler::pt, OK2);
600 delayed()->add(Resp, STACK_BIAS + frame::memory_parameter_word_sp_offset * wordSize, Resp);
601 stop("too many pushes: Lesp points into register window");
602 bind(OK2);
603 }
604 #endif // ASSERT
605
606 // Load compiled (i2c) or interpreter entry when calling from interpreted and
607 // do the call. Centralized so that all interpreter calls will do the same actions.
608 // If jvmti single stepping is on for a thread we must not call compiled code.
609 void InterpreterMacroAssembler::call_from_interpreter(Register target, Register scratch, Register Rret) {
610
611 // Assume we want to go compiled if available
612
613 ld_ptr(G5_method, in_bytes(methodOopDesc::from_interpreted_offset()), target);
614
615 if (JvmtiExport::can_post_interpreter_events()) {
616 // JVMTI events, such as single-stepping, are implemented partly by avoiding running
617 // compiled code in threads for which the event is enabled. Check here for
618 // interp_only_mode if these events CAN be enabled.
619 verify_thread();
620 Label skip_compiled_code;
621
622 const Address interp_only(G2_thread, JavaThread::interp_only_mode_offset());
623 ld(interp_only, scratch);
624 cmp_zero_and_br(Assembler::notZero, scratch, skip_compiled_code, true, Assembler::pn);
625 delayed()->ld_ptr(G5_method, in_bytes(methodOopDesc::interpreter_entry_offset()), target);
626 bind(skip_compiled_code);
627 }
628
629 // the i2c_adapters need methodOop in G5_method (right? %%%)
630 // do the call
631 #ifdef ASSERT
632 {
633 Label ok;
634 br_notnull_short(target, Assembler::pt, ok);
635 stop("null entry point");
636 bind(ok);
637 }
638 #endif // ASSERT
639
640 // Adjust Rret first so Llast_SP can be same as Rret
641 add(Rret, -frame::pc_return_offset, O7);
642 add(Lesp, BytesPerWord, Gargs); // setup parameter pointer
643 // Record SP so we can remove any stack space allocated by adapter transition
644 jmp(target, 0);
645 delayed()->mov(SP, Llast_SP);
646 }
647
648 void InterpreterMacroAssembler::if_cmp(Condition cc, bool ptr_compare) {
649 assert_not_delayed();
650
651 Label not_taken;
652 if (ptr_compare) brx(cc, false, Assembler::pn, not_taken);
653 else br (cc, false, Assembler::pn, not_taken);
654 delayed()->nop();
655
656 TemplateTable::branch(false,false);
657
658 bind(not_taken);
659
660 profile_not_taken_branch(G3_scratch);
661 }
662
663
664 void InterpreterMacroAssembler::get_2_byte_integer_at_bcp(
665 int bcp_offset,
666 Register Rtmp,
667 Register Rdst,
668 signedOrNot is_signed,
669 setCCOrNot should_set_CC ) {
670 assert(Rtmp != Rdst, "need separate temp register");
671 assert_not_delayed();
672 switch (is_signed) {
673 default: ShouldNotReachHere();
674
675 case Signed: ldsb( Lbcp, bcp_offset, Rdst ); break; // high byte
676 case Unsigned: ldub( Lbcp, bcp_offset, Rdst ); break; // high byte
677 }
678 ldub( Lbcp, bcp_offset + 1, Rtmp ); // low byte
679 sll( Rdst, BitsPerByte, Rdst);
680 switch (should_set_CC ) {
681 default: ShouldNotReachHere();
682
683 case set_CC: orcc( Rdst, Rtmp, Rdst ); break;
684 case dont_set_CC: or3( Rdst, Rtmp, Rdst ); break;
685 }
686 }
687
688
689 void InterpreterMacroAssembler::get_4_byte_integer_at_bcp(
690 int bcp_offset,
691 Register Rtmp,
692 Register Rdst,
693 setCCOrNot should_set_CC ) {
694 assert(Rtmp != Rdst, "need separate temp register");
695 assert_not_delayed();
696 add( Lbcp, bcp_offset, Rtmp);
697 andcc( Rtmp, 3, G0);
698 Label aligned;
699 switch (should_set_CC ) {
700 default: ShouldNotReachHere();
701
702 case set_CC: break;
703 case dont_set_CC: break;
704 }
705
706 br(Assembler::zero, true, Assembler::pn, aligned);
707 #ifdef _LP64
708 delayed()->ldsw(Rtmp, 0, Rdst);
709 #else
710 delayed()->ld(Rtmp, 0, Rdst);
711 #endif
712
713 ldub(Lbcp, bcp_offset + 3, Rdst);
714 ldub(Lbcp, bcp_offset + 2, Rtmp); sll(Rtmp, 8, Rtmp); or3(Rtmp, Rdst, Rdst);
715 ldub(Lbcp, bcp_offset + 1, Rtmp); sll(Rtmp, 16, Rtmp); or3(Rtmp, Rdst, Rdst);
716 #ifdef _LP64
717 ldsb(Lbcp, bcp_offset + 0, Rtmp); sll(Rtmp, 24, Rtmp);
718 #else
719 // Unsigned load is faster than signed on some implementations
720 ldub(Lbcp, bcp_offset + 0, Rtmp); sll(Rtmp, 24, Rtmp);
721 #endif
722 or3(Rtmp, Rdst, Rdst );
723
724 bind(aligned);
725 if (should_set_CC == set_CC) tst(Rdst);
726 }
727
728
729 void InterpreterMacroAssembler::get_cache_index_at_bcp(Register cache, Register tmp,
730 int bcp_offset, size_t index_size) {
731 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
732 if (index_size == sizeof(u2)) {
733 get_2_byte_integer_at_bcp(bcp_offset, cache, tmp, Unsigned);
734 } else if (index_size == sizeof(u4)) {
735 assert(EnableInvokeDynamic, "giant index used only for JSR 292");
736 get_4_byte_integer_at_bcp(bcp_offset, cache, tmp);
737 assert(constantPoolCacheOopDesc::decode_secondary_index(~123) == 123, "else change next line");
738 xor3(tmp, -1, tmp); // convert to plain index
739 } else if (index_size == sizeof(u1)) {
740 assert(EnableInvokeDynamic, "tiny index used only for JSR 292");
741 ldub(Lbcp, bcp_offset, tmp);
742 } else {
743 ShouldNotReachHere();
744 }
745 }
746
747
748 void InterpreterMacroAssembler::get_cache_and_index_at_bcp(Register cache, Register tmp,
749 int bcp_offset, size_t index_size) {
750 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
751 assert_different_registers(cache, tmp);
752 assert_not_delayed();
753 get_cache_index_at_bcp(cache, tmp, bcp_offset, index_size);
754 // convert from field index to ConstantPoolCacheEntry index and from
755 // word index to byte offset
756 sll(tmp, exact_log2(in_words(ConstantPoolCacheEntry::size()) * BytesPerWord), tmp);
757 add(LcpoolCache, tmp, cache);
758 }
759
760
761 void InterpreterMacroAssembler::get_cache_entry_pointer_at_bcp(Register cache, Register tmp,
762 int bcp_offset, size_t index_size) {
763 assert(bcp_offset > 0, "bcp is still pointing to start of bytecode");
764 assert_different_registers(cache, tmp);
765 assert_not_delayed();
766 if (index_size == sizeof(u2)) {
767 get_2_byte_integer_at_bcp(bcp_offset, cache, tmp, Unsigned);
768 } else {
769 ShouldNotReachHere(); // other sizes not supported here
770 }
771 // convert from field index to ConstantPoolCacheEntry index
772 // and from word index to byte offset
773 sll(tmp, exact_log2(in_words(ConstantPoolCacheEntry::size()) * BytesPerWord), tmp);
774 // skip past the header
775 add(tmp, in_bytes(constantPoolCacheOopDesc::base_offset()), tmp);
776 // construct pointer to cache entry
777 add(LcpoolCache, tmp, cache);
778 }
779
780
781 // Generate a subtype check: branch to ok_is_subtype if sub_klass is
782 // a subtype of super_klass. Blows registers Rsuper_klass, Rsub_klass, tmp1, tmp2.
783 void InterpreterMacroAssembler::gen_subtype_check(Register Rsub_klass,
784 Register Rsuper_klass,
785 Register Rtmp1,
786 Register Rtmp2,
787 Register Rtmp3,
788 Label &ok_is_subtype ) {
789 Label not_subtype;
790
791 // Profile the not-null value's klass.
792 profile_typecheck(Rsub_klass, Rtmp1);
793
794 check_klass_subtype_fast_path(Rsub_klass, Rsuper_klass,
795 Rtmp1, Rtmp2,
796 &ok_is_subtype, ¬_subtype, NULL);
797
798 check_klass_subtype_slow_path(Rsub_klass, Rsuper_klass,
799 Rtmp1, Rtmp2, Rtmp3, /*hack:*/ noreg,
800 &ok_is_subtype, NULL);
801
802 bind(not_subtype);
803 profile_typecheck_failed(Rtmp1);
804 }
805
806 // Separate these two to allow for delay slot in middle
807 // These are used to do a test and full jump to exception-throwing code.
808
809 // %%%%% Could possibly reoptimize this by testing to see if could use
810 // a single conditional branch (i.e. if span is small enough.
811 // If you go that route, than get rid of the split and give up
812 // on the delay-slot hack.
813
814 void InterpreterMacroAssembler::throw_if_not_1_icc( Condition ok_condition,
815 Label& ok ) {
816 assert_not_delayed();
817 br(ok_condition, true, pt, ok);
818 // DELAY SLOT
819 }
820
821 void InterpreterMacroAssembler::throw_if_not_1_xcc( Condition ok_condition,
822 Label& ok ) {
823 assert_not_delayed();
824 bp( ok_condition, true, Assembler::xcc, pt, ok);
825 // DELAY SLOT
826 }
827
828 void InterpreterMacroAssembler::throw_if_not_1_x( Condition ok_condition,
829 Label& ok ) {
830 assert_not_delayed();
831 brx(ok_condition, true, pt, ok);
832 // DELAY SLOT
833 }
834
835 void InterpreterMacroAssembler::throw_if_not_2( address throw_entry_point,
836 Register Rscratch,
837 Label& ok ) {
838 assert(throw_entry_point != NULL, "entry point must be generated by now");
839 AddressLiteral dest(throw_entry_point);
840 jump_to(dest, Rscratch);
841 delayed()->nop();
842 bind(ok);
843 }
844
845
846 // And if you cannot use the delay slot, here is a shorthand:
847
848 void InterpreterMacroAssembler::throw_if_not_icc( Condition ok_condition,
849 address throw_entry_point,
850 Register Rscratch ) {
851 Label ok;
852 if (ok_condition != never) {
853 throw_if_not_1_icc( ok_condition, ok);
854 delayed()->nop();
855 }
856 throw_if_not_2( throw_entry_point, Rscratch, ok);
857 }
858 void InterpreterMacroAssembler::throw_if_not_xcc( Condition ok_condition,
859 address throw_entry_point,
860 Register Rscratch ) {
861 Label ok;
862 if (ok_condition != never) {
863 throw_if_not_1_xcc( ok_condition, ok);
864 delayed()->nop();
865 }
866 throw_if_not_2( throw_entry_point, Rscratch, ok);
867 }
868 void InterpreterMacroAssembler::throw_if_not_x( Condition ok_condition,
869 address throw_entry_point,
870 Register Rscratch ) {
871 Label ok;
872 if (ok_condition != never) {
873 throw_if_not_1_x( ok_condition, ok);
874 delayed()->nop();
875 }
876 throw_if_not_2( throw_entry_point, Rscratch, ok);
877 }
878
879 // Check that index is in range for array, then shift index by index_shift, and put arrayOop + shifted_index into res
880 // Note: res is still shy of address by array offset into object.
881
882 void InterpreterMacroAssembler::index_check_without_pop(Register array, Register index, int index_shift, Register tmp, Register res) {
883 assert_not_delayed();
884
885 verify_oop(array);
886 #ifdef _LP64
887 // sign extend since tos (index) can be a 32bit value
888 sra(index, G0, index);
889 #endif // _LP64
890
891 // check array
892 Label ptr_ok;
893 tst(array);
894 throw_if_not_1_x( notZero, ptr_ok );
895 delayed()->ld( array, arrayOopDesc::length_offset_in_bytes(), tmp ); // check index
896 throw_if_not_2( Interpreter::_throw_NullPointerException_entry, G3_scratch, ptr_ok);
897
898 Label index_ok;
899 cmp(index, tmp);
900 throw_if_not_1_icc( lessUnsigned, index_ok );
901 if (index_shift > 0) delayed()->sll(index, index_shift, index);
902 else delayed()->add(array, index, res); // addr - const offset in index
903 // convention: move aberrant index into G3_scratch for exception message
904 mov(index, G3_scratch);
905 throw_if_not_2( Interpreter::_throw_ArrayIndexOutOfBoundsException_entry, G4_scratch, index_ok);
906
907 // add offset if didn't do it in delay slot
908 if (index_shift > 0) add(array, index, res); // addr - const offset in index
909 }
910
911
912 void InterpreterMacroAssembler::index_check(Register array, Register index, int index_shift, Register tmp, Register res) {
913 assert_not_delayed();
914
915 // pop array
916 pop_ptr(array);
917
918 // check array
919 index_check_without_pop(array, index, index_shift, tmp, res);
920 }
921
922
923 void InterpreterMacroAssembler::get_constant_pool(Register Rdst) {
924 ld_ptr(Lmethod, in_bytes(methodOopDesc::constants_offset()), Rdst);
925 }
926
927
928 void InterpreterMacroAssembler::get_constant_pool_cache(Register Rdst) {
929 get_constant_pool(Rdst);
930 ld_ptr(Rdst, constantPoolOopDesc::cache_offset_in_bytes(), Rdst);
931 }
932
933
934 void InterpreterMacroAssembler::get_cpool_and_tags(Register Rcpool, Register Rtags) {
935 get_constant_pool(Rcpool);
936 ld_ptr(Rcpool, constantPoolOopDesc::tags_offset_in_bytes(), Rtags);
937 }
938
939
940 // unlock if synchronized method
941 //
942 // Unlock the receiver if this is a synchronized method.
943 // Unlock any Java monitors from syncronized blocks.
944 //
945 // If there are locked Java monitors
946 // If throw_monitor_exception
947 // throws IllegalMonitorStateException
948 // Else if install_monitor_exception
949 // installs IllegalMonitorStateException
950 // Else
951 // no error processing
952 void InterpreterMacroAssembler::unlock_if_synchronized_method(TosState state,
953 bool throw_monitor_exception,
954 bool install_monitor_exception) {
955 Label unlocked, unlock, no_unlock;
956
957 // get the value of _do_not_unlock_if_synchronized into G1_scratch
958 const Address do_not_unlock_if_synchronized(G2_thread,
959 JavaThread::do_not_unlock_if_synchronized_offset());
960 ldbool(do_not_unlock_if_synchronized, G1_scratch);
961 stbool(G0, do_not_unlock_if_synchronized); // reset the flag
962
963 // check if synchronized method
964 const Address access_flags(Lmethod, methodOopDesc::access_flags_offset());
965 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
966 push(state); // save tos
967 ld(access_flags, G3_scratch); // Load access flags.
968 btst(JVM_ACC_SYNCHRONIZED, G3_scratch);
969 br(zero, false, pt, unlocked);
970 delayed()->nop();
971
972 // Don't unlock anything if the _do_not_unlock_if_synchronized flag
973 // is set.
974 cmp_zero_and_br(Assembler::notZero, G1_scratch, no_unlock);
975 delayed()->nop();
976
977 // BasicObjectLock will be first in list, since this is a synchronized method. However, need
978 // to check that the object has not been unlocked by an explicit monitorexit bytecode.
979
980 //Intel: if (throw_monitor_exception) ... else ...
981 // Entry already unlocked, need to throw exception
982 //...
983
984 // pass top-most monitor elem
985 add( top_most_monitor(), O1 );
986
987 ld_ptr(O1, BasicObjectLock::obj_offset_in_bytes(), G3_scratch);
988 br_notnull_short(G3_scratch, pt, unlock);
989
990 if (throw_monitor_exception) {
991 // Entry already unlocked need to throw an exception
992 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_illegal_monitor_state_exception));
993 should_not_reach_here();
994 } else {
995 // Monitor already unlocked during a stack unroll.
996 // If requested, install an illegal_monitor_state_exception.
997 // Continue with stack unrolling.
998 if (install_monitor_exception) {
999 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::new_illegal_monitor_state_exception));
1000 }
1001 ba_short(unlocked);
1002 }
1003
1004 bind(unlock);
1005
1006 unlock_object(O1);
1007
1008 bind(unlocked);
1009
1010 // I0, I1: Might contain return value
1011
1012 // Check that all monitors are unlocked
1013 { Label loop, exception, entry, restart;
1014
1015 Register Rmptr = O0;
1016 Register Rtemp = O1;
1017 Register Rlimit = Lmonitors;
1018 const jint delta = frame::interpreter_frame_monitor_size() * wordSize;
1019 assert( (delta & LongAlignmentMask) == 0,
1020 "sizeof BasicObjectLock must be even number of doublewords");
1021
1022 #ifdef ASSERT
1023 add(top_most_monitor(), Rmptr, delta);
1024 { Label L;
1025 // ensure that Rmptr starts out above (or at) Rlimit
1026 cmp_and_brx_short(Rmptr, Rlimit, Assembler::greaterEqualUnsigned, pn, L);
1027 stop("monitor stack has negative size");
1028 bind(L);
1029 }
1030 #endif
1031 bind(restart);
1032 ba(entry);
1033 delayed()->
1034 add(top_most_monitor(), Rmptr, delta); // points to current entry, starting with bottom-most entry
1035
1036 // Entry is still locked, need to throw exception
1037 bind(exception);
1038 if (throw_monitor_exception) {
1039 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::throw_illegal_monitor_state_exception));
1040 should_not_reach_here();
1041 } else {
1042 // Stack unrolling. Unlock object and if requested, install illegal_monitor_exception.
1043 // Unlock does not block, so don't have to worry about the frame
1044 unlock_object(Rmptr);
1045 if (install_monitor_exception) {
1046 MacroAssembler::call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::new_illegal_monitor_state_exception));
1047 }
1048 ba_short(restart);
1049 }
1050
1051 bind(loop);
1052 cmp(Rtemp, G0); // check if current entry is used
1053 brx(Assembler::notEqual, false, pn, exception);
1054 delayed()->
1055 dec(Rmptr, delta); // otherwise advance to next entry
1056 #ifdef ASSERT
1057 { Label L;
1058 // ensure that Rmptr has not somehow stepped below Rlimit
1059 cmp_and_brx_short(Rmptr, Rlimit, Assembler::greaterEqualUnsigned, pn, L);
1060 stop("ran off the end of the monitor stack");
1061 bind(L);
1062 }
1063 #endif
1064 bind(entry);
1065 cmp(Rmptr, Rlimit); // check if bottom reached
1066 brx(Assembler::notEqual, true, pn, loop); // if not at bottom then check this entry
1067 delayed()->
1068 ld_ptr(Rmptr, BasicObjectLock::obj_offset_in_bytes() - delta, Rtemp);
1069 }
1070
1071 bind(no_unlock);
1072 pop(state);
1073 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
1074 }
1075
1076
1077 // remove activation
1078 //
1079 // Unlock the receiver if this is a synchronized method.
1080 // Unlock any Java monitors from syncronized blocks.
1081 // Remove the activation from the stack.
1082 //
1083 // If there are locked Java monitors
1084 // If throw_monitor_exception
1085 // throws IllegalMonitorStateException
1086 // Else if install_monitor_exception
1087 // installs IllegalMonitorStateException
1088 // Else
1089 // no error processing
1090 void InterpreterMacroAssembler::remove_activation(TosState state,
1091 bool throw_monitor_exception,
1092 bool install_monitor_exception) {
1093
1094 unlock_if_synchronized_method(state, throw_monitor_exception, install_monitor_exception);
1095
1096 // save result (push state before jvmti call and pop it afterwards) and notify jvmti
1097 notify_method_exit(false, state, NotifyJVMTI);
1098
1099 interp_verify_oop(Otos_i, state, __FILE__, __LINE__);
1100 verify_oop(Lmethod);
1101 verify_thread();
1102
1103 // return tos
1104 assert(Otos_l1 == Otos_i, "adjust code below");
1105 switch (state) {
1106 #ifdef _LP64
1107 case ltos: mov(Otos_l, Otos_l->after_save()); break; // O0 -> I0
1108 #else
1109 case ltos: mov(Otos_l2, Otos_l2->after_save()); // fall through // O1 -> I1
1110 #endif
1111 case btos: // fall through
1112 case ctos:
1113 case stos: // fall through
1114 case atos: // fall through
1115 case itos: mov(Otos_l1, Otos_l1->after_save()); break; // O0 -> I0
1116 case ftos: // fall through
1117 case dtos: // fall through
1118 case vtos: /* nothing to do */ break;
1119 default : ShouldNotReachHere();
1120 }
1121
1122 #if defined(COMPILER2) && !defined(_LP64)
1123 if (state == ltos) {
1124 // C2 expects long results in G1 we can't tell if we're returning to interpreted
1125 // or compiled so just be safe use G1 and O0/O1
1126
1127 // Shift bits into high (msb) of G1
1128 sllx(Otos_l1->after_save(), 32, G1);
1129 // Zero extend low bits
1130 srl (Otos_l2->after_save(), 0, Otos_l2->after_save());
1131 or3 (Otos_l2->after_save(), G1, G1);
1132 }
1133 #endif /* COMPILER2 */
1134
1135 }
1136 #endif /* CC_INTERP */
1137
1138
1139 // Lock object
1140 //
1141 // Argument - lock_reg points to the BasicObjectLock to be used for locking,
1142 // it must be initialized with the object to lock
1143 void InterpreterMacroAssembler::lock_object(Register lock_reg, Register Object) {
1144 if (UseHeavyMonitors) {
1145 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorenter), lock_reg);
1146 }
1147 else {
1148 Register obj_reg = Object;
1149 Register mark_reg = G4_scratch;
1150 Register temp_reg = G1_scratch;
1151 Address lock_addr(lock_reg, BasicObjectLock::lock_offset_in_bytes());
1152 Address mark_addr(obj_reg, oopDesc::mark_offset_in_bytes());
1153 Label done;
1154
1155 Label slow_case;
1156
1157 assert_different_registers(lock_reg, obj_reg, mark_reg, temp_reg);
1158
1159 // load markOop from object into mark_reg
1160 ld_ptr(mark_addr, mark_reg);
1161
1162 if (UseBiasedLocking) {
1163 biased_locking_enter(obj_reg, mark_reg, temp_reg, done, &slow_case);
1164 }
1165
1166 // get the address of basicLock on stack that will be stored in the object
1167 // we need a temporary register here as we do not want to clobber lock_reg
1168 // (cas clobbers the destination register)
1169 mov(lock_reg, temp_reg);
1170 // set mark reg to be (markOop of object | UNLOCK_VALUE)
1171 or3(mark_reg, markOopDesc::unlocked_value, mark_reg);
1172 // initialize the box (Must happen before we update the object mark!)
1173 st_ptr(mark_reg, lock_addr, BasicLock::displaced_header_offset_in_bytes());
1174 // compare and exchange object_addr, markOop | 1, stack address of basicLock
1175 assert(mark_addr.disp() == 0, "cas must take a zero displacement");
1176 casx_under_lock(mark_addr.base(), mark_reg, temp_reg,
1177 (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
1178
1179 // if the compare and exchange succeeded we are done (we saw an unlocked object)
1180 cmp_and_brx_short(mark_reg, temp_reg, Assembler::equal, Assembler::pt, done);
1181
1182 // We did not see an unlocked object so try the fast recursive case
1183
1184 // Check if owner is self by comparing the value in the markOop of object
1185 // with the stack pointer
1186 sub(temp_reg, SP, temp_reg);
1187 #ifdef _LP64
1188 sub(temp_reg, STACK_BIAS, temp_reg);
1189 #endif
1190 assert(os::vm_page_size() > 0xfff, "page size too small - change the constant");
1191
1192 // Composite "andcc" test:
1193 // (a) %sp -vs- markword proximity check, and,
1194 // (b) verify mark word LSBs == 0 (Stack-locked).
1195 //
1196 // FFFFF003/FFFFFFFFFFFF003 is (markOopDesc::lock_mask_in_place | -os::vm_page_size())
1197 // Note that the page size used for %sp proximity testing is arbitrary and is
1198 // unrelated to the actual MMU page size. We use a 'logical' page size of
1199 // 4096 bytes. F..FFF003 is designed to fit conveniently in the SIMM13 immediate
1200 // field of the andcc instruction.
1201 andcc (temp_reg, 0xFFFFF003, G0) ;
1202
1203 // if condition is true we are done and hence we can store 0 in the displaced
1204 // header indicating it is a recursive lock and be done
1205 brx(Assembler::zero, true, Assembler::pt, done);
1206 delayed()->st_ptr(G0, lock_addr, BasicLock::displaced_header_offset_in_bytes());
1207
1208 // none of the above fast optimizations worked so we have to get into the
1209 // slow case of monitor enter
1210 bind(slow_case);
1211 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorenter), lock_reg);
1212
1213 bind(done);
1214 }
1215 }
1216
1217 // Unlocks an object. Used in monitorexit bytecode and remove_activation.
1218 //
1219 // Argument - lock_reg points to the BasicObjectLock for lock
1220 // Throw IllegalMonitorException if object is not locked by current thread
1221 void InterpreterMacroAssembler::unlock_object(Register lock_reg) {
1222 if (UseHeavyMonitors) {
1223 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorexit), lock_reg);
1224 } else {
1225 Register obj_reg = G3_scratch;
1226 Register mark_reg = G4_scratch;
1227 Register displaced_header_reg = G1_scratch;
1228 Address lockobj_addr(lock_reg, BasicObjectLock::obj_offset_in_bytes());
1229 Address mark_addr(obj_reg, oopDesc::mark_offset_in_bytes());
1230 Label done;
1231
1232 if (UseBiasedLocking) {
1233 // load the object out of the BasicObjectLock
1234 ld_ptr(lockobj_addr, obj_reg);
1235 biased_locking_exit(mark_addr, mark_reg, done, true);
1236 st_ptr(G0, lockobj_addr); // free entry
1237 }
1238
1239 // Test first if we are in the fast recursive case
1240 Address lock_addr(lock_reg, BasicObjectLock::lock_offset_in_bytes() + BasicLock::displaced_header_offset_in_bytes());
1241 ld_ptr(lock_addr, displaced_header_reg);
1242 br_null(displaced_header_reg, true, Assembler::pn, done);
1243 delayed()->st_ptr(G0, lockobj_addr); // free entry
1244
1245 // See if it is still a light weight lock, if so we just unlock
1246 // the object and we are done
1247
1248 if (!UseBiasedLocking) {
1249 // load the object out of the BasicObjectLock
1250 ld_ptr(lockobj_addr, obj_reg);
1251 }
1252
1253 // we have the displaced header in displaced_header_reg
1254 // we expect to see the stack address of the basicLock in case the
1255 // lock is still a light weight lock (lock_reg)
1256 assert(mark_addr.disp() == 0, "cas must take a zero displacement");
1257 casx_under_lock(mark_addr.base(), lock_reg, displaced_header_reg,
1258 (address)StubRoutines::Sparc::atomic_memory_operation_lock_addr());
1259 cmp(lock_reg, displaced_header_reg);
1260 brx(Assembler::equal, true, Assembler::pn, done);
1261 delayed()->st_ptr(G0, lockobj_addr); // free entry
1262
1263 // The lock has been converted into a heavy lock and hence
1264 // we need to get into the slow case
1265
1266 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::monitorexit), lock_reg);
1267
1268 bind(done);
1269 }
1270 }
1271
1272 #ifndef CC_INTERP
1273
1274 // Get the method data pointer from the methodOop and set the
1275 // specified register to its value.
1276
1277 void InterpreterMacroAssembler::set_method_data_pointer() {
1278 assert(ProfileInterpreter, "must be profiling interpreter");
1279 Label get_continue;
1280
1281 ld_ptr(Lmethod, in_bytes(methodOopDesc::method_data_offset()), ImethodDataPtr);
1282 test_method_data_pointer(get_continue);
1283 add(ImethodDataPtr, in_bytes(methodDataOopDesc::data_offset()), ImethodDataPtr);
1284 bind(get_continue);
1285 }
1286
1287 // Set the method data pointer for the current bcp.
1288
1289 void InterpreterMacroAssembler::set_method_data_pointer_for_bcp() {
1290 assert(ProfileInterpreter, "must be profiling interpreter");
1291 Label zero_continue;
1292
1293 // Test MDO to avoid the call if it is NULL.
1294 ld_ptr(Lmethod, in_bytes(methodOopDesc::method_data_offset()), ImethodDataPtr);
1295 test_method_data_pointer(zero_continue);
1296 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::bcp_to_di), Lmethod, Lbcp);
1297 add(ImethodDataPtr, in_bytes(methodDataOopDesc::data_offset()), ImethodDataPtr);
1298 add(ImethodDataPtr, O0, ImethodDataPtr);
1299 bind(zero_continue);
1300 }
1301
1302 // Test ImethodDataPtr. If it is null, continue at the specified label
1303
1304 void InterpreterMacroAssembler::test_method_data_pointer(Label& zero_continue) {
1305 assert(ProfileInterpreter, "must be profiling interpreter");
1306 br_null_short(ImethodDataPtr, Assembler::pn, zero_continue);
1307 }
1308
1309 void InterpreterMacroAssembler::verify_method_data_pointer() {
1310 assert(ProfileInterpreter, "must be profiling interpreter");
1311 #ifdef ASSERT
1312 Label verify_continue;
1313 test_method_data_pointer(verify_continue);
1314
1315 // If the mdp is valid, it will point to a DataLayout header which is
1316 // consistent with the bcp. The converse is highly probable also.
1317 lduh(ImethodDataPtr, in_bytes(DataLayout::bci_offset()), G3_scratch);
1318 ld_ptr(Lmethod, methodOopDesc::const_offset(), O5);
1319 add(G3_scratch, in_bytes(constMethodOopDesc::codes_offset()), G3_scratch);
1320 add(G3_scratch, O5, G3_scratch);
1321 cmp(Lbcp, G3_scratch);
1322 brx(Assembler::equal, false, Assembler::pt, verify_continue);
1323
1324 Register temp_reg = O5;
1325 delayed()->mov(ImethodDataPtr, temp_reg);
1326 // %%% should use call_VM_leaf here?
1327 //call_VM_leaf(noreg, ..., Lmethod, Lbcp, ImethodDataPtr);
1328 save_frame_and_mov(sizeof(jdouble) / wordSize, Lmethod, O0, Lbcp, O1);
1329 Address d_save(FP, -sizeof(jdouble) + STACK_BIAS);
1330 stf(FloatRegisterImpl::D, Ftos_d, d_save);
1331 mov(temp_reg->after_save(), O2);
1332 save_thread(L7_thread_cache);
1333 call(CAST_FROM_FN_PTR(address, InterpreterRuntime::verify_mdp), relocInfo::none);
1334 delayed()->nop();
1335 restore_thread(L7_thread_cache);
1336 ldf(FloatRegisterImpl::D, d_save, Ftos_d);
1337 restore();
1338 bind(verify_continue);
1339 #endif // ASSERT
1340 }
1341
1342 void InterpreterMacroAssembler::test_invocation_counter_for_mdp(Register invocation_count,
1343 Register Rtmp,
1344 Label &profile_continue) {
1345 assert(ProfileInterpreter, "must be profiling interpreter");
1346 // Control will flow to "profile_continue" if the counter is less than the
1347 // limit or if we call profile_method()
1348
1349 Label done;
1350
1351 // if no method data exists, and the counter is high enough, make one
1352 br_notnull_short(ImethodDataPtr, Assembler::pn, done);
1353
1354 // Test to see if we should create a method data oop
1355 AddressLiteral profile_limit((address) &InvocationCounter::InterpreterProfileLimit);
1356 sethi(profile_limit, Rtmp);
1357 ld(Rtmp, profile_limit.low10(), Rtmp);
1358 cmp_and_br_short(invocation_count, Rtmp, Assembler::lessUnsigned, Assembler::pn, profile_continue);
1359
1360 // Build it now.
1361 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::profile_method));
1362 set_method_data_pointer_for_bcp();
1363 ba_short(profile_continue);
1364 bind(done);
1365 }
1366
1367 // Store a value at some constant offset from the method data pointer.
1368
1369 void InterpreterMacroAssembler::set_mdp_data_at(int constant, Register value) {
1370 assert(ProfileInterpreter, "must be profiling interpreter");
1371 st_ptr(value, ImethodDataPtr, constant);
1372 }
1373
1374 void InterpreterMacroAssembler::increment_mdp_data_at(Address counter,
1375 Register bumped_count,
1376 bool decrement) {
1377 assert(ProfileInterpreter, "must be profiling interpreter");
1378
1379 // Load the counter.
1380 ld_ptr(counter, bumped_count);
1381
1382 if (decrement) {
1383 // Decrement the register. Set condition codes.
1384 subcc(bumped_count, DataLayout::counter_increment, bumped_count);
1385
1386 // If the decrement causes the counter to overflow, stay negative
1387 Label L;
1388 brx(Assembler::negative, true, Assembler::pn, L);
1389
1390 // Store the decremented counter, if it is still negative.
1391 delayed()->st_ptr(bumped_count, counter);
1392 bind(L);
1393 } else {
1394 // Increment the register. Set carry flag.
1395 addcc(bumped_count, DataLayout::counter_increment, bumped_count);
1396
1397 // If the increment causes the counter to overflow, pull back by 1.
1398 assert(DataLayout::counter_increment == 1, "subc works");
1399 subc(bumped_count, G0, bumped_count);
1400
1401 // Store the incremented counter.
1402 st_ptr(bumped_count, counter);
1403 }
1404 }
1405
1406 // Increment the value at some constant offset from the method data pointer.
1407
1408 void InterpreterMacroAssembler::increment_mdp_data_at(int constant,
1409 Register bumped_count,
1410 bool decrement) {
1411 // Locate the counter at a fixed offset from the mdp:
1412 Address counter(ImethodDataPtr, constant);
1413 increment_mdp_data_at(counter, bumped_count, decrement);
1414 }
1415
1416 // Increment the value at some non-fixed (reg + constant) offset from
1417 // the method data pointer.
1418
1419 void InterpreterMacroAssembler::increment_mdp_data_at(Register reg,
1420 int constant,
1421 Register bumped_count,
1422 Register scratch2,
1423 bool decrement) {
1424 // Add the constant to reg to get the offset.
1425 add(ImethodDataPtr, reg, scratch2);
1426 Address counter(scratch2, constant);
1427 increment_mdp_data_at(counter, bumped_count, decrement);
1428 }
1429
1430 // Set a flag value at the current method data pointer position.
1431 // Updates a single byte of the header, to avoid races with other header bits.
1432
1433 void InterpreterMacroAssembler::set_mdp_flag_at(int flag_constant,
1434 Register scratch) {
1435 assert(ProfileInterpreter, "must be profiling interpreter");
1436 // Load the data header
1437 ldub(ImethodDataPtr, in_bytes(DataLayout::flags_offset()), scratch);
1438
1439 // Set the flag
1440 or3(scratch, flag_constant, scratch);
1441
1442 // Store the modified header.
1443 stb(scratch, ImethodDataPtr, in_bytes(DataLayout::flags_offset()));
1444 }
1445
1446 // Test the location at some offset from the method data pointer.
1447 // If it is not equal to value, branch to the not_equal_continue Label.
1448 // Set condition codes to match the nullness of the loaded value.
1449
1450 void InterpreterMacroAssembler::test_mdp_data_at(int offset,
1451 Register value,
1452 Label& not_equal_continue,
1453 Register scratch) {
1454 assert(ProfileInterpreter, "must be profiling interpreter");
1455 ld_ptr(ImethodDataPtr, offset, scratch);
1456 cmp(value, scratch);
1457 brx(Assembler::notEqual, false, Assembler::pn, not_equal_continue);
1458 delayed()->tst(scratch);
1459 }
1460
1461 // Update the method data pointer by the displacement located at some fixed
1462 // offset from the method data pointer.
1463
1464 void InterpreterMacroAssembler::update_mdp_by_offset(int offset_of_disp,
1465 Register scratch) {
1466 assert(ProfileInterpreter, "must be profiling interpreter");
1467 ld_ptr(ImethodDataPtr, offset_of_disp, scratch);
1468 add(ImethodDataPtr, scratch, ImethodDataPtr);
1469 }
1470
1471 // Update the method data pointer by the displacement located at the
1472 // offset (reg + offset_of_disp).
1473
1474 void InterpreterMacroAssembler::update_mdp_by_offset(Register reg,
1475 int offset_of_disp,
1476 Register scratch) {
1477 assert(ProfileInterpreter, "must be profiling interpreter");
1478 add(reg, offset_of_disp, scratch);
1479 ld_ptr(ImethodDataPtr, scratch, scratch);
1480 add(ImethodDataPtr, scratch, ImethodDataPtr);
1481 }
1482
1483 // Update the method data pointer by a simple constant displacement.
1484
1485 void InterpreterMacroAssembler::update_mdp_by_constant(int constant) {
1486 assert(ProfileInterpreter, "must be profiling interpreter");
1487 add(ImethodDataPtr, constant, ImethodDataPtr);
1488 }
1489
1490 // Update the method data pointer for a _ret bytecode whose target
1491 // was not among our cached targets.
1492
1493 void InterpreterMacroAssembler::update_mdp_for_ret(TosState state,
1494 Register return_bci) {
1495 assert(ProfileInterpreter, "must be profiling interpreter");
1496 push(state);
1497 st_ptr(return_bci, l_tmp); // protect return_bci, in case it is volatile
1498 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::update_mdp_for_ret), return_bci);
1499 ld_ptr(l_tmp, return_bci);
1500 pop(state);
1501 }
1502
1503 // Count a taken branch in the bytecodes.
1504
1505 void InterpreterMacroAssembler::profile_taken_branch(Register scratch, Register bumped_count) {
1506 if (ProfileInterpreter) {
1507 Label profile_continue;
1508
1509 // If no method data exists, go to profile_continue.
1510 test_method_data_pointer(profile_continue);
1511
1512 // We are taking a branch. Increment the taken count.
1513 increment_mdp_data_at(in_bytes(JumpData::taken_offset()), bumped_count);
1514
1515 // The method data pointer needs to be updated to reflect the new target.
1516 update_mdp_by_offset(in_bytes(JumpData::displacement_offset()), scratch);
1517 bind (profile_continue);
1518 }
1519 }
1520
1521
1522 // Count a not-taken branch in the bytecodes.
1523
1524 void InterpreterMacroAssembler::profile_not_taken_branch(Register scratch) {
1525 if (ProfileInterpreter) {
1526 Label profile_continue;
1527
1528 // If no method data exists, go to profile_continue.
1529 test_method_data_pointer(profile_continue);
1530
1531 // We are taking a branch. Increment the not taken count.
1532 increment_mdp_data_at(in_bytes(BranchData::not_taken_offset()), scratch);
1533
1534 // The method data pointer needs to be updated to correspond to the
1535 // next bytecode.
1536 update_mdp_by_constant(in_bytes(BranchData::branch_data_size()));
1537 bind (profile_continue);
1538 }
1539 }
1540
1541
1542 // Count a non-virtual call in the bytecodes.
1543
1544 void InterpreterMacroAssembler::profile_call(Register scratch) {
1545 if (ProfileInterpreter) {
1546 Label profile_continue;
1547
1548 // If no method data exists, go to profile_continue.
1549 test_method_data_pointer(profile_continue);
1550
1551 // We are making a call. Increment the count.
1552 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1553
1554 // The method data pointer needs to be updated to reflect the new target.
1555 update_mdp_by_constant(in_bytes(CounterData::counter_data_size()));
1556 bind (profile_continue);
1557 }
1558 }
1559
1560
1561 // Count a final call in the bytecodes.
1562
1563 void InterpreterMacroAssembler::profile_final_call(Register scratch) {
1564 if (ProfileInterpreter) {
1565 Label profile_continue;
1566
1567 // If no method data exists, go to profile_continue.
1568 test_method_data_pointer(profile_continue);
1569
1570 // We are making a call. Increment the count.
1571 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1572
1573 // The method data pointer needs to be updated to reflect the new target.
1574 update_mdp_by_constant(in_bytes(VirtualCallData::virtual_call_data_size()));
1575 bind (profile_continue);
1576 }
1577 }
1578
1579
1580 // Count a virtual call in the bytecodes.
1581
1582 void InterpreterMacroAssembler::profile_virtual_call(Register receiver,
1583 Register scratch,
1584 bool receiver_can_be_null) {
1585 if (ProfileInterpreter) {
1586 Label profile_continue;
1587
1588 // If no method data exists, go to profile_continue.
1589 test_method_data_pointer(profile_continue);
1590
1591
1592 Label skip_receiver_profile;
1593 if (receiver_can_be_null) {
1594 Label not_null;
1595 br_notnull_short(receiver, Assembler::pt, not_null);
1596 // We are making a call. Increment the count for null receiver.
1597 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1598 ba_short(skip_receiver_profile);
1599 bind(not_null);
1600 }
1601
1602 // Record the receiver type.
1603 record_klass_in_profile(receiver, scratch, true);
1604 bind(skip_receiver_profile);
1605
1606 // The method data pointer needs to be updated to reflect the new target.
1607 update_mdp_by_constant(in_bytes(VirtualCallData::virtual_call_data_size()));
1608 bind (profile_continue);
1609 }
1610 }
1611
1612 void InterpreterMacroAssembler::record_klass_in_profile_helper(
1613 Register receiver, Register scratch,
1614 int start_row, Label& done, bool is_virtual_call) {
1615 if (TypeProfileWidth == 0) {
1616 if (is_virtual_call) {
1617 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1618 }
1619 return;
1620 }
1621
1622 int last_row = VirtualCallData::row_limit() - 1;
1623 assert(start_row <= last_row, "must be work left to do");
1624 // Test this row for both the receiver and for null.
1625 // Take any of three different outcomes:
1626 // 1. found receiver => increment count and goto done
1627 // 2. found null => keep looking for case 1, maybe allocate this cell
1628 // 3. found something else => keep looking for cases 1 and 2
1629 // Case 3 is handled by a recursive call.
1630 for (int row = start_row; row <= last_row; row++) {
1631 Label next_test;
1632 bool test_for_null_also = (row == start_row);
1633
1634 // See if the receiver is receiver[n].
1635 int recvr_offset = in_bytes(VirtualCallData::receiver_offset(row));
1636 test_mdp_data_at(recvr_offset, receiver, next_test, scratch);
1637 // delayed()->tst(scratch);
1638
1639 // The receiver is receiver[n]. Increment count[n].
1640 int count_offset = in_bytes(VirtualCallData::receiver_count_offset(row));
1641 increment_mdp_data_at(count_offset, scratch);
1642 ba_short(done);
1643 bind(next_test);
1644
1645 if (test_for_null_also) {
1646 Label found_null;
1647 // Failed the equality check on receiver[n]... Test for null.
1648 if (start_row == last_row) {
1649 // The only thing left to do is handle the null case.
1650 if (is_virtual_call) {
1651 brx(Assembler::zero, false, Assembler::pn, found_null);
1652 delayed()->nop();
1653 // Receiver did not match any saved receiver and there is no empty row for it.
1654 // Increment total counter to indicate polymorphic case.
1655 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1656 ba_short(done);
1657 bind(found_null);
1658 } else {
1659 brx(Assembler::notZero, false, Assembler::pt, done);
1660 delayed()->nop();
1661 }
1662 break;
1663 }
1664 // Since null is rare, make it be the branch-taken case.
1665 brx(Assembler::zero, false, Assembler::pn, found_null);
1666 delayed()->nop();
1667
1668 // Put all the "Case 3" tests here.
1669 record_klass_in_profile_helper(receiver, scratch, start_row + 1, done, is_virtual_call);
1670
1671 // Found a null. Keep searching for a matching receiver,
1672 // but remember that this is an empty (unused) slot.
1673 bind(found_null);
1674 }
1675 }
1676
1677 // In the fall-through case, we found no matching receiver, but we
1678 // observed the receiver[start_row] is NULL.
1679
1680 // Fill in the receiver field and increment the count.
1681 int recvr_offset = in_bytes(VirtualCallData::receiver_offset(start_row));
1682 set_mdp_data_at(recvr_offset, receiver);
1683 int count_offset = in_bytes(VirtualCallData::receiver_count_offset(start_row));
1684 mov(DataLayout::counter_increment, scratch);
1685 set_mdp_data_at(count_offset, scratch);
1686 if (start_row > 0) {
1687 ba_short(done);
1688 }
1689 }
1690
1691 void InterpreterMacroAssembler::record_klass_in_profile(Register receiver,
1692 Register scratch, bool is_virtual_call) {
1693 assert(ProfileInterpreter, "must be profiling");
1694 Label done;
1695
1696 record_klass_in_profile_helper(receiver, scratch, 0, done, is_virtual_call);
1697
1698 bind (done);
1699 }
1700
1701
1702 // Count a ret in the bytecodes.
1703
1704 void InterpreterMacroAssembler::profile_ret(TosState state,
1705 Register return_bci,
1706 Register scratch) {
1707 if (ProfileInterpreter) {
1708 Label profile_continue;
1709 uint row;
1710
1711 // If no method data exists, go to profile_continue.
1712 test_method_data_pointer(profile_continue);
1713
1714 // Update the total ret count.
1715 increment_mdp_data_at(in_bytes(CounterData::count_offset()), scratch);
1716
1717 for (row = 0; row < RetData::row_limit(); row++) {
1718 Label next_test;
1719
1720 // See if return_bci is equal to bci[n]:
1721 test_mdp_data_at(in_bytes(RetData::bci_offset(row)),
1722 return_bci, next_test, scratch);
1723
1724 // return_bci is equal to bci[n]. Increment the count.
1725 increment_mdp_data_at(in_bytes(RetData::bci_count_offset(row)), scratch);
1726
1727 // The method data pointer needs to be updated to reflect the new target.
1728 update_mdp_by_offset(in_bytes(RetData::bci_displacement_offset(row)), scratch);
1729 ba_short(profile_continue);
1730 bind(next_test);
1731 }
1732
1733 update_mdp_for_ret(state, return_bci);
1734
1735 bind (profile_continue);
1736 }
1737 }
1738
1739 // Profile an unexpected null in the bytecodes.
1740 void InterpreterMacroAssembler::profile_null_seen(Register scratch) {
1741 if (ProfileInterpreter) {
1742 Label profile_continue;
1743
1744 // If no method data exists, go to profile_continue.
1745 test_method_data_pointer(profile_continue);
1746
1747 set_mdp_flag_at(BitData::null_seen_byte_constant(), scratch);
1748
1749 // The method data pointer needs to be updated.
1750 int mdp_delta = in_bytes(BitData::bit_data_size());
1751 if (TypeProfileCasts) {
1752 mdp_delta = in_bytes(VirtualCallData::virtual_call_data_size());
1753 }
1754 update_mdp_by_constant(mdp_delta);
1755
1756 bind (profile_continue);
1757 }
1758 }
1759
1760 void InterpreterMacroAssembler::profile_typecheck(Register klass,
1761 Register scratch) {
1762 if (ProfileInterpreter) {
1763 Label profile_continue;
1764
1765 // If no method data exists, go to profile_continue.
1766 test_method_data_pointer(profile_continue);
1767
1768 int mdp_delta = in_bytes(BitData::bit_data_size());
1769 if (TypeProfileCasts) {
1770 mdp_delta = in_bytes(VirtualCallData::virtual_call_data_size());
1771
1772 // Record the object type.
1773 record_klass_in_profile(klass, scratch, false);
1774 }
1775
1776 // The method data pointer needs to be updated.
1777 update_mdp_by_constant(mdp_delta);
1778
1779 bind (profile_continue);
1780 }
1781 }
1782
1783 void InterpreterMacroAssembler::profile_typecheck_failed(Register scratch) {
1784 if (ProfileInterpreter && TypeProfileCasts) {
1785 Label profile_continue;
1786
1787 // If no method data exists, go to profile_continue.
1788 test_method_data_pointer(profile_continue);
1789
1790 int count_offset = in_bytes(CounterData::count_offset());
1791 // Back up the address, since we have already bumped the mdp.
1792 count_offset -= in_bytes(VirtualCallData::virtual_call_data_size());
1793
1794 // *Decrement* the counter. We expect to see zero or small negatives.
1795 increment_mdp_data_at(count_offset, scratch, true);
1796
1797 bind (profile_continue);
1798 }
1799 }
1800
1801 // Count the default case of a switch construct.
1802
1803 void InterpreterMacroAssembler::profile_switch_default(Register scratch) {
1804 if (ProfileInterpreter) {
1805 Label profile_continue;
1806
1807 // If no method data exists, go to profile_continue.
1808 test_method_data_pointer(profile_continue);
1809
1810 // Update the default case count
1811 increment_mdp_data_at(in_bytes(MultiBranchData::default_count_offset()),
1812 scratch);
1813
1814 // The method data pointer needs to be updated.
1815 update_mdp_by_offset(
1816 in_bytes(MultiBranchData::default_displacement_offset()),
1817 scratch);
1818
1819 bind (profile_continue);
1820 }
1821 }
1822
1823 // Count the index'th case of a switch construct.
1824
1825 void InterpreterMacroAssembler::profile_switch_case(Register index,
1826 Register scratch,
1827 Register scratch2,
1828 Register scratch3) {
1829 if (ProfileInterpreter) {
1830 Label profile_continue;
1831
1832 // If no method data exists, go to profile_continue.
1833 test_method_data_pointer(profile_continue);
1834
1835 // Build the base (index * per_case_size_in_bytes()) + case_array_offset_in_bytes()
1836 set(in_bytes(MultiBranchData::per_case_size()), scratch);
1837 smul(index, scratch, scratch);
1838 add(scratch, in_bytes(MultiBranchData::case_array_offset()), scratch);
1839
1840 // Update the case count
1841 increment_mdp_data_at(scratch,
1842 in_bytes(MultiBranchData::relative_count_offset()),
1843 scratch2,
1844 scratch3);
1845
1846 // The method data pointer needs to be updated.
1847 update_mdp_by_offset(scratch,
1848 in_bytes(MultiBranchData::relative_displacement_offset()),
1849 scratch2);
1850
1851 bind (profile_continue);
1852 }
1853 }
1854
1855 // add a InterpMonitorElem to stack (see frame_sparc.hpp)
1856
1857 void InterpreterMacroAssembler::add_monitor_to_stack( bool stack_is_empty,
1858 Register Rtemp,
1859 Register Rtemp2 ) {
1860
1861 Register Rlimit = Lmonitors;
1862 const jint delta = frame::interpreter_frame_monitor_size() * wordSize;
1863 assert( (delta & LongAlignmentMask) == 0,
1864 "sizeof BasicObjectLock must be even number of doublewords");
1865
1866 sub( SP, delta, SP);
1867 sub( Lesp, delta, Lesp);
1868 sub( Lmonitors, delta, Lmonitors);
1869
1870 if (!stack_is_empty) {
1871
1872 // must copy stack contents down
1873
1874 Label start_copying, next;
1875
1876 // untested("monitor stack expansion");
1877 compute_stack_base(Rtemp);
1878 ba(start_copying);
1879 delayed()->cmp(Rtemp, Rlimit); // done? duplicated below
1880
1881 // note: must copy from low memory upwards
1882 // On entry to loop,
1883 // Rtemp points to new base of stack, Lesp points to new end of stack (1 past TOS)
1884 // Loop mutates Rtemp
1885
1886 bind( next);
1887
1888 st_ptr(Rtemp2, Rtemp, 0);
1889 inc(Rtemp, wordSize);
1890 cmp(Rtemp, Rlimit); // are we done? (duplicated above)
1891
1892 bind( start_copying );
1893
1894 brx( notEqual, true, pn, next );
1895 delayed()->ld_ptr( Rtemp, delta, Rtemp2 );
1896
1897 // done copying stack
1898 }
1899 }
1900
1901 // Locals
1902 void InterpreterMacroAssembler::access_local_ptr( Register index, Register dst ) {
1903 assert_not_delayed();
1904 sll(index, Interpreter::logStackElementSize, index);
1905 sub(Llocals, index, index);
1906 ld_ptr(index, 0, dst);
1907 // Note: index must hold the effective address--the iinc template uses it
1908 }
1909
1910 // Just like access_local_ptr but the tag is a returnAddress
1911 void InterpreterMacroAssembler::access_local_returnAddress(Register index,
1912 Register dst ) {
1913 assert_not_delayed();
1914 sll(index, Interpreter::logStackElementSize, index);
1915 sub(Llocals, index, index);
1916 ld_ptr(index, 0, dst);
1917 }
1918
1919 void InterpreterMacroAssembler::access_local_int( Register index, Register dst ) {
1920 assert_not_delayed();
1921 sll(index, Interpreter::logStackElementSize, index);
1922 sub(Llocals, index, index);
1923 ld(index, 0, dst);
1924 // Note: index must hold the effective address--the iinc template uses it
1925 }
1926
1927
1928 void InterpreterMacroAssembler::access_local_long( Register index, Register dst ) {
1929 assert_not_delayed();
1930 sll(index, Interpreter::logStackElementSize, index);
1931 sub(Llocals, index, index);
1932 // First half stored at index n+1 (which grows down from Llocals[n])
1933 load_unaligned_long(index, Interpreter::local_offset_in_bytes(1), dst);
1934 }
1935
1936
1937 void InterpreterMacroAssembler::access_local_float( Register index, FloatRegister dst ) {
1938 assert_not_delayed();
1939 sll(index, Interpreter::logStackElementSize, index);
1940 sub(Llocals, index, index);
1941 ldf(FloatRegisterImpl::S, index, 0, dst);
1942 }
1943
1944
1945 void InterpreterMacroAssembler::access_local_double( Register index, FloatRegister dst ) {
1946 assert_not_delayed();
1947 sll(index, Interpreter::logStackElementSize, index);
1948 sub(Llocals, index, index);
1949 load_unaligned_double(index, Interpreter::local_offset_in_bytes(1), dst);
1950 }
1951
1952
1953 #ifdef ASSERT
1954 void InterpreterMacroAssembler::check_for_regarea_stomp(Register Rindex, int offset, Register Rlimit, Register Rscratch, Register Rscratch1) {
1955 Label L;
1956
1957 assert(Rindex != Rscratch, "Registers cannot be same");
1958 assert(Rindex != Rscratch1, "Registers cannot be same");
1959 assert(Rlimit != Rscratch, "Registers cannot be same");
1960 assert(Rlimit != Rscratch1, "Registers cannot be same");
1961 assert(Rscratch1 != Rscratch, "Registers cannot be same");
1962
1963 // untested("reg area corruption");
1964 add(Rindex, offset, Rscratch);
1965 add(Rlimit, 64 + STACK_BIAS, Rscratch1);
1966 cmp_and_brx_short(Rscratch, Rscratch1, Assembler::greaterEqualUnsigned, pn, L);
1967 stop("regsave area is being clobbered");
1968 bind(L);
1969 }
1970 #endif // ASSERT
1971
1972
1973 void InterpreterMacroAssembler::store_local_int( Register index, Register src ) {
1974 assert_not_delayed();
1975 sll(index, Interpreter::logStackElementSize, index);
1976 sub(Llocals, index, index);
1977 debug_only(check_for_regarea_stomp(index, 0, FP, G1_scratch, G4_scratch);)
1978 st(src, index, 0);
1979 }
1980
1981 void InterpreterMacroAssembler::store_local_ptr( Register index, Register src ) {
1982 assert_not_delayed();
1983 sll(index, Interpreter::logStackElementSize, index);
1984 sub(Llocals, index, index);
1985 #ifdef ASSERT
1986 check_for_regarea_stomp(index, 0, FP, G1_scratch, G4_scratch);
1987 #endif
1988 st_ptr(src, index, 0);
1989 }
1990
1991
1992
1993 void InterpreterMacroAssembler::store_local_ptr( int n, Register src ) {
1994 st_ptr(src, Llocals, Interpreter::local_offset_in_bytes(n));
1995 }
1996
1997 void InterpreterMacroAssembler::store_local_long( Register index, Register src ) {
1998 assert_not_delayed();
1999 sll(index, Interpreter::logStackElementSize, index);
2000 sub(Llocals, index, index);
2001 #ifdef ASSERT
2002 check_for_regarea_stomp(index, Interpreter::local_offset_in_bytes(1), FP, G1_scratch, G4_scratch);
2003 #endif
2004 store_unaligned_long(src, index, Interpreter::local_offset_in_bytes(1)); // which is n+1
2005 }
2006
2007
2008 void InterpreterMacroAssembler::store_local_float( Register index, FloatRegister src ) {
2009 assert_not_delayed();
2010 sll(index, Interpreter::logStackElementSize, index);
2011 sub(Llocals, index, index);
2012 #ifdef ASSERT
2013 check_for_regarea_stomp(index, 0, FP, G1_scratch, G4_scratch);
2014 #endif
2015 stf(FloatRegisterImpl::S, src, index, 0);
2016 }
2017
2018
2019 void InterpreterMacroAssembler::store_local_double( Register index, FloatRegister src ) {
2020 assert_not_delayed();
2021 sll(index, Interpreter::logStackElementSize, index);
2022 sub(Llocals, index, index);
2023 #ifdef ASSERT
2024 check_for_regarea_stomp(index, Interpreter::local_offset_in_bytes(1), FP, G1_scratch, G4_scratch);
2025 #endif
2026 store_unaligned_double(src, index, Interpreter::local_offset_in_bytes(1));
2027 }
2028
2029
2030 int InterpreterMacroAssembler::top_most_monitor_byte_offset() {
2031 const jint delta = frame::interpreter_frame_monitor_size() * wordSize;
2032 int rounded_vm_local_words = ::round_to(frame::interpreter_frame_vm_local_words, WordsPerLong);
2033 return ((-rounded_vm_local_words * wordSize) - delta ) + STACK_BIAS;
2034 }
2035
2036
2037 Address InterpreterMacroAssembler::top_most_monitor() {
2038 return Address(FP, top_most_monitor_byte_offset());
2039 }
2040
2041
2042 void InterpreterMacroAssembler::compute_stack_base( Register Rdest ) {
2043 add( Lesp, wordSize, Rdest );
2044 }
2045
2046 #endif /* CC_INTERP */
2047
2048 void InterpreterMacroAssembler::increment_invocation_counter( Register Rtmp, Register Rtmp2 ) {
2049 assert(UseCompiler, "incrementing must be useful");
2050 #ifdef CC_INTERP
2051 Address inv_counter(G5_method, methodOopDesc::invocation_counter_offset() +
2052 InvocationCounter::counter_offset());
2053 Address be_counter (G5_method, methodOopDesc::backedge_counter_offset() +
2054 InvocationCounter::counter_offset());
2055 #else
2056 Address inv_counter(Lmethod, methodOopDesc::invocation_counter_offset() +
2057 InvocationCounter::counter_offset());
2058 Address be_counter (Lmethod, methodOopDesc::backedge_counter_offset() +
2059 InvocationCounter::counter_offset());
2060 #endif /* CC_INTERP */
2061 int delta = InvocationCounter::count_increment;
2062
2063 // Load each counter in a register
2064 ld( inv_counter, Rtmp );
2065 ld( be_counter, Rtmp2 );
2066
2067 assert( is_simm13( delta ), " delta too large.");
2068
2069 // Add the delta to the invocation counter and store the result
2070 add( Rtmp, delta, Rtmp );
2071
2072 // Mask the backedge counter
2073 and3( Rtmp2, InvocationCounter::count_mask_value, Rtmp2 );
2074
2075 // Store value
2076 st( Rtmp, inv_counter);
2077
2078 // Add invocation counter + backedge counter
2079 add( Rtmp, Rtmp2, Rtmp);
2080
2081 // Note that this macro must leave the backedge_count + invocation_count in Rtmp!
2082 }
2083
2084 void InterpreterMacroAssembler::increment_backedge_counter( Register Rtmp, Register Rtmp2 ) {
2085 assert(UseCompiler, "incrementing must be useful");
2086 #ifdef CC_INTERP
2087 Address be_counter (G5_method, methodOopDesc::backedge_counter_offset() +
2088 InvocationCounter::counter_offset());
2089 Address inv_counter(G5_method, methodOopDesc::invocation_counter_offset() +
2090 InvocationCounter::counter_offset());
2091 #else
2092 Address be_counter (Lmethod, methodOopDesc::backedge_counter_offset() +
2093 InvocationCounter::counter_offset());
2094 Address inv_counter(Lmethod, methodOopDesc::invocation_counter_offset() +
2095 InvocationCounter::counter_offset());
2096 #endif /* CC_INTERP */
2097 int delta = InvocationCounter::count_increment;
2098 // Load each counter in a register
2099 ld( be_counter, Rtmp );
2100 ld( inv_counter, Rtmp2 );
2101
2102 // Add the delta to the backedge counter
2103 add( Rtmp, delta, Rtmp );
2104
2105 // Mask the invocation counter, add to backedge counter
2106 and3( Rtmp2, InvocationCounter::count_mask_value, Rtmp2 );
2107
2108 // and store the result to memory
2109 st( Rtmp, be_counter );
2110
2111 // Add backedge + invocation counter
2112 add( Rtmp, Rtmp2, Rtmp );
2113
2114 // Note that this macro must leave backedge_count + invocation_count in Rtmp!
2115 }
2116
2117 #ifndef CC_INTERP
2118 void InterpreterMacroAssembler::test_backedge_count_for_osr( Register backedge_count,
2119 Register branch_bcp,
2120 Register Rtmp ) {
2121 Label did_not_overflow;
2122 Label overflow_with_error;
2123 assert_different_registers(backedge_count, Rtmp, branch_bcp);
2124 assert(UseOnStackReplacement,"Must UseOnStackReplacement to test_backedge_count_for_osr");
2125
2126 AddressLiteral limit(&InvocationCounter::InterpreterBackwardBranchLimit);
2127 load_contents(limit, Rtmp);
2128 cmp_and_br_short(backedge_count, Rtmp, Assembler::lessUnsigned, Assembler::pt, did_not_overflow);
2129
2130 // When ProfileInterpreter is on, the backedge_count comes from the
2131 // methodDataOop, which value does not get reset on the call to
2132 // frequency_counter_overflow(). To avoid excessive calls to the overflow
2133 // routine while the method is being compiled, add a second test to make sure
2134 // the overflow function is called only once every overflow_frequency.
2135 if (ProfileInterpreter) {
2136 const int overflow_frequency = 1024;
2137 andcc(backedge_count, overflow_frequency-1, Rtmp);
2138 brx(Assembler::notZero, false, Assembler::pt, did_not_overflow);
2139 delayed()->nop();
2140 }
2141
2142 // overflow in loop, pass branch bytecode
2143 set(6,Rtmp);
2144 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::frequency_counter_overflow), branch_bcp, Rtmp);
2145
2146 // Was an OSR adapter generated?
2147 // O0 = osr nmethod
2148 br_null_short(O0, Assembler::pn, overflow_with_error);
2149
2150 // Has the nmethod been invalidated already?
2151 ld(O0, nmethod::entry_bci_offset(), O2);
2152 cmp_and_br_short(O2, InvalidOSREntryBci, Assembler::equal, Assembler::pn, overflow_with_error);
2153
2154 // migrate the interpreter frame off of the stack
2155
2156 mov(G2_thread, L7);
2157 // save nmethod
2158 mov(O0, L6);
2159 set_last_Java_frame(SP, noreg);
2160 call_VM_leaf(noreg, CAST_FROM_FN_PTR(address, SharedRuntime::OSR_migration_begin), L7);
2161 reset_last_Java_frame();
2162 mov(L7, G2_thread);
2163
2164 // move OSR nmethod to I1
2165 mov(L6, I1);
2166
2167 // OSR buffer to I0
2168 mov(O0, I0);
2169
2170 // remove the interpreter frame
2171 restore(I5_savedSP, 0, SP);
2172
2173 // Jump to the osr code.
2174 ld_ptr(O1, nmethod::osr_entry_point_offset(), O2);
2175 jmp(O2, G0);
2176 delayed()->nop();
2177
2178 bind(overflow_with_error);
2179
2180 bind(did_not_overflow);
2181 }
2182
2183
2184
2185 void InterpreterMacroAssembler::interp_verify_oop(Register reg, TosState state, const char * file, int line) {
2186 if (state == atos) { MacroAssembler::_verify_oop(reg, "broken oop ", file, line); }
2187 }
2188
2189
2190 // local helper function for the verify_oop_or_return_address macro
2191 static bool verify_return_address(methodOopDesc* m, int bci) {
2192 #ifndef PRODUCT
2193 address pc = (address)(m->constMethod())
2194 + in_bytes(constMethodOopDesc::codes_offset()) + bci;
2195 // assume it is a valid return address if it is inside m and is preceded by a jsr
2196 if (!m->contains(pc)) return false;
2197 address jsr_pc;
2198 jsr_pc = pc - Bytecodes::length_for(Bytecodes::_jsr);
2199 if (*jsr_pc == Bytecodes::_jsr && jsr_pc >= m->code_base()) return true;
2200 jsr_pc = pc - Bytecodes::length_for(Bytecodes::_jsr_w);
2201 if (*jsr_pc == Bytecodes::_jsr_w && jsr_pc >= m->code_base()) return true;
2202 #endif // PRODUCT
2203 return false;
2204 }
2205
2206
2207 void InterpreterMacroAssembler::verify_oop_or_return_address(Register reg, Register Rtmp) {
2208 if (!VerifyOops) return;
2209 // the VM documentation for the astore[_wide] bytecode allows
2210 // the TOS to be not only an oop but also a return address
2211 Label test;
2212 Label skip;
2213 // See if it is an address (in the current method):
2214
2215 mov(reg, Rtmp);
2216 const int log2_bytecode_size_limit = 16;
2217 srl(Rtmp, log2_bytecode_size_limit, Rtmp);
2218 br_notnull_short( Rtmp, pt, test );
2219
2220 // %%% should use call_VM_leaf here?
2221 save_frame_and_mov(0, Lmethod, O0, reg, O1);
2222 save_thread(L7_thread_cache);
2223 call(CAST_FROM_FN_PTR(address,verify_return_address), relocInfo::none);
2224 delayed()->nop();
2225 restore_thread(L7_thread_cache);
2226 br_notnull( O0, false, pt, skip );
2227 delayed()->restore();
2228
2229 // Perform a more elaborate out-of-line call
2230 // Not an address; verify it:
2231 bind(test);
2232 verify_oop(reg);
2233 bind(skip);
2234 }
2235
2236
2237 void InterpreterMacroAssembler::verify_FPU(int stack_depth, TosState state) {
2238 if (state == ftos || state == dtos) MacroAssembler::verify_FPU(stack_depth);
2239 }
2240 #endif /* CC_INTERP */
2241
2242 // Inline assembly for:
2243 //
2244 // if (thread is in interp_only_mode) {
2245 // InterpreterRuntime::post_method_entry();
2246 // }
2247 // if (DTraceMethodProbes) {
2248 // SharedRuntime::dtrace_method_entry(method, receiver);
2249 // }
2250 // if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
2251 // SharedRuntime::rc_trace_method_entry(method, receiver);
2252 // }
2253
2254 void InterpreterMacroAssembler::notify_method_entry() {
2255
2256 // C++ interpreter only uses this for native methods.
2257
2258 // Whenever JVMTI puts a thread in interp_only_mode, method
2259 // entry/exit events are sent for that thread to track stack
2260 // depth. If it is possible to enter interp_only_mode we add
2261 // the code to check if the event should be sent.
2262 if (JvmtiExport::can_post_interpreter_events()) {
2263 Label L;
2264 Register temp_reg = O5;
2265 const Address interp_only(G2_thread, JavaThread::interp_only_mode_offset());
2266 ld(interp_only, temp_reg);
2267 cmp_and_br_short(temp_reg, 0, equal, pt, L);
2268 call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::post_method_entry));
2269 bind(L);
2270 }
2271
2272 {
2273 Register temp_reg = O5;
2274 SkipIfEqual skip_if(this, temp_reg, &DTraceMethodProbes, zero);
2275 call_VM_leaf(noreg,
2276 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2277 G2_thread, Lmethod);
2278 }
2279
2280 // RedefineClasses() tracing support for obsolete method entry
2281 if (RC_TRACE_IN_RANGE(0x00001000, 0x00002000)) {
2282 call_VM_leaf(noreg,
2283 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
2284 G2_thread, Lmethod);
2285 }
2286 }
2287
2288
2289 // Inline assembly for:
2290 //
2291 // if (thread is in interp_only_mode) {
2292 // // save result
2293 // InterpreterRuntime::post_method_exit();
2294 // // restore result
2295 // }
2296 // if (DTraceMethodProbes) {
2297 // SharedRuntime::dtrace_method_exit(thread, method);
2298 // }
2299 //
2300 // Native methods have their result stored in d_tmp and l_tmp
2301 // Java methods have their result stored in the expression stack
2302
2303 void InterpreterMacroAssembler::notify_method_exit(bool is_native_method,
2304 TosState state,
2305 NotifyMethodExitMode mode) {
2306 // C++ interpreter only uses this for native methods.
2307
2308 // Whenever JVMTI puts a thread in interp_only_mode, method
2309 // entry/exit events are sent for that thread to track stack
2310 // depth. If it is possible to enter interp_only_mode we add
2311 // the code to check if the event should be sent.
2312 if (mode == NotifyJVMTI && JvmtiExport::can_post_interpreter_events()) {
2313 Label L;
2314 Register temp_reg = O5;
2315 const Address interp_only(G2_thread, JavaThread::interp_only_mode_offset());
2316 ld(interp_only, temp_reg);
2317 cmp_and_br_short(temp_reg, 0, equal, pt, L);
2318
2319 // Note: frame::interpreter_frame_result has a dependency on how the
2320 // method result is saved across the call to post_method_exit. For
2321 // native methods it assumes the result registers are saved to
2322 // l_scratch and d_scratch. If this changes then the interpreter_frame_result
2323 // implementation will need to be updated too.
2324
2325 save_return_value(state, is_native_method);
2326 call_VM(noreg,
2327 CAST_FROM_FN_PTR(address, InterpreterRuntime::post_method_exit));
2328 restore_return_value(state, is_native_method);
2329 bind(L);
2330 }
2331
2332 {
2333 Register temp_reg = O5;
2334 // Dtrace notification
2335 SkipIfEqual skip_if(this, temp_reg, &DTraceMethodProbes, zero);
2336 save_return_value(state, is_native_method);
2337 call_VM_leaf(
2338 noreg,
2339 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2340 G2_thread, Lmethod);
2341 restore_return_value(state, is_native_method);
2342 }
2343 }
2344
2345 void InterpreterMacroAssembler::save_return_value(TosState state, bool is_native_call) {
2346 #ifdef CC_INTERP
2347 // result potentially in O0/O1: save it across calls
2348 stf(FloatRegisterImpl::D, F0, STATE(_native_fresult));
2349 #ifdef _LP64
2350 stx(O0, STATE(_native_lresult));
2351 #else
2352 std(O0, STATE(_native_lresult));
2353 #endif
2354 #else // CC_INTERP
2355 if (is_native_call) {
2356 stf(FloatRegisterImpl::D, F0, d_tmp);
2357 #ifdef _LP64
2358 stx(O0, l_tmp);
2359 #else
2360 std(O0, l_tmp);
2361 #endif
2362 } else {
2363 push(state);
2364 }
2365 #endif // CC_INTERP
2366 }
2367
2368 void InterpreterMacroAssembler::restore_return_value( TosState state, bool is_native_call) {
2369 #ifdef CC_INTERP
2370 ldf(FloatRegisterImpl::D, STATE(_native_fresult), F0);
2371 #ifdef _LP64
2372 ldx(STATE(_native_lresult), O0);
2373 #else
2374 ldd(STATE(_native_lresult), O0);
2375 #endif
2376 #else // CC_INTERP
2377 if (is_native_call) {
2378 ldf(FloatRegisterImpl::D, d_tmp, F0);
2379 #ifdef _LP64
2380 ldx(l_tmp, O0);
2381 #else
2382 ldd(l_tmp, O0);
2383 #endif
2384 } else {
2385 pop(state);
2386 }
2387 #endif // CC_INTERP
2388 }
2389
2390 // Jump if ((*counter_addr += increment) & mask) satisfies the condition.
2391 void InterpreterMacroAssembler::increment_mask_and_jump(Address counter_addr,
2392 int increment, int mask,
2393 Register scratch1, Register scratch2,
2394 Condition cond, Label *where) {
2395 ld(counter_addr, scratch1);
2396 add(scratch1, increment, scratch1);
2397 if (is_simm13(mask)) {
2398 andcc(scratch1, mask, G0);
2399 } else {
2400 set(mask, scratch2);
2401 andcc(scratch1, scratch2, G0);
2402 }
2403 br(cond, false, Assembler::pn, *where);
2404 delayed()->st(scratch1, counter_addr);
2405 }