src/cpu/sparc/vm/interpreter_sparc.cpp
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*** old/src/cpu/sparc/vm/interpreter_sparc.cpp	Fri Jul 15 18:49:40 2011
--- new/src/cpu/sparc/vm/interpreter_sparc.cpp	Fri Jul 15 18:49:40 2011

*** 189,214 **** --- 189,211 ---- __ ld_ptr(ldarg.address_in_frame(), ldarg.as_register()); else { // Optimization, see if there are any more args and get out prior to checking // all 16 float registers. My guess is that this is rare. // If is_register is false, then we are done the first six integer args. ! __ tst(G4_scratch); __ brx(Assembler::zero, false, Assembler::pt, done); __ delayed()->nop(); ! __ br_null_short(G4_scratch, Assembler::pt, done); } - __ ba(false, NextArg); __ delayed()->srl( G4_scratch, 2, G4_scratch ); __ bind(LoadFloatArg); __ ldf( FloatRegisterImpl::S, a, ldarg.as_float_register(), 4); - __ ba(false, NextArg); __ delayed()->srl( G4_scratch, 2, G4_scratch ); __ bind(LoadDoubleArg); __ ldf( FloatRegisterImpl::D, a, ldarg.as_double_register() ); - __ ba(false, NextArg); __ delayed()->srl( G4_scratch, 2, G4_scratch ); __ bind(NextArg); }
*** 232,243 **** --- 229,239 ---- // if the compilation did not complete (either went background or bailed out). __ set((int)false, O2); __ call_VM(noreg, CAST_FROM_FN_PTR(address, InterpreterRuntime::frequency_counter_overflow), O2, O2, true); // returns verified_entry_point or NULL // we ignore it in any case ! __ ba(false, Lcontinue); __ delayed()->nop(); ! __ ba_short(Lcontinue); } // End of helpers

src/cpu/sparc/vm/interpreter_sparc.cpp
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