42 _features = determine_features();
43 PrefetchCopyIntervalInBytes = prefetch_copy_interval_in_bytes();
44 PrefetchScanIntervalInBytes = prefetch_scan_interval_in_bytes();
45 PrefetchFieldsAhead = prefetch_fields_ahead();
46
47 // Allocation prefetch settings
48 intx cache_line_size = L1_data_cache_line_size();
49 if( cache_line_size > AllocatePrefetchStepSize )
50 AllocatePrefetchStepSize = cache_line_size;
51 if( FLAG_IS_DEFAULT(AllocatePrefetchLines) )
52 AllocatePrefetchLines = 3; // Optimistic value
53 assert( AllocatePrefetchLines > 0, "invalid value");
54 if( AllocatePrefetchLines < 1 ) // set valid value in product VM
55 AllocatePrefetchLines = 1; // Conservative value
56
57 AllocatePrefetchDistance = allocate_prefetch_distance();
58 AllocatePrefetchStyle = allocate_prefetch_style();
59
60 assert(AllocatePrefetchDistance % AllocatePrefetchStepSize == 0, "invalid value");
61
62 UseSSE = 0; // Only on x86 and x64
63
64 _supports_cx8 = has_v9();
65
66 if (is_niagara()) {
67 // Indirect branch is the same cost as direct
68 if (FLAG_IS_DEFAULT(UseInlineCaches)) {
69 FLAG_SET_DEFAULT(UseInlineCaches, false);
70 }
71 // Align loops on a single instruction boundary.
72 if (FLAG_IS_DEFAULT(OptoLoopAlignment)) {
73 FLAG_SET_DEFAULT(OptoLoopAlignment, 4);
74 }
75 // When using CMS, we cannot use memset() in BOT updates because
76 // the sun4v/CMT version in libc_psr uses BIS which exposes
77 // "phantom zeros" to concurrent readers. See 6948537.
78 if (FLAG_IS_DEFAULT(UseMemSetInBOT) && UseConcMarkSweepGC) {
79 FLAG_SET_DEFAULT(UseMemSetInBOT, false);
80 }
81 #ifdef _LP64
99 // Use BIS instruction for allocation prefetch.
100 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 3);
101 if (FLAG_IS_DEFAULT(AllocatePrefetchDistance)) {
102 // Use smaller prefetch distance on N2 with BIS
103 FLAG_SET_DEFAULT(AllocatePrefetchDistance, 64);
104 }
105 }
106 if (AllocatePrefetchStyle != 3 && FLAG_IS_DEFAULT(AllocatePrefetchDistance)) {
107 // Use different prefetch distance without BIS
108 FLAG_SET_DEFAULT(AllocatePrefetchDistance, 256);
109 }
110 }
111 #endif
112 }
113
114 // Use hardware population count instruction if available.
115 if (has_hardware_popc()) {
116 if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
117 FLAG_SET_DEFAULT(UsePopCountInstruction, true);
118 }
119 }
120
121 #ifdef COMPILER2
122 // Currently not supported anywhere.
123 FLAG_SET_DEFAULT(UseFPUForSpilling, false);
124 #endif
125
126 char buf[512];
127 jio_snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
128 (has_v8() ? ", has_v8" : ""),
129 (has_v9() ? ", has_v9" : ""),
130 (has_hardware_popc() ? ", popc" : ""),
131 (has_vis1() ? ", has_vis1" : ""),
132 (has_vis2() ? ", has_vis2" : ""),
133 (has_vis3() ? ", has_vis3" : ""),
134 (has_blk_init() ? ", has_blk_init" : ""),
135 (is_ultra3() ? ", is_ultra3" : ""),
136 (is_sun4v() ? ", is_sun4v" : ""),
137 (is_niagara() ? ", is_niagara" : ""),
138 (is_niagara_plus() ? ", is_niagara_plus" : ""),
139 (is_sparc64() ? ", is_sparc64" : ""),
140 (!has_hardware_mul32() ? ", no-mul32" : ""),
141 (!has_hardware_div32() ? ", no-div32" : ""),
142 (!has_hardware_fsmuld() ? ", no-fsmuld" : ""));
143
144 // buf is started with ", " or is empty
145 _features_str = strdup(strlen(buf) > 2 ? buf + 2 : buf);
146
147 // UseVIS is set to the smallest of what hardware supports and what
148 // the command line requires. I.e., you cannot set UseVIS to 3 on
149 // older UltraSparc which do not support it.
150 if (UseVIS > 3) UseVIS=3;
151 if (UseVIS < 0) UseVIS=0;
152 if (!has_vis3()) // Drop to 2 if no VIS3 support
153 UseVIS = MIN2((intx)2,UseVIS);
154 if (!has_vis2()) // Drop to 1 if no VIS2 support
155 UseVIS = MIN2((intx)1,UseVIS);
156 if (!has_vis1()) // Drop to 0 if no VIS1 support
157 UseVIS = 0;
158
159 #ifndef PRODUCT
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42 _features = determine_features();
43 PrefetchCopyIntervalInBytes = prefetch_copy_interval_in_bytes();
44 PrefetchScanIntervalInBytes = prefetch_scan_interval_in_bytes();
45 PrefetchFieldsAhead = prefetch_fields_ahead();
46
47 // Allocation prefetch settings
48 intx cache_line_size = L1_data_cache_line_size();
49 if( cache_line_size > AllocatePrefetchStepSize )
50 AllocatePrefetchStepSize = cache_line_size;
51 if( FLAG_IS_DEFAULT(AllocatePrefetchLines) )
52 AllocatePrefetchLines = 3; // Optimistic value
53 assert( AllocatePrefetchLines > 0, "invalid value");
54 if( AllocatePrefetchLines < 1 ) // set valid value in product VM
55 AllocatePrefetchLines = 1; // Conservative value
56
57 AllocatePrefetchDistance = allocate_prefetch_distance();
58 AllocatePrefetchStyle = allocate_prefetch_style();
59
60 assert(AllocatePrefetchDistance % AllocatePrefetchStepSize == 0, "invalid value");
61
62 if (AllocatePrefetchStyle == 3 && !has_blk_init()) {
63 warning("BIS instructions are not available on this CPU");
64 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 1);
65 }
66
67 UseSSE = 0; // Only on x86 and x64
68
69 _supports_cx8 = has_v9();
70
71 if (is_niagara()) {
72 // Indirect branch is the same cost as direct
73 if (FLAG_IS_DEFAULT(UseInlineCaches)) {
74 FLAG_SET_DEFAULT(UseInlineCaches, false);
75 }
76 // Align loops on a single instruction boundary.
77 if (FLAG_IS_DEFAULT(OptoLoopAlignment)) {
78 FLAG_SET_DEFAULT(OptoLoopAlignment, 4);
79 }
80 // When using CMS, we cannot use memset() in BOT updates because
81 // the sun4v/CMT version in libc_psr uses BIS which exposes
82 // "phantom zeros" to concurrent readers. See 6948537.
83 if (FLAG_IS_DEFAULT(UseMemSetInBOT) && UseConcMarkSweepGC) {
84 FLAG_SET_DEFAULT(UseMemSetInBOT, false);
85 }
86 #ifdef _LP64
104 // Use BIS instruction for allocation prefetch.
105 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 3);
106 if (FLAG_IS_DEFAULT(AllocatePrefetchDistance)) {
107 // Use smaller prefetch distance on N2 with BIS
108 FLAG_SET_DEFAULT(AllocatePrefetchDistance, 64);
109 }
110 }
111 if (AllocatePrefetchStyle != 3 && FLAG_IS_DEFAULT(AllocatePrefetchDistance)) {
112 // Use different prefetch distance without BIS
113 FLAG_SET_DEFAULT(AllocatePrefetchDistance, 256);
114 }
115 }
116 #endif
117 }
118
119 // Use hardware population count instruction if available.
120 if (has_hardware_popc()) {
121 if (FLAG_IS_DEFAULT(UsePopCountInstruction)) {
122 FLAG_SET_DEFAULT(UsePopCountInstruction, true);
123 }
124 } else if (UsePopCountInstruction) {
125 warning("POPC instruction is not available on this CPU");
126 FLAG_SET_DEFAULT(UsePopCountInstruction, false);
127 }
128
129 // T4 and newer Sparc cpus have new compare and branch instruction.
130 if (has_cbcond()) {
131 if (FLAG_IS_DEFAULT(UseCBCond)) {
132 FLAG_SET_DEFAULT(UseCBCond, true);
133 }
134 } else if (UseCBCond) {
135 warning("CBCOND instruction is not available on this CPU");
136 FLAG_SET_DEFAULT(UseCBCond, false);
137 }
138
139 #ifdef COMPILER2
140 // T4 and newer Sparc cpus have fast RDPC.
141 if (has_fast_rdpc() && FLAG_IS_DEFAULT(UseRDPCForConstantTableBase)) {
142 FLAG_SET_DEFAULT(UseRDPCForConstantTableBase, true);
143 }
144
145 // Currently not supported anywhere.
146 FLAG_SET_DEFAULT(UseFPUForSpilling, false);
147 #endif
148
149 char buf[512];
150 jio_snprintf(buf, sizeof(buf), "%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
151 (has_v9() ? ", v9" : (has_v8() ? ", v8" : "")),
152 (has_hardware_popc() ? ", popc" : ""),
153 (has_vis1() ? ", vis1" : ""),
154 (has_vis2() ? ", vis2" : ""),
155 (has_vis3() ? ", vis3" : ""),
156 (has_blk_init() ? ", blk_init" : ""),
157 (has_cbcond() ? ", cbcond" : ""),
158 (is_ultra3() ? ", ultra3" : ""),
159 (is_sun4v() ? ", sun4v" : ""),
160 (is_niagara_plus() ? ", niagara_plus" : (is_niagara() ? ", niagara" : "")),
161 (is_sparc64() ? ", sparc64" : ""),
162 (!has_hardware_mul32() ? ", no-mul32" : ""),
163 (!has_hardware_div32() ? ", no-div32" : ""),
164 (!has_hardware_fsmuld() ? ", no-fsmuld" : ""));
165
166 // buf is started with ", " or is empty
167 _features_str = strdup(strlen(buf) > 2 ? buf + 2 : buf);
168
169 // UseVIS is set to the smallest of what hardware supports and what
170 // the command line requires. I.e., you cannot set UseVIS to 3 on
171 // older UltraSparc which do not support it.
172 if (UseVIS > 3) UseVIS=3;
173 if (UseVIS < 0) UseVIS=0;
174 if (!has_vis3()) // Drop to 2 if no VIS3 support
175 UseVIS = MIN2((intx)2,UseVIS);
176 if (!has_vis2()) // Drop to 1 if no VIS2 support
177 UseVIS = MIN2((intx)1,UseVIS);
178 if (!has_vis1()) // Drop to 0 if no VIS1 support
179 UseVIS = 0;
180
181 #ifndef PRODUCT
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