3996 0,
3997 OptoReg::Bad, // Op_RegN
3998 OptoReg::Bad, // Op_RegI
3999 RAX_H_num, // Op_RegP
4000 OptoReg::Bad, // Op_RegF
4001 XMM0_H_num, // Op_RegD
4002 RAX_H_num // Op_RegL
4003 };
4004 assert(ARRAY_SIZE(hi) == _last_machine_leaf - 1, "missing type");
4005 return OptoRegPair(hi[ideal_reg], lo[ideal_reg]);
4006 %}
4007 %}
4008
4009 //----------ATTRIBUTES---------------------------------------------------------
4010 //----------Operand Attributes-------------------------------------------------
4011 op_attrib op_cost(0); // Required cost attribute
4012
4013 //----------Instruction Attributes---------------------------------------------
4014 ins_attrib ins_cost(100); // Required cost attribute
4015 ins_attrib ins_size(8); // Required size attribute (in bits)
4016 ins_attrib ins_pc_relative(0); // Required PC Relative flag
4017 ins_attrib ins_short_branch(0); // Required flag: is this instruction
4018 // a non-matching short branch variant
4019 // of some long branch?
4020 ins_attrib ins_alignment(1); // Required alignment attribute (must
4021 // be a power of 2) specifies the
4022 // alignment that some part of the
4023 // instruction (not necessarily the
4024 // start) requires. If > 1, a
4025 // compute_padding() function must be
4026 // provided for the instruction
4027
4028 //----------OPERANDS-----------------------------------------------------------
4029 // Operand definitions must precede instruction definitions for correct parsing
4030 // in the ADLC because operands constitute user defined types which are used in
4031 // instruction definitions.
4032
4033 //----------Simple Operands----------------------------------------------------
4034 // Immediate Operands
4035 // Integer Immediate
4036 operand immI()
7530 // dummy instruction for generating temp registers
7531 instruct jumpXtnd_offset(rRegL switch_val, immI2 shift, rRegI dest) %{
7532 match(Jump (LShiftL switch_val shift));
7533 ins_cost(350);
7534 predicate(false);
7535 effect(TEMP dest);
7536
7537 format %{ "leaq $dest, [$constantaddress]\n\t"
7538 "jmp [$dest + $switch_val << $shift]\n\t" %}
7539 ins_encode %{
7540 // We could use jump(ArrayAddress) except that the macro assembler needs to use r10
7541 // to do that and the compiler is using that register as one it can allocate.
7542 // So we build it all by hand.
7543 // Address index(noreg, switch_reg, (Address::ScaleFactor)$shift$$constant);
7544 // ArrayAddress dispatch(table, index);
7545 Address dispatch($dest$$Register, $switch_val$$Register, (Address::ScaleFactor) $shift$$constant);
7546 __ lea($dest$$Register, $constantaddress);
7547 __ jmp(dispatch);
7548 %}
7549 ins_pipe(pipe_jmp);
7550 ins_pc_relative(1);
7551 %}
7552
7553 instruct jumpXtnd_addr(rRegL switch_val, immI2 shift, immL32 offset, rRegI dest) %{
7554 match(Jump (AddL (LShiftL switch_val shift) offset));
7555 ins_cost(350);
7556 effect(TEMP dest);
7557
7558 format %{ "leaq $dest, [$constantaddress]\n\t"
7559 "jmp [$dest + $switch_val << $shift + $offset]\n\t" %}
7560 ins_encode %{
7561 // We could use jump(ArrayAddress) except that the macro assembler needs to use r10
7562 // to do that and the compiler is using that register as one it can allocate.
7563 // So we build it all by hand.
7564 // Address index(noreg, switch_reg, (Address::ScaleFactor) $shift$$constant, (int) $offset$$constant);
7565 // ArrayAddress dispatch(table, index);
7566 Address dispatch($dest$$Register, $switch_val$$Register, (Address::ScaleFactor) $shift$$constant, (int) $offset$$constant);
7567 __ lea($dest$$Register, $constantaddress);
7568 __ jmp(dispatch);
7569 %}
7570 ins_pipe(pipe_jmp);
7571 ins_pc_relative(1);
7572 %}
7573
7574 instruct jumpXtnd(rRegL switch_val, rRegI dest) %{
7575 match(Jump switch_val);
7576 ins_cost(350);
7577 effect(TEMP dest);
7578
7579 format %{ "leaq $dest, [$constantaddress]\n\t"
7580 "jmp [$dest + $switch_val]\n\t" %}
7581 ins_encode %{
7582 // We could use jump(ArrayAddress) except that the macro assembler needs to use r10
7583 // to do that and the compiler is using that register as one it can allocate.
7584 // So we build it all by hand.
7585 // Address index(noreg, switch_reg, Address::times_1);
7586 // ArrayAddress dispatch(table, index);
7587 Address dispatch($dest$$Register, $switch_val$$Register, Address::times_1);
7588 __ lea($dest$$Register, $constantaddress);
7589 __ jmp(dispatch);
7590 %}
7591 ins_pipe(pipe_jmp);
7592 ins_pc_relative(1);
7593 %}
7594
7595 // Conditional move
7596 instruct cmovI_reg(rRegI dst, rRegI src, rFlagsReg cr, cmpOp cop)
7597 %{
7598 match(Set dst (CMoveI (Binary cop cr) (Binary dst src)));
7599
7600 ins_cost(200); // XXX
7601 format %{ "cmovl$cop $dst, $src\t# signed, int" %}
7602 opcode(0x0F, 0x40);
7603 ins_encode(REX_reg_reg(dst, src), enc_cmov(cop), reg_reg(dst, src));
7604 ins_pipe(pipe_cmov_reg);
7605 %}
7606
7607 instruct cmovI_regU(cmpOpU cop, rFlagsRegU cr, rRegI dst, rRegI src) %{
7608 match(Set dst (CMoveI (Binary cop cr) (Binary dst src)));
7609
7610 ins_cost(200); // XXX
7611 format %{ "cmovl$cop $dst, $src\t# unsigned, int" %}
7612 opcode(0x0F, 0x40);
12003 compI_rReg(cr, dst, src);
12004 cmovI_reg_l(dst, src, cr);
12005 %}
12006 %}
12007
12008 // ============================================================================
12009 // Branch Instructions
12010
12011 // Jump Direct - Label defines a relative address from JMP+1
12012 instruct jmpDir(label labl)
12013 %{
12014 match(Goto);
12015 effect(USE labl);
12016
12017 ins_cost(300);
12018 format %{ "jmp $labl" %}
12019 size(5);
12020 opcode(0xE9);
12021 ins_encode(OpcP, Lbl(labl));
12022 ins_pipe(pipe_jmp);
12023 ins_pc_relative(1);
12024 %}
12025
12026 // Jump Direct Conditional - Label defines a relative address from Jcc+1
12027 instruct jmpCon(cmpOp cop, rFlagsReg cr, label labl)
12028 %{
12029 match(If cop cr);
12030 effect(USE labl);
12031
12032 ins_cost(300);
12033 format %{ "j$cop $labl" %}
12034 size(6);
12035 opcode(0x0F, 0x80);
12036 ins_encode(Jcc(cop, labl));
12037 ins_pipe(pipe_jcc);
12038 ins_pc_relative(1);
12039 %}
12040
12041 // Jump Direct Conditional - Label defines a relative address from Jcc+1
12042 instruct jmpLoopEnd(cmpOp cop, rFlagsReg cr, label labl)
12043 %{
12044 match(CountedLoopEnd cop cr);
12045 effect(USE labl);
12046
12047 ins_cost(300);
12048 format %{ "j$cop $labl\t# loop end" %}
12049 size(6);
12050 opcode(0x0F, 0x80);
12051 ins_encode(Jcc(cop, labl));
12052 ins_pipe(pipe_jcc);
12053 ins_pc_relative(1);
12054 %}
12055
12056 // Jump Direct Conditional - Label defines a relative address from Jcc+1
12057 instruct jmpLoopEndU(cmpOpU cop, rFlagsRegU cmp, label labl) %{
12058 match(CountedLoopEnd cop cmp);
12059 effect(USE labl);
12060
12061 ins_cost(300);
12062 format %{ "j$cop,u $labl\t# loop end" %}
12063 size(6);
12064 opcode(0x0F, 0x80);
12065 ins_encode(Jcc(cop, labl));
12066 ins_pipe(pipe_jcc);
12067 ins_pc_relative(1);
12068 %}
12069
12070 instruct jmpLoopEndUCF(cmpOpUCF cop, rFlagsRegUCF cmp, label labl) %{
12071 match(CountedLoopEnd cop cmp);
12072 effect(USE labl);
12073
12074 ins_cost(200);
12075 format %{ "j$cop,u $labl\t# loop end" %}
12076 size(6);
12077 opcode(0x0F, 0x80);
12078 ins_encode(Jcc(cop, labl));
12079 ins_pipe(pipe_jcc);
12080 ins_pc_relative(1);
12081 %}
12082
12083 // Jump Direct Conditional - using unsigned comparison
12084 instruct jmpConU(cmpOpU cop, rFlagsRegU cmp, label labl) %{
12085 match(If cop cmp);
12086 effect(USE labl);
12087
12088 ins_cost(300);
12089 format %{ "j$cop,u $labl" %}
12090 size(6);
12091 opcode(0x0F, 0x80);
12092 ins_encode(Jcc(cop, labl));
12093 ins_pipe(pipe_jcc);
12094 ins_pc_relative(1);
12095 %}
12096
12097 instruct jmpConUCF(cmpOpUCF cop, rFlagsRegUCF cmp, label labl) %{
12098 match(If cop cmp);
12099 effect(USE labl);
12100
12101 ins_cost(200);
12102 format %{ "j$cop,u $labl" %}
12103 size(6);
12104 opcode(0x0F, 0x80);
12105 ins_encode(Jcc(cop, labl));
12106 ins_pipe(pipe_jcc);
12107 ins_pc_relative(1);
12108 %}
12109
12110 instruct jmpConUCF2(cmpOpUCF2 cop, rFlagsRegUCF cmp, label labl) %{
12111 match(If cop cmp);
12112 effect(USE labl);
12113
12114 ins_cost(200);
12115 format %{ $$template
12116 if ($cop$$cmpcode == Assembler::notEqual) {
12117 $$emit$$"jp,u $labl\n\t"
12118 $$emit$$"j$cop,u $labl"
12119 } else {
12120 $$emit$$"jp,u done\n\t"
12121 $$emit$$"j$cop,u $labl\n\t"
12122 $$emit$$"done:"
12123 }
12124 %}
12125 size(12);
12126 opcode(0x0F, 0x80);
12127 ins_encode %{
12128 Label* l = $labl$$label;
12129 $$$emit8$primary;
12130 emit_cc(cbuf, $secondary, Assembler::parity);
12131 int parity_disp = -1;
12132 if ($cop$$cmpcode == Assembler::notEqual) {
12133 // the two jumps 6 bytes apart so the jump distances are too
12134 parity_disp = l->loc_pos() - (cbuf.insts_size() + 4);
12135 } else if ($cop$$cmpcode == Assembler::equal) {
12136 parity_disp = 6;
12137 } else {
12138 ShouldNotReachHere();
12139 }
12140 emit_d32(cbuf, parity_disp);
12141 $$$emit8$primary;
12142 emit_cc(cbuf, $secondary, $cop$$cmpcode);
12143 int disp = l->loc_pos() - (cbuf.insts_size() + 4);
12144 emit_d32(cbuf, disp);
12145 %}
12146 ins_pipe(pipe_jcc);
12147 ins_pc_relative(1);
12148 %}
12149
12150 // ============================================================================
12151 // The 2nd slow-half of a subtype check. Scan the subklass's 2ndary
12152 // superklass array for an instance of the superklass. Set a hidden
12153 // internal cache on a hit (cache is checked with exposed code in
12154 // gen_subtype_check()). Return NZ for a miss or zero for a hit. The
12155 // encoding ALSO sets flags.
12156
12157 instruct partialSubtypeCheck(rdi_RegP result,
12158 rsi_RegP sub, rax_RegP super, rcx_RegI rcx,
12159 rFlagsReg cr)
12160 %{
12161 match(Set result (PartialSubtypeCheck sub super));
12162 effect(KILL rcx, KILL cr);
12163
12164 ins_cost(1100); // slightly larger than the next version
12165 format %{ "movq rdi, [$sub + (sizeof(oopDesc) + Klass::secondary_supers_offset_in_bytes())]\n\t"
12166 "movl rcx, [rdi + arrayOopDesc::length_offset_in_bytes()]\t# length to scan\n\t"
12167 "addq rdi, arrayOopDex::base_offset_in_bytes(T_OBJECT)\t# Skip to start of data; set NZ in case count is zero\n\t"
12204 // These instructions are used to replace jumps of a long offset (the default
12205 // match) with jumps of a shorter offset. These instructions are all tagged
12206 // with the ins_short_branch attribute, which causes the ADLC to suppress the
12207 // match rules in general matching. Instead, the ADLC generates a conversion
12208 // method in the MachNode which can be used to do in-place replacement of the
12209 // long variant with the shorter variant. The compiler will determine if a
12210 // branch can be taken by the is_short_branch_offset() predicate in the machine
12211 // specific code section of the file.
12212
12213 // Jump Direct - Label defines a relative address from JMP+1
12214 instruct jmpDir_short(label labl) %{
12215 match(Goto);
12216 effect(USE labl);
12217
12218 ins_cost(300);
12219 format %{ "jmp,s $labl" %}
12220 size(2);
12221 opcode(0xEB);
12222 ins_encode(OpcP, LblShort(labl));
12223 ins_pipe(pipe_jmp);
12224 ins_pc_relative(1);
12225 ins_short_branch(1);
12226 %}
12227
12228 // Jump Direct Conditional - Label defines a relative address from Jcc+1
12229 instruct jmpCon_short(cmpOp cop, rFlagsReg cr, label labl) %{
12230 match(If cop cr);
12231 effect(USE labl);
12232
12233 ins_cost(300);
12234 format %{ "j$cop,s $labl" %}
12235 size(2);
12236 opcode(0x70);
12237 ins_encode(JccShort(cop, labl));
12238 ins_pipe(pipe_jcc);
12239 ins_pc_relative(1);
12240 ins_short_branch(1);
12241 %}
12242
12243 // Jump Direct Conditional - Label defines a relative address from Jcc+1
12244 instruct jmpLoopEnd_short(cmpOp cop, rFlagsReg cr, label labl) %{
12245 match(CountedLoopEnd cop cr);
12246 effect(USE labl);
12247
12248 ins_cost(300);
12249 format %{ "j$cop,s $labl\t# loop end" %}
12250 size(2);
12251 opcode(0x70);
12252 ins_encode(JccShort(cop, labl));
12253 ins_pipe(pipe_jcc);
12254 ins_pc_relative(1);
12255 ins_short_branch(1);
12256 %}
12257
12258 // Jump Direct Conditional - Label defines a relative address from Jcc+1
12259 instruct jmpLoopEndU_short(cmpOpU cop, rFlagsRegU cmp, label labl) %{
12260 match(CountedLoopEnd cop cmp);
12261 effect(USE labl);
12262
12263 ins_cost(300);
12264 format %{ "j$cop,us $labl\t# loop end" %}
12265 size(2);
12266 opcode(0x70);
12267 ins_encode(JccShort(cop, labl));
12268 ins_pipe(pipe_jcc);
12269 ins_pc_relative(1);
12270 ins_short_branch(1);
12271 %}
12272
12273 instruct jmpLoopEndUCF_short(cmpOpUCF cop, rFlagsRegUCF cmp, label labl) %{
12274 match(CountedLoopEnd cop cmp);
12275 effect(USE labl);
12276
12277 ins_cost(300);
12278 format %{ "j$cop,us $labl\t# loop end" %}
12279 size(2);
12280 opcode(0x70);
12281 ins_encode(JccShort(cop, labl));
12282 ins_pipe(pipe_jcc);
12283 ins_pc_relative(1);
12284 ins_short_branch(1);
12285 %}
12286
12287 // Jump Direct Conditional - using unsigned comparison
12288 instruct jmpConU_short(cmpOpU cop, rFlagsRegU cmp, label labl) %{
12289 match(If cop cmp);
12290 effect(USE labl);
12291
12292 ins_cost(300);
12293 format %{ "j$cop,us $labl" %}
12294 size(2);
12295 opcode(0x70);
12296 ins_encode(JccShort(cop, labl));
12297 ins_pipe(pipe_jcc);
12298 ins_pc_relative(1);
12299 ins_short_branch(1);
12300 %}
12301
12302 instruct jmpConUCF_short(cmpOpUCF cop, rFlagsRegUCF cmp, label labl) %{
12303 match(If cop cmp);
12304 effect(USE labl);
12305
12306 ins_cost(300);
12307 format %{ "j$cop,us $labl" %}
12308 size(2);
12309 opcode(0x70);
12310 ins_encode(JccShort(cop, labl));
12311 ins_pipe(pipe_jcc);
12312 ins_pc_relative(1);
12313 ins_short_branch(1);
12314 %}
12315
12316 instruct jmpConUCF2_short(cmpOpUCF2 cop, rFlagsRegUCF cmp, label labl) %{
12317 match(If cop cmp);
12318 effect(USE labl);
12319
12320 ins_cost(300);
12321 format %{ $$template
12322 if ($cop$$cmpcode == Assembler::notEqual) {
12323 $$emit$$"jp,u,s $labl\n\t"
12324 $$emit$$"j$cop,u,s $labl"
12325 } else {
12326 $$emit$$"jp,u,s done\n\t"
12327 $$emit$$"j$cop,u,s $labl\n\t"
12328 $$emit$$"done:"
12329 }
12330 %}
12331 size(4);
12332 opcode(0x70);
12333 ins_encode %{
12334 Label* l = $labl$$label;
12335 emit_cc(cbuf, $primary, Assembler::parity);
12336 int parity_disp = -1;
12337 if ($cop$$cmpcode == Assembler::notEqual) {
12338 parity_disp = l->loc_pos() - (cbuf.insts_size() + 1);
12339 } else if ($cop$$cmpcode == Assembler::equal) {
12340 parity_disp = 2;
12341 } else {
12342 ShouldNotReachHere();
12343 }
12344 emit_d8(cbuf, parity_disp);
12345 emit_cc(cbuf, $primary, $cop$$cmpcode);
12346 int disp = l->loc_pos() - (cbuf.insts_size() + 1);
12347 emit_d8(cbuf, disp);
12348 assert(-128 <= disp && disp <= 127, "Displacement too large for short jmp");
12349 assert(-128 <= parity_disp && parity_disp <= 127, "Displacement too large for short jmp");
12350 %}
12351 ins_pipe(pipe_jcc);
12352 ins_pc_relative(1);
12353 ins_short_branch(1);
12354 %}
12355
12356 // ============================================================================
12357 // inlined locking and unlocking
12358
12359 instruct cmpFastLock(rFlagsReg cr,
12360 rRegP object, rRegP box, rax_RegI tmp, rRegP scr)
12361 %{
12362 match(Set cr (FastLock object box));
12363 effect(TEMP tmp, TEMP scr);
12364
12365 ins_cost(300);
12366 format %{ "fastlock $object,$box,$tmp,$scr" %}
12367 ins_encode(Fast_Lock(object, box, tmp, scr));
12368 ins_pipe(pipe_slow);
12369 ins_pc_relative(1);
12370 %}
12371
12372 instruct cmpFastUnlock(rFlagsReg cr,
12373 rRegP object, rax_RegP box, rRegP tmp)
12374 %{
12375 match(Set cr (FastUnlock object box));
12376 effect(TEMP tmp);
12377
12378 ins_cost(300);
12379 format %{ "fastunlock $object, $box, $tmp" %}
12380 ins_encode(Fast_Unlock(object, box, tmp));
12381 ins_pipe(pipe_slow);
12382 ins_pc_relative(1);
12383 %}
12384
12385
12386 // ============================================================================
12387 // Safepoint Instructions
12388 instruct safePoint_poll(rFlagsReg cr)
12389 %{
12390 predicate(!Assembler::is_polling_page_far());
12391 match(SafePoint);
12392 effect(KILL cr);
12393
12394 format %{ "testl rax, [rip + #offset_to_poll_page]\t"
12395 "# Safepoint: poll for GC" %}
12396 ins_cost(125);
12397 ins_encode %{
12398 AddressLiteral addr(os::get_polling_page(), relocInfo::poll_type);
12399 __ testl(rax, addr);
12400 %}
12401 ins_pipe(ialu_reg_mem);
12402 %}
12415 __ testl(rax, Address($poll$$Register, 0));
12416 %}
12417 ins_pipe(ialu_reg_mem);
12418 %}
12419
12420 // ============================================================================
12421 // Procedure Call/Return Instructions
12422 // Call Java Static Instruction
12423 // Note: If this code changes, the corresponding ret_addr_offset() and
12424 // compute_padding() functions will have to be adjusted.
12425 instruct CallStaticJavaDirect(method meth) %{
12426 match(CallStaticJava);
12427 predicate(!((CallStaticJavaNode*) n)->is_method_handle_invoke());
12428 effect(USE meth);
12429
12430 ins_cost(300);
12431 format %{ "call,static " %}
12432 opcode(0xE8); /* E8 cd */
12433 ins_encode(Java_Static_Call(meth), call_epilog);
12434 ins_pipe(pipe_slow);
12435 ins_pc_relative(1);
12436 ins_alignment(4);
12437 %}
12438
12439 // Call Java Static Instruction (method handle version)
12440 // Note: If this code changes, the corresponding ret_addr_offset() and
12441 // compute_padding() functions will have to be adjusted.
12442 instruct CallStaticJavaHandle(method meth, rbp_RegP rbp_mh_SP_save) %{
12443 match(CallStaticJava);
12444 predicate(((CallStaticJavaNode*) n)->is_method_handle_invoke());
12445 effect(USE meth);
12446 // RBP is saved by all callees (for interpreter stack correction).
12447 // We use it here for a similar purpose, in {preserve,restore}_SP.
12448
12449 ins_cost(300);
12450 format %{ "call,static/MethodHandle " %}
12451 opcode(0xE8); /* E8 cd */
12452 ins_encode(preserve_SP,
12453 Java_Static_Call(meth),
12454 restore_SP,
12455 call_epilog);
12456 ins_pipe(pipe_slow);
12457 ins_pc_relative(1);
12458 ins_alignment(4);
12459 %}
12460
12461 // Call Java Dynamic Instruction
12462 // Note: If this code changes, the corresponding ret_addr_offset() and
12463 // compute_padding() functions will have to be adjusted.
12464 instruct CallDynamicJavaDirect(method meth)
12465 %{
12466 match(CallDynamicJava);
12467 effect(USE meth);
12468
12469 ins_cost(300);
12470 format %{ "movq rax, #Universe::non_oop_word()\n\t"
12471 "call,dynamic " %}
12472 opcode(0xE8); /* E8 cd */
12473 ins_encode(Java_Dynamic_Call(meth), call_epilog);
12474 ins_pipe(pipe_slow);
12475 ins_pc_relative(1);
12476 ins_alignment(4);
12477 %}
12478
12479 // Call Runtime Instruction
12480 instruct CallRuntimeDirect(method meth)
12481 %{
12482 match(CallRuntime);
12483 effect(USE meth);
12484
12485 ins_cost(300);
12486 format %{ "call,runtime " %}
12487 opcode(0xE8); /* E8 cd */
12488 ins_encode(Java_To_Runtime(meth));
12489 ins_pipe(pipe_slow);
12490 ins_pc_relative(1);
12491 %}
12492
12493 // Call runtime without safepoint
12494 instruct CallLeafDirect(method meth)
12495 %{
12496 match(CallLeaf);
12497 effect(USE meth);
12498
12499 ins_cost(300);
12500 format %{ "call_leaf,runtime " %}
12501 opcode(0xE8); /* E8 cd */
12502 ins_encode(Java_To_Runtime(meth));
12503 ins_pipe(pipe_slow);
12504 ins_pc_relative(1);
12505 %}
12506
12507 // Call runtime without safepoint
12508 instruct CallLeafNoFPDirect(method meth)
12509 %{
12510 match(CallLeafNoFP);
12511 effect(USE meth);
12512
12513 ins_cost(300);
12514 format %{ "call_leaf_nofp,runtime " %}
12515 opcode(0xE8); /* E8 cd */
12516 ins_encode(Java_To_Runtime(meth));
12517 ins_pipe(pipe_slow);
12518 ins_pc_relative(1);
12519 %}
12520
12521 // Return Instruction
12522 // Remove the return address & jump to it.
12523 // Notice: We always emit a nop after a ret to make sure there is room
12524 // for safepoint patching
12525 instruct Ret()
12526 %{
12527 match(Return);
12528
12529 format %{ "ret" %}
12530 opcode(0xC3);
12531 ins_encode(OpcP);
12532 ins_pipe(pipe_jmp);
12533 %}
12534
12535 // Tail Call; Jump from runtime stub to Java code.
12536 // Also known as an 'interprocedural jump'.
12537 // Target of jump will eventually return to caller.
12538 // TailJump below removes the return address.
|
3996 0,
3997 OptoReg::Bad, // Op_RegN
3998 OptoReg::Bad, // Op_RegI
3999 RAX_H_num, // Op_RegP
4000 OptoReg::Bad, // Op_RegF
4001 XMM0_H_num, // Op_RegD
4002 RAX_H_num // Op_RegL
4003 };
4004 assert(ARRAY_SIZE(hi) == _last_machine_leaf - 1, "missing type");
4005 return OptoRegPair(hi[ideal_reg], lo[ideal_reg]);
4006 %}
4007 %}
4008
4009 //----------ATTRIBUTES---------------------------------------------------------
4010 //----------Operand Attributes-------------------------------------------------
4011 op_attrib op_cost(0); // Required cost attribute
4012
4013 //----------Instruction Attributes---------------------------------------------
4014 ins_attrib ins_cost(100); // Required cost attribute
4015 ins_attrib ins_size(8); // Required size attribute (in bits)
4016 ins_attrib ins_short_branch(0); // Required flag: is this instruction
4017 // a non-matching short branch variant
4018 // of some long branch?
4019 ins_attrib ins_alignment(1); // Required alignment attribute (must
4020 // be a power of 2) specifies the
4021 // alignment that some part of the
4022 // instruction (not necessarily the
4023 // start) requires. If > 1, a
4024 // compute_padding() function must be
4025 // provided for the instruction
4026
4027 //----------OPERANDS-----------------------------------------------------------
4028 // Operand definitions must precede instruction definitions for correct parsing
4029 // in the ADLC because operands constitute user defined types which are used in
4030 // instruction definitions.
4031
4032 //----------Simple Operands----------------------------------------------------
4033 // Immediate Operands
4034 // Integer Immediate
4035 operand immI()
7529 // dummy instruction for generating temp registers
7530 instruct jumpXtnd_offset(rRegL switch_val, immI2 shift, rRegI dest) %{
7531 match(Jump (LShiftL switch_val shift));
7532 ins_cost(350);
7533 predicate(false);
7534 effect(TEMP dest);
7535
7536 format %{ "leaq $dest, [$constantaddress]\n\t"
7537 "jmp [$dest + $switch_val << $shift]\n\t" %}
7538 ins_encode %{
7539 // We could use jump(ArrayAddress) except that the macro assembler needs to use r10
7540 // to do that and the compiler is using that register as one it can allocate.
7541 // So we build it all by hand.
7542 // Address index(noreg, switch_reg, (Address::ScaleFactor)$shift$$constant);
7543 // ArrayAddress dispatch(table, index);
7544 Address dispatch($dest$$Register, $switch_val$$Register, (Address::ScaleFactor) $shift$$constant);
7545 __ lea($dest$$Register, $constantaddress);
7546 __ jmp(dispatch);
7547 %}
7548 ins_pipe(pipe_jmp);
7549 %}
7550
7551 instruct jumpXtnd_addr(rRegL switch_val, immI2 shift, immL32 offset, rRegI dest) %{
7552 match(Jump (AddL (LShiftL switch_val shift) offset));
7553 ins_cost(350);
7554 effect(TEMP dest);
7555
7556 format %{ "leaq $dest, [$constantaddress]\n\t"
7557 "jmp [$dest + $switch_val << $shift + $offset]\n\t" %}
7558 ins_encode %{
7559 // We could use jump(ArrayAddress) except that the macro assembler needs to use r10
7560 // to do that and the compiler is using that register as one it can allocate.
7561 // So we build it all by hand.
7562 // Address index(noreg, switch_reg, (Address::ScaleFactor) $shift$$constant, (int) $offset$$constant);
7563 // ArrayAddress dispatch(table, index);
7564 Address dispatch($dest$$Register, $switch_val$$Register, (Address::ScaleFactor) $shift$$constant, (int) $offset$$constant);
7565 __ lea($dest$$Register, $constantaddress);
7566 __ jmp(dispatch);
7567 %}
7568 ins_pipe(pipe_jmp);
7569 %}
7570
7571 instruct jumpXtnd(rRegL switch_val, rRegI dest) %{
7572 match(Jump switch_val);
7573 ins_cost(350);
7574 effect(TEMP dest);
7575
7576 format %{ "leaq $dest, [$constantaddress]\n\t"
7577 "jmp [$dest + $switch_val]\n\t" %}
7578 ins_encode %{
7579 // We could use jump(ArrayAddress) except that the macro assembler needs to use r10
7580 // to do that and the compiler is using that register as one it can allocate.
7581 // So we build it all by hand.
7582 // Address index(noreg, switch_reg, Address::times_1);
7583 // ArrayAddress dispatch(table, index);
7584 Address dispatch($dest$$Register, $switch_val$$Register, Address::times_1);
7585 __ lea($dest$$Register, $constantaddress);
7586 __ jmp(dispatch);
7587 %}
7588 ins_pipe(pipe_jmp);
7589 %}
7590
7591 // Conditional move
7592 instruct cmovI_reg(rRegI dst, rRegI src, rFlagsReg cr, cmpOp cop)
7593 %{
7594 match(Set dst (CMoveI (Binary cop cr) (Binary dst src)));
7595
7596 ins_cost(200); // XXX
7597 format %{ "cmovl$cop $dst, $src\t# signed, int" %}
7598 opcode(0x0F, 0x40);
7599 ins_encode(REX_reg_reg(dst, src), enc_cmov(cop), reg_reg(dst, src));
7600 ins_pipe(pipe_cmov_reg);
7601 %}
7602
7603 instruct cmovI_regU(cmpOpU cop, rFlagsRegU cr, rRegI dst, rRegI src) %{
7604 match(Set dst (CMoveI (Binary cop cr) (Binary dst src)));
7605
7606 ins_cost(200); // XXX
7607 format %{ "cmovl$cop $dst, $src\t# unsigned, int" %}
7608 opcode(0x0F, 0x40);
11999 compI_rReg(cr, dst, src);
12000 cmovI_reg_l(dst, src, cr);
12001 %}
12002 %}
12003
12004 // ============================================================================
12005 // Branch Instructions
12006
12007 // Jump Direct - Label defines a relative address from JMP+1
12008 instruct jmpDir(label labl)
12009 %{
12010 match(Goto);
12011 effect(USE labl);
12012
12013 ins_cost(300);
12014 format %{ "jmp $labl" %}
12015 size(5);
12016 opcode(0xE9);
12017 ins_encode(OpcP, Lbl(labl));
12018 ins_pipe(pipe_jmp);
12019 %}
12020
12021 // Jump Direct Conditional - Label defines a relative address from Jcc+1
12022 instruct jmpCon(cmpOp cop, rFlagsReg cr, label labl)
12023 %{
12024 match(If cop cr);
12025 effect(USE labl);
12026
12027 ins_cost(300);
12028 format %{ "j$cop $labl" %}
12029 size(6);
12030 opcode(0x0F, 0x80);
12031 ins_encode(Jcc(cop, labl));
12032 ins_pipe(pipe_jcc);
12033 %}
12034
12035 // Jump Direct Conditional - Label defines a relative address from Jcc+1
12036 instruct jmpLoopEnd(cmpOp cop, rFlagsReg cr, label labl)
12037 %{
12038 match(CountedLoopEnd cop cr);
12039 effect(USE labl);
12040
12041 ins_cost(300);
12042 format %{ "j$cop $labl\t# loop end" %}
12043 size(6);
12044 opcode(0x0F, 0x80);
12045 ins_encode(Jcc(cop, labl));
12046 ins_pipe(pipe_jcc);
12047 %}
12048
12049 // Jump Direct Conditional - Label defines a relative address from Jcc+1
12050 instruct jmpLoopEndU(cmpOpU cop, rFlagsRegU cmp, label labl) %{
12051 match(CountedLoopEnd cop cmp);
12052 effect(USE labl);
12053
12054 ins_cost(300);
12055 format %{ "j$cop,u $labl\t# loop end" %}
12056 size(6);
12057 opcode(0x0F, 0x80);
12058 ins_encode(Jcc(cop, labl));
12059 ins_pipe(pipe_jcc);
12060 %}
12061
12062 instruct jmpLoopEndUCF(cmpOpUCF cop, rFlagsRegUCF cmp, label labl) %{
12063 match(CountedLoopEnd cop cmp);
12064 effect(USE labl);
12065
12066 ins_cost(200);
12067 format %{ "j$cop,u $labl\t# loop end" %}
12068 size(6);
12069 opcode(0x0F, 0x80);
12070 ins_encode(Jcc(cop, labl));
12071 ins_pipe(pipe_jcc);
12072 %}
12073
12074 // Jump Direct Conditional - using unsigned comparison
12075 instruct jmpConU(cmpOpU cop, rFlagsRegU cmp, label labl) %{
12076 match(If cop cmp);
12077 effect(USE labl);
12078
12079 ins_cost(300);
12080 format %{ "j$cop,u $labl" %}
12081 size(6);
12082 opcode(0x0F, 0x80);
12083 ins_encode(Jcc(cop, labl));
12084 ins_pipe(pipe_jcc);
12085 %}
12086
12087 instruct jmpConUCF(cmpOpUCF cop, rFlagsRegUCF cmp, label labl) %{
12088 match(If cop cmp);
12089 effect(USE labl);
12090
12091 ins_cost(200);
12092 format %{ "j$cop,u $labl" %}
12093 size(6);
12094 opcode(0x0F, 0x80);
12095 ins_encode(Jcc(cop, labl));
12096 ins_pipe(pipe_jcc);
12097 %}
12098
12099 instruct jmpConUCF2(cmpOpUCF2 cop, rFlagsRegUCF cmp, label labl) %{
12100 match(If cop cmp);
12101 effect(USE labl);
12102
12103 ins_cost(200);
12104 format %{ $$template
12105 if ($cop$$cmpcode == Assembler::notEqual) {
12106 $$emit$$"jp,u $labl\n\t"
12107 $$emit$$"j$cop,u $labl"
12108 } else {
12109 $$emit$$"jp,u done\n\t"
12110 $$emit$$"j$cop,u $labl\n\t"
12111 $$emit$$"done:"
12112 }
12113 %}
12114 size(12);
12115 opcode(0x0F, 0x80);
12116 ins_encode %{
12117 Label* l = $labl$$label;
12118 $$$emit8$primary;
12119 emit_cc(cbuf, $secondary, Assembler::parity);
12120 int parity_disp = -1;
12121 if ($cop$$cmpcode == Assembler::notEqual) {
12122 // the two jumps 6 bytes apart so the jump distances are too
12123 parity_disp = l->loc_pos() - (cbuf.insts_size() + 4);
12124 } else if ($cop$$cmpcode == Assembler::equal) {
12125 parity_disp = 6;
12126 } else {
12127 ShouldNotReachHere();
12128 }
12129 emit_d32(cbuf, parity_disp);
12130 $$$emit8$primary;
12131 emit_cc(cbuf, $secondary, $cop$$cmpcode);
12132 int disp = l->loc_pos() - (cbuf.insts_size() + 4);
12133 emit_d32(cbuf, disp);
12134 %}
12135 ins_pipe(pipe_jcc);
12136 %}
12137
12138 // ============================================================================
12139 // The 2nd slow-half of a subtype check. Scan the subklass's 2ndary
12140 // superklass array for an instance of the superklass. Set a hidden
12141 // internal cache on a hit (cache is checked with exposed code in
12142 // gen_subtype_check()). Return NZ for a miss or zero for a hit. The
12143 // encoding ALSO sets flags.
12144
12145 instruct partialSubtypeCheck(rdi_RegP result,
12146 rsi_RegP sub, rax_RegP super, rcx_RegI rcx,
12147 rFlagsReg cr)
12148 %{
12149 match(Set result (PartialSubtypeCheck sub super));
12150 effect(KILL rcx, KILL cr);
12151
12152 ins_cost(1100); // slightly larger than the next version
12153 format %{ "movq rdi, [$sub + (sizeof(oopDesc) + Klass::secondary_supers_offset_in_bytes())]\n\t"
12154 "movl rcx, [rdi + arrayOopDesc::length_offset_in_bytes()]\t# length to scan\n\t"
12155 "addq rdi, arrayOopDex::base_offset_in_bytes(T_OBJECT)\t# Skip to start of data; set NZ in case count is zero\n\t"
12192 // These instructions are used to replace jumps of a long offset (the default
12193 // match) with jumps of a shorter offset. These instructions are all tagged
12194 // with the ins_short_branch attribute, which causes the ADLC to suppress the
12195 // match rules in general matching. Instead, the ADLC generates a conversion
12196 // method in the MachNode which can be used to do in-place replacement of the
12197 // long variant with the shorter variant. The compiler will determine if a
12198 // branch can be taken by the is_short_branch_offset() predicate in the machine
12199 // specific code section of the file.
12200
12201 // Jump Direct - Label defines a relative address from JMP+1
12202 instruct jmpDir_short(label labl) %{
12203 match(Goto);
12204 effect(USE labl);
12205
12206 ins_cost(300);
12207 format %{ "jmp,s $labl" %}
12208 size(2);
12209 opcode(0xEB);
12210 ins_encode(OpcP, LblShort(labl));
12211 ins_pipe(pipe_jmp);
12212 ins_short_branch(1);
12213 %}
12214
12215 // Jump Direct Conditional - Label defines a relative address from Jcc+1
12216 instruct jmpCon_short(cmpOp cop, rFlagsReg cr, label labl) %{
12217 match(If cop cr);
12218 effect(USE labl);
12219
12220 ins_cost(300);
12221 format %{ "j$cop,s $labl" %}
12222 size(2);
12223 opcode(0x70);
12224 ins_encode(JccShort(cop, labl));
12225 ins_pipe(pipe_jcc);
12226 ins_short_branch(1);
12227 %}
12228
12229 // Jump Direct Conditional - Label defines a relative address from Jcc+1
12230 instruct jmpLoopEnd_short(cmpOp cop, rFlagsReg cr, label labl) %{
12231 match(CountedLoopEnd cop cr);
12232 effect(USE labl);
12233
12234 ins_cost(300);
12235 format %{ "j$cop,s $labl\t# loop end" %}
12236 size(2);
12237 opcode(0x70);
12238 ins_encode(JccShort(cop, labl));
12239 ins_pipe(pipe_jcc);
12240 ins_short_branch(1);
12241 %}
12242
12243 // Jump Direct Conditional - Label defines a relative address from Jcc+1
12244 instruct jmpLoopEndU_short(cmpOpU cop, rFlagsRegU cmp, label labl) %{
12245 match(CountedLoopEnd cop cmp);
12246 effect(USE labl);
12247
12248 ins_cost(300);
12249 format %{ "j$cop,us $labl\t# loop end" %}
12250 size(2);
12251 opcode(0x70);
12252 ins_encode(JccShort(cop, labl));
12253 ins_pipe(pipe_jcc);
12254 ins_short_branch(1);
12255 %}
12256
12257 instruct jmpLoopEndUCF_short(cmpOpUCF cop, rFlagsRegUCF cmp, label labl) %{
12258 match(CountedLoopEnd cop cmp);
12259 effect(USE labl);
12260
12261 ins_cost(300);
12262 format %{ "j$cop,us $labl\t# loop end" %}
12263 size(2);
12264 opcode(0x70);
12265 ins_encode(JccShort(cop, labl));
12266 ins_pipe(pipe_jcc);
12267 ins_short_branch(1);
12268 %}
12269
12270 // Jump Direct Conditional - using unsigned comparison
12271 instruct jmpConU_short(cmpOpU cop, rFlagsRegU cmp, label labl) %{
12272 match(If cop cmp);
12273 effect(USE labl);
12274
12275 ins_cost(300);
12276 format %{ "j$cop,us $labl" %}
12277 size(2);
12278 opcode(0x70);
12279 ins_encode(JccShort(cop, labl));
12280 ins_pipe(pipe_jcc);
12281 ins_short_branch(1);
12282 %}
12283
12284 instruct jmpConUCF_short(cmpOpUCF cop, rFlagsRegUCF cmp, label labl) %{
12285 match(If cop cmp);
12286 effect(USE labl);
12287
12288 ins_cost(300);
12289 format %{ "j$cop,us $labl" %}
12290 size(2);
12291 opcode(0x70);
12292 ins_encode(JccShort(cop, labl));
12293 ins_pipe(pipe_jcc);
12294 ins_short_branch(1);
12295 %}
12296
12297 instruct jmpConUCF2_short(cmpOpUCF2 cop, rFlagsRegUCF cmp, label labl) %{
12298 match(If cop cmp);
12299 effect(USE labl);
12300
12301 ins_cost(300);
12302 format %{ $$template
12303 if ($cop$$cmpcode == Assembler::notEqual) {
12304 $$emit$$"jp,u,s $labl\n\t"
12305 $$emit$$"j$cop,u,s $labl"
12306 } else {
12307 $$emit$$"jp,u,s done\n\t"
12308 $$emit$$"j$cop,u,s $labl\n\t"
12309 $$emit$$"done:"
12310 }
12311 %}
12312 size(4);
12313 opcode(0x70);
12314 ins_encode %{
12315 Label* l = $labl$$label;
12316 emit_cc(cbuf, $primary, Assembler::parity);
12317 int parity_disp = -1;
12318 if ($cop$$cmpcode == Assembler::notEqual) {
12319 parity_disp = l->loc_pos() - (cbuf.insts_size() + 1);
12320 } else if ($cop$$cmpcode == Assembler::equal) {
12321 parity_disp = 2;
12322 } else {
12323 ShouldNotReachHere();
12324 }
12325 emit_d8(cbuf, parity_disp);
12326 emit_cc(cbuf, $primary, $cop$$cmpcode);
12327 int disp = l->loc_pos() - (cbuf.insts_size() + 1);
12328 emit_d8(cbuf, disp);
12329 assert(-128 <= disp && disp <= 127, "Displacement too large for short jmp");
12330 assert(-128 <= parity_disp && parity_disp <= 127, "Displacement too large for short jmp");
12331 %}
12332 ins_pipe(pipe_jcc);
12333 ins_short_branch(1);
12334 %}
12335
12336 // ============================================================================
12337 // inlined locking and unlocking
12338
12339 instruct cmpFastLock(rFlagsReg cr,
12340 rRegP object, rRegP box, rax_RegI tmp, rRegP scr)
12341 %{
12342 match(Set cr (FastLock object box));
12343 effect(TEMP tmp, TEMP scr);
12344
12345 ins_cost(300);
12346 format %{ "fastlock $object,$box,$tmp,$scr" %}
12347 ins_encode(Fast_Lock(object, box, tmp, scr));
12348 ins_pipe(pipe_slow);
12349 %}
12350
12351 instruct cmpFastUnlock(rFlagsReg cr,
12352 rRegP object, rax_RegP box, rRegP tmp)
12353 %{
12354 match(Set cr (FastUnlock object box));
12355 effect(TEMP tmp);
12356
12357 ins_cost(300);
12358 format %{ "fastunlock $object, $box, $tmp" %}
12359 ins_encode(Fast_Unlock(object, box, tmp));
12360 ins_pipe(pipe_slow);
12361 %}
12362
12363
12364 // ============================================================================
12365 // Safepoint Instructions
12366 instruct safePoint_poll(rFlagsReg cr)
12367 %{
12368 predicate(!Assembler::is_polling_page_far());
12369 match(SafePoint);
12370 effect(KILL cr);
12371
12372 format %{ "testl rax, [rip + #offset_to_poll_page]\t"
12373 "# Safepoint: poll for GC" %}
12374 ins_cost(125);
12375 ins_encode %{
12376 AddressLiteral addr(os::get_polling_page(), relocInfo::poll_type);
12377 __ testl(rax, addr);
12378 %}
12379 ins_pipe(ialu_reg_mem);
12380 %}
12393 __ testl(rax, Address($poll$$Register, 0));
12394 %}
12395 ins_pipe(ialu_reg_mem);
12396 %}
12397
12398 // ============================================================================
12399 // Procedure Call/Return Instructions
12400 // Call Java Static Instruction
12401 // Note: If this code changes, the corresponding ret_addr_offset() and
12402 // compute_padding() functions will have to be adjusted.
12403 instruct CallStaticJavaDirect(method meth) %{
12404 match(CallStaticJava);
12405 predicate(!((CallStaticJavaNode*) n)->is_method_handle_invoke());
12406 effect(USE meth);
12407
12408 ins_cost(300);
12409 format %{ "call,static " %}
12410 opcode(0xE8); /* E8 cd */
12411 ins_encode(Java_Static_Call(meth), call_epilog);
12412 ins_pipe(pipe_slow);
12413 ins_alignment(4);
12414 %}
12415
12416 // Call Java Static Instruction (method handle version)
12417 // Note: If this code changes, the corresponding ret_addr_offset() and
12418 // compute_padding() functions will have to be adjusted.
12419 instruct CallStaticJavaHandle(method meth, rbp_RegP rbp_mh_SP_save) %{
12420 match(CallStaticJava);
12421 predicate(((CallStaticJavaNode*) n)->is_method_handle_invoke());
12422 effect(USE meth);
12423 // RBP is saved by all callees (for interpreter stack correction).
12424 // We use it here for a similar purpose, in {preserve,restore}_SP.
12425
12426 ins_cost(300);
12427 format %{ "call,static/MethodHandle " %}
12428 opcode(0xE8); /* E8 cd */
12429 ins_encode(preserve_SP,
12430 Java_Static_Call(meth),
12431 restore_SP,
12432 call_epilog);
12433 ins_pipe(pipe_slow);
12434 ins_alignment(4);
12435 %}
12436
12437 // Call Java Dynamic Instruction
12438 // Note: If this code changes, the corresponding ret_addr_offset() and
12439 // compute_padding() functions will have to be adjusted.
12440 instruct CallDynamicJavaDirect(method meth)
12441 %{
12442 match(CallDynamicJava);
12443 effect(USE meth);
12444
12445 ins_cost(300);
12446 format %{ "movq rax, #Universe::non_oop_word()\n\t"
12447 "call,dynamic " %}
12448 opcode(0xE8); /* E8 cd */
12449 ins_encode(Java_Dynamic_Call(meth), call_epilog);
12450 ins_pipe(pipe_slow);
12451 ins_alignment(4);
12452 %}
12453
12454 // Call Runtime Instruction
12455 instruct CallRuntimeDirect(method meth)
12456 %{
12457 match(CallRuntime);
12458 effect(USE meth);
12459
12460 ins_cost(300);
12461 format %{ "call,runtime " %}
12462 opcode(0xE8); /* E8 cd */
12463 ins_encode(Java_To_Runtime(meth));
12464 ins_pipe(pipe_slow);
12465 %}
12466
12467 // Call runtime without safepoint
12468 instruct CallLeafDirect(method meth)
12469 %{
12470 match(CallLeaf);
12471 effect(USE meth);
12472
12473 ins_cost(300);
12474 format %{ "call_leaf,runtime " %}
12475 opcode(0xE8); /* E8 cd */
12476 ins_encode(Java_To_Runtime(meth));
12477 ins_pipe(pipe_slow);
12478 %}
12479
12480 // Call runtime without safepoint
12481 instruct CallLeafNoFPDirect(method meth)
12482 %{
12483 match(CallLeafNoFP);
12484 effect(USE meth);
12485
12486 ins_cost(300);
12487 format %{ "call_leaf_nofp,runtime " %}
12488 opcode(0xE8); /* E8 cd */
12489 ins_encode(Java_To_Runtime(meth));
12490 ins_pipe(pipe_slow);
12491 %}
12492
12493 // Return Instruction
12494 // Remove the return address & jump to it.
12495 // Notice: We always emit a nop after a ret to make sure there is room
12496 // for safepoint patching
12497 instruct Ret()
12498 %{
12499 match(Return);
12500
12501 format %{ "ret" %}
12502 opcode(0xC3);
12503 ins_encode(OpcP);
12504 ins_pipe(pipe_jmp);
12505 %}
12506
12507 // Tail Call; Jump from runtime stub to Java code.
12508 // Also known as an 'interprocedural jump'.
12509 // Target of jump will eventually return to caller.
12510 // TailJump below removes the return address.
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