1 /* 2 * Copyright (c) 1997, 2010, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "memory/allocation.inline.hpp" 27 #include "opto/addnode.hpp" 28 #include "opto/connode.hpp" 29 #include "opto/memnode.hpp" 30 #include "opto/mulnode.hpp" 31 #include "opto/phaseX.hpp" 32 #include "opto/subnode.hpp" 33 34 // Portions of code courtesy of Clifford Click 35 36 37 //============================================================================= 38 //------------------------------hash------------------------------------------- 39 // Hash function over MulNodes. Needs to be commutative; i.e., I swap 40 // (commute) inputs to MulNodes willy-nilly so the hash function must return 41 // the same value in the presence of edge swapping. 42 uint MulNode::hash() const { 43 return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode(); 44 } 45 46 //------------------------------Identity--------------------------------------- 47 // Multiplying a one preserves the other argument 48 Node *MulNode::Identity( PhaseTransform *phase ) { 49 register const Type *one = mul_id(); // The multiplicative identity 50 if( phase->type( in(1) )->higher_equal( one ) ) return in(2); 51 if( phase->type( in(2) )->higher_equal( one ) ) return in(1); 52 53 return this; 54 } 55 56 //------------------------------Ideal------------------------------------------ 57 // We also canonicalize the Node, moving constants to the right input, 58 // and flatten expressions (so that 1+x+2 becomes x+3). 59 Node *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) { 60 const Type *t1 = phase->type( in(1) ); 61 const Type *t2 = phase->type( in(2) ); 62 Node *progress = NULL; // Progress flag 63 // We are OK if right is a constant, or right is a load and 64 // left is a non-constant. 65 if( !(t2->singleton() || 66 (in(2)->is_Load() && !(t1->singleton() || in(1)->is_Load())) ) ) { 67 if( t1->singleton() || // Left input is a constant? 68 // Otherwise, sort inputs (commutativity) to help value numbering. 69 (in(1)->_idx > in(2)->_idx) ) { 70 swap_edges(1, 2); 71 const Type *t = t1; 72 t1 = t2; 73 t2 = t; 74 progress = this; // Made progress 75 } 76 } 77 78 // If the right input is a constant, and the left input is a product of a 79 // constant, flatten the expression tree. 80 uint op = Opcode(); 81 if( t2->singleton() && // Right input is a constant? 82 op != Op_MulF && // Float & double cannot reassociate 83 op != Op_MulD ) { 84 if( t2 == Type::TOP ) return NULL; 85 Node *mul1 = in(1); 86 #ifdef ASSERT 87 // Check for dead loop 88 int op1 = mul1->Opcode(); 89 if( phase->eqv( mul1, this ) || phase->eqv( in(2), this ) || 90 ( op1 == mul_opcode() || op1 == add_opcode() ) && 91 ( phase->eqv( mul1->in(1), this ) || phase->eqv( mul1->in(2), this ) || 92 phase->eqv( mul1->in(1), mul1 ) || phase->eqv( mul1->in(2), mul1 ) ) ) 93 assert(false, "dead loop in MulNode::Ideal"); 94 #endif 95 96 if( mul1->Opcode() == mul_opcode() ) { // Left input is a multiply? 97 // Mul of a constant? 98 const Type *t12 = phase->type( mul1->in(2) ); 99 if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant? 100 // Compute new constant; check for overflow 101 const Type *tcon01 = ((MulNode*)mul1)->mul_ring(t2,t12); 102 if( tcon01->singleton() ) { 103 // The Mul of the flattened expression 104 set_req(1, mul1->in(1)); 105 set_req(2, phase->makecon( tcon01 )); 106 t2 = tcon01; 107 progress = this; // Made progress 108 } 109 } 110 } 111 // If the right input is a constant, and the left input is an add of a 112 // constant, flatten the tree: (X+con1)*con0 ==> X*con0 + con1*con0 113 const Node *add1 = in(1); 114 if( add1->Opcode() == add_opcode() ) { // Left input is an add? 115 // Add of a constant? 116 const Type *t12 = phase->type( add1->in(2) ); 117 if( t12->singleton() && t12 != Type::TOP ) { // Left input is an add of a constant? 118 assert( add1->in(1) != add1, "dead loop in MulNode::Ideal" ); 119 // Compute new constant; check for overflow 120 const Type *tcon01 = mul_ring(t2,t12); 121 if( tcon01->singleton() ) { 122 123 // Convert (X+con1)*con0 into X*con0 124 Node *mul = clone(); // mul = ()*con0 125 mul->set_req(1,add1->in(1)); // mul = X*con0 126 mul = phase->transform(mul); 127 128 Node *add2 = add1->clone(); 129 add2->set_req(1, mul); // X*con0 + con0*con1 130 add2->set_req(2, phase->makecon(tcon01) ); 131 progress = add2; 132 } 133 } 134 } // End of is left input an add 135 } // End of is right input a Mul 136 137 return progress; 138 } 139 140 //------------------------------Value----------------------------------------- 141 const Type *MulNode::Value( PhaseTransform *phase ) const { 142 const Type *t1 = phase->type( in(1) ); 143 const Type *t2 = phase->type( in(2) ); 144 // Either input is TOP ==> the result is TOP 145 if( t1 == Type::TOP ) return Type::TOP; 146 if( t2 == Type::TOP ) return Type::TOP; 147 148 // Either input is ZERO ==> the result is ZERO. 149 // Not valid for floats or doubles since +0.0 * -0.0 --> +0.0 150 int op = Opcode(); 151 if( op == Op_MulI || op == Op_AndI || op == Op_MulL || op == Op_AndL ) { 152 const Type *zero = add_id(); // The multiplicative zero 153 if( t1->higher_equal( zero ) ) return zero; 154 if( t2->higher_equal( zero ) ) return zero; 155 } 156 157 // Either input is BOTTOM ==> the result is the local BOTTOM 158 if( t1 == Type::BOTTOM || t2 == Type::BOTTOM ) 159 return bottom_type(); 160 161 #if defined(IA32) 162 // Can't trust native compilers to properly fold strict double 163 // multiplication with round-to-zero on this platform. 164 if (op == Op_MulD && phase->C->method()->is_strict()) { 165 return TypeD::DOUBLE; 166 } 167 #endif 168 169 return mul_ring(t1,t2); // Local flavor of type multiplication 170 } 171 172 173 //============================================================================= 174 //------------------------------Ideal------------------------------------------ 175 // Check for power-of-2 multiply, then try the regular MulNode::Ideal 176 Node *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) { 177 // Swap constant to right 178 jint con; 179 if ((con = in(1)->find_int_con(0)) != 0) { 180 swap_edges(1, 2); 181 // Finish rest of method to use info in 'con' 182 } else if ((con = in(2)->find_int_con(0)) == 0) { 183 return MulNode::Ideal(phase, can_reshape); 184 } 185 186 // Now we have a constant Node on the right and the constant in con 187 if( con == 0 ) return NULL; // By zero is handled by Value call 188 if( con == 1 ) return NULL; // By one is handled by Identity call 189 190 // Check for negative constant; if so negate the final result 191 bool sign_flip = false; 192 if( con < 0 ) { 193 con = -con; 194 sign_flip = true; 195 } 196 197 // Get low bit; check for being the only bit 198 Node *res = NULL; 199 jint bit1 = con & -con; // Extract low bit 200 if( bit1 == con ) { // Found a power of 2? 201 res = new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ); 202 } else { 203 204 // Check for constant with 2 bits set 205 jint bit2 = con-bit1; 206 bit2 = bit2 & -bit2; // Extract 2nd bit 207 if( bit2 + bit1 == con ) { // Found all bits in con? 208 Node *n1 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit1)) ) ); 209 Node *n2 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(bit2)) ) ); 210 res = new (phase->C, 3) AddINode( n2, n1 ); 211 212 } else if (is_power_of_2(con+1)) { 213 // Sleezy: power-of-2 -1. Next time be generic. 214 jint temp = (jint) (con + 1); 215 Node *n1 = phase->transform( new (phase->C, 3) LShiftINode( in(1), phase->intcon(log2_intptr(temp)) ) ); 216 res = new (phase->C, 3) SubINode( n1, in(1) ); 217 } else { 218 return MulNode::Ideal(phase, can_reshape); 219 } 220 } 221 222 if( sign_flip ) { // Need to negate result? 223 res = phase->transform(res);// Transform, before making the zero con 224 res = new (phase->C, 3) SubINode(phase->intcon(0),res); 225 } 226 227 return res; // Return final result 228 } 229 230 //------------------------------mul_ring--------------------------------------- 231 // Compute the product type of two integer ranges into this node. 232 const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const { 233 const TypeInt *r0 = t0->is_int(); // Handy access 234 const TypeInt *r1 = t1->is_int(); 235 236 // Fetch endpoints of all ranges 237 int32 lo0 = r0->_lo; 238 double a = (double)lo0; 239 int32 hi0 = r0->_hi; 240 double b = (double)hi0; 241 int32 lo1 = r1->_lo; 242 double c = (double)lo1; 243 int32 hi1 = r1->_hi; 244 double d = (double)hi1; 245 246 // Compute all endpoints & check for overflow 247 int32 A = lo0*lo1; 248 if( (double)A != a*c ) return TypeInt::INT; // Overflow? 249 int32 B = lo0*hi1; 250 if( (double)B != a*d ) return TypeInt::INT; // Overflow? 251 int32 C = hi0*lo1; 252 if( (double)C != b*c ) return TypeInt::INT; // Overflow? 253 int32 D = hi0*hi1; 254 if( (double)D != b*d ) return TypeInt::INT; // Overflow? 255 256 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints 257 else { lo0 = B; hi0 = A; } 258 if( C < D ) { 259 if( C < lo0 ) lo0 = C; 260 if( D > hi0 ) hi0 = D; 261 } else { 262 if( D < lo0 ) lo0 = D; 263 if( C > hi0 ) hi0 = C; 264 } 265 return TypeInt::make(lo0, hi0, MAX2(r0->_widen,r1->_widen)); 266 } 267 268 269 //============================================================================= 270 //------------------------------Ideal------------------------------------------ 271 // Check for power-of-2 multiply, then try the regular MulNode::Ideal 272 Node *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) { 273 // Swap constant to right 274 jlong con; 275 if ((con = in(1)->find_long_con(0)) != 0) { 276 swap_edges(1, 2); 277 // Finish rest of method to use info in 'con' 278 } else if ((con = in(2)->find_long_con(0)) == 0) { 279 return MulNode::Ideal(phase, can_reshape); 280 } 281 282 // Now we have a constant Node on the right and the constant in con 283 if( con == CONST64(0) ) return NULL; // By zero is handled by Value call 284 if( con == CONST64(1) ) return NULL; // By one is handled by Identity call 285 286 // Check for negative constant; if so negate the final result 287 bool sign_flip = false; 288 if( con < 0 ) { 289 con = -con; 290 sign_flip = true; 291 } 292 293 // Get low bit; check for being the only bit 294 Node *res = NULL; 295 jlong bit1 = con & -con; // Extract low bit 296 if( bit1 == con ) { // Found a power of 2? 297 res = new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ); 298 } else { 299 300 // Check for constant with 2 bits set 301 jlong bit2 = con-bit1; 302 bit2 = bit2 & -bit2; // Extract 2nd bit 303 if( bit2 + bit1 == con ) { // Found all bits in con? 304 Node *n1 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit1)) ) ); 305 Node *n2 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(bit2)) ) ); 306 res = new (phase->C, 3) AddLNode( n2, n1 ); 307 308 } else if (is_power_of_2_long(con+1)) { 309 // Sleezy: power-of-2 -1. Next time be generic. 310 jlong temp = (jlong) (con + 1); 311 Node *n1 = phase->transform( new (phase->C, 3) LShiftLNode( in(1), phase->intcon(log2_long(temp)) ) ); 312 res = new (phase->C, 3) SubLNode( n1, in(1) ); 313 } else { 314 return MulNode::Ideal(phase, can_reshape); 315 } 316 } 317 318 if( sign_flip ) { // Need to negate result? 319 res = phase->transform(res);// Transform, before making the zero con 320 res = new (phase->C, 3) SubLNode(phase->longcon(0),res); 321 } 322 323 return res; // Return final result 324 } 325 326 //------------------------------mul_ring--------------------------------------- 327 // Compute the product type of two integer ranges into this node. 328 const Type *MulLNode::mul_ring(const Type *t0, const Type *t1) const { 329 const TypeLong *r0 = t0->is_long(); // Handy access 330 const TypeLong *r1 = t1->is_long(); 331 332 // Fetch endpoints of all ranges 333 jlong lo0 = r0->_lo; 334 double a = (double)lo0; 335 jlong hi0 = r0->_hi; 336 double b = (double)hi0; 337 jlong lo1 = r1->_lo; 338 double c = (double)lo1; 339 jlong hi1 = r1->_hi; 340 double d = (double)hi1; 341 342 // Compute all endpoints & check for overflow 343 jlong A = lo0*lo1; 344 if( (double)A != a*c ) return TypeLong::LONG; // Overflow? 345 jlong B = lo0*hi1; 346 if( (double)B != a*d ) return TypeLong::LONG; // Overflow? 347 jlong C = hi0*lo1; 348 if( (double)C != b*c ) return TypeLong::LONG; // Overflow? 349 jlong D = hi0*hi1; 350 if( (double)D != b*d ) return TypeLong::LONG; // Overflow? 351 352 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints 353 else { lo0 = B; hi0 = A; } 354 if( C < D ) { 355 if( C < lo0 ) lo0 = C; 356 if( D > hi0 ) hi0 = D; 357 } else { 358 if( D < lo0 ) lo0 = D; 359 if( C > hi0 ) hi0 = C; 360 } 361 return TypeLong::make(lo0, hi0, MAX2(r0->_widen,r1->_widen)); 362 } 363 364 //============================================================================= 365 //------------------------------mul_ring--------------------------------------- 366 // Compute the product type of two double ranges into this node. 367 const Type *MulFNode::mul_ring(const Type *t0, const Type *t1) const { 368 if( t0 == Type::FLOAT || t1 == Type::FLOAT ) return Type::FLOAT; 369 return TypeF::make( t0->getf() * t1->getf() ); 370 } 371 372 //============================================================================= 373 //------------------------------mul_ring--------------------------------------- 374 // Compute the product type of two double ranges into this node. 375 const Type *MulDNode::mul_ring(const Type *t0, const Type *t1) const { 376 if( t0 == Type::DOUBLE || t1 == Type::DOUBLE ) return Type::DOUBLE; 377 // We must be multiplying 2 double constants. 378 return TypeD::make( t0->getd() * t1->getd() ); 379 } 380 381 //============================================================================= 382 //------------------------------Value------------------------------------------ 383 const Type *MulHiLNode::Value( PhaseTransform *phase ) const { 384 // Either input is TOP ==> the result is TOP 385 const Type *t1 = phase->type( in(1) ); 386 const Type *t2 = phase->type( in(2) ); 387 if( t1 == Type::TOP ) return Type::TOP; 388 if( t2 == Type::TOP ) return Type::TOP; 389 390 // Either input is BOTTOM ==> the result is the local BOTTOM 391 const Type *bot = bottom_type(); 392 if( (t1 == bot) || (t2 == bot) || 393 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) ) 394 return bot; 395 396 // It is not worth trying to constant fold this stuff! 397 return TypeLong::LONG; 398 } 399 400 //============================================================================= 401 //------------------------------mul_ring--------------------------------------- 402 // Supplied function returns the product of the inputs IN THE CURRENT RING. 403 // For the logical operations the ring's MUL is really a logical AND function. 404 // This also type-checks the inputs for sanity. Guaranteed never to 405 // be passed a TOP or BOTTOM type, these are filtered out by pre-check. 406 const Type *AndINode::mul_ring( const Type *t0, const Type *t1 ) const { 407 const TypeInt *r0 = t0->is_int(); // Handy access 408 const TypeInt *r1 = t1->is_int(); 409 int widen = MAX2(r0->_widen,r1->_widen); 410 411 // If either input is a constant, might be able to trim cases 412 if( !r0->is_con() && !r1->is_con() ) 413 return TypeInt::INT; // No constants to be had 414 415 // Both constants? Return bits 416 if( r0->is_con() && r1->is_con() ) 417 return TypeInt::make( r0->get_con() & r1->get_con() ); 418 419 if( r0->is_con() && r0->get_con() > 0 ) 420 return TypeInt::make(0, r0->get_con(), widen); 421 422 if( r1->is_con() && r1->get_con() > 0 ) 423 return TypeInt::make(0, r1->get_con(), widen); 424 425 if( r0 == TypeInt::BOOL || r1 == TypeInt::BOOL ) { 426 return TypeInt::BOOL; 427 } 428 429 return TypeInt::INT; // No constants to be had 430 } 431 432 //------------------------------Identity--------------------------------------- 433 // Masking off the high bits of an unsigned load is not required 434 Node *AndINode::Identity( PhaseTransform *phase ) { 435 436 // x & x => x 437 if (phase->eqv(in(1), in(2))) return in(1); 438 439 Node* in1 = in(1); 440 uint op = in1->Opcode(); 441 const TypeInt* t2 = phase->type(in(2))->isa_int(); 442 if (t2 && t2->is_con()) { 443 int con = t2->get_con(); 444 // Masking off high bits which are always zero is useless. 445 const TypeInt* t1 = phase->type( in(1) )->isa_int(); 446 if (t1 != NULL && t1->_lo >= 0) { 447 jint t1_support = right_n_bits(1 + log2_intptr(t1->_hi)); 448 if ((t1_support & con) == t1_support) 449 return in1; 450 } 451 // Masking off the high bits of a unsigned-shift-right is not 452 // needed either. 453 if (op == Op_URShiftI) { 454 const TypeInt* t12 = phase->type(in1->in(2))->isa_int(); 455 if (t12 && t12->is_con()) { // Shift is by a constant 456 int shift = t12->get_con(); 457 shift &= BitsPerJavaInteger - 1; // semantics of Java shifts 458 int mask = max_juint >> shift; 459 if ((mask & con) == mask) // If AND is useless, skip it 460 return in1; 461 } 462 } 463 } 464 return MulNode::Identity(phase); 465 } 466 467 //------------------------------Ideal------------------------------------------ 468 Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) { 469 // Special case constant AND mask 470 const TypeInt *t2 = phase->type( in(2) )->isa_int(); 471 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape); 472 const int mask = t2->get_con(); 473 Node *load = in(1); 474 uint lop = load->Opcode(); 475 476 // Masking bits off of a Character? Hi bits are already zero. 477 if( lop == Op_LoadUS && 478 (mask & 0xFFFF0000) ) // Can we make a smaller mask? 479 return new (phase->C, 3) AndINode(load,phase->intcon(mask&0xFFFF)); 480 481 // Masking bits off of a Short? Loading a Character does some masking 482 if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) { 483 Node *ldus = new (phase->C, 3) LoadUSNode(load->in(MemNode::Control), 484 load->in(MemNode::Memory), 485 load->in(MemNode::Address), 486 load->adr_type()); 487 ldus = phase->transform(ldus); 488 return new (phase->C, 3) AndINode(ldus, phase->intcon(mask & 0xFFFF)); 489 } 490 491 // Masking sign bits off of a Byte? Do an unsigned byte load plus 492 // an and. 493 if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) { 494 Node* ldub = new (phase->C, 3) LoadUBNode(load->in(MemNode::Control), 495 load->in(MemNode::Memory), 496 load->in(MemNode::Address), 497 load->adr_type()); 498 ldub = phase->transform(ldub); 499 return new (phase->C, 3) AndINode(ldub, phase->intcon(mask)); 500 } 501 502 // Masking off sign bits? Dont make them! 503 if( lop == Op_RShiftI ) { 504 const TypeInt *t12 = phase->type(load->in(2))->isa_int(); 505 if( t12 && t12->is_con() ) { // Shift is by a constant 506 int shift = t12->get_con(); 507 shift &= BitsPerJavaInteger-1; // semantics of Java shifts 508 const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift); 509 // If the AND'ing of the 2 masks has no bits, then only original shifted 510 // bits survive. NO sign-extension bits survive the maskings. 511 if( (sign_bits_mask & mask) == 0 ) { 512 // Use zero-fill shift instead 513 Node *zshift = phase->transform(new (phase->C, 3) URShiftINode(load->in(1),load->in(2))); 514 return new (phase->C, 3) AndINode( zshift, in(2) ); 515 } 516 } 517 } 518 519 // Check for 'negate/and-1', a pattern emitted when someone asks for 520 // 'mod 2'. Negate leaves the low order bit unchanged (think: complement 521 // plus 1) and the mask is of the low order bit. Skip the negate. 522 if( lop == Op_SubI && mask == 1 && load->in(1) && 523 phase->type(load->in(1)) == TypeInt::ZERO ) 524 return new (phase->C, 3) AndINode( load->in(2), in(2) ); 525 526 return MulNode::Ideal(phase, can_reshape); 527 } 528 529 //============================================================================= 530 //------------------------------mul_ring--------------------------------------- 531 // Supplied function returns the product of the inputs IN THE CURRENT RING. 532 // For the logical operations the ring's MUL is really a logical AND function. 533 // This also type-checks the inputs for sanity. Guaranteed never to 534 // be passed a TOP or BOTTOM type, these are filtered out by pre-check. 535 const Type *AndLNode::mul_ring( const Type *t0, const Type *t1 ) const { 536 const TypeLong *r0 = t0->is_long(); // Handy access 537 const TypeLong *r1 = t1->is_long(); 538 int widen = MAX2(r0->_widen,r1->_widen); 539 540 // If either input is a constant, might be able to trim cases 541 if( !r0->is_con() && !r1->is_con() ) 542 return TypeLong::LONG; // No constants to be had 543 544 // Both constants? Return bits 545 if( r0->is_con() && r1->is_con() ) 546 return TypeLong::make( r0->get_con() & r1->get_con() ); 547 548 if( r0->is_con() && r0->get_con() > 0 ) 549 return TypeLong::make(CONST64(0), r0->get_con(), widen); 550 551 if( r1->is_con() && r1->get_con() > 0 ) 552 return TypeLong::make(CONST64(0), r1->get_con(), widen); 553 554 return TypeLong::LONG; // No constants to be had 555 } 556 557 //------------------------------Identity--------------------------------------- 558 // Masking off the high bits of an unsigned load is not required 559 Node *AndLNode::Identity( PhaseTransform *phase ) { 560 561 // x & x => x 562 if (phase->eqv(in(1), in(2))) return in(1); 563 564 Node *usr = in(1); 565 const TypeLong *t2 = phase->type( in(2) )->isa_long(); 566 if( t2 && t2->is_con() ) { 567 jlong con = t2->get_con(); 568 // Masking off high bits which are always zero is useless. 569 const TypeLong* t1 = phase->type( in(1) )->isa_long(); 570 if (t1 != NULL && t1->_lo >= 0) { 571 jlong t1_support = ((jlong)1 << (1 + log2_long(t1->_hi))) - 1; 572 if ((t1_support & con) == t1_support) 573 return usr; 574 } 575 uint lop = usr->Opcode(); 576 // Masking off the high bits of a unsigned-shift-right is not 577 // needed either. 578 if( lop == Op_URShiftL ) { 579 const TypeInt *t12 = phase->type( usr->in(2) )->isa_int(); 580 if( t12 && t12->is_con() ) { // Shift is by a constant 581 int shift = t12->get_con(); 582 shift &= BitsPerJavaLong - 1; // semantics of Java shifts 583 jlong mask = max_julong >> shift; 584 if( (mask&con) == mask ) // If AND is useless, skip it 585 return usr; 586 } 587 } 588 } 589 return MulNode::Identity(phase); 590 } 591 592 //------------------------------Ideal------------------------------------------ 593 Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) { 594 // Special case constant AND mask 595 const TypeLong *t2 = phase->type( in(2) )->isa_long(); 596 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape); 597 const jlong mask = t2->get_con(); 598 599 Node* in1 = in(1); 600 uint op = in1->Opcode(); 601 602 // Masking sign bits off of an integer? Do an unsigned integer to 603 // long load. 604 // NOTE: This check must be *before* we try to convert the AndLNode 605 // to an AndINode and commute it with ConvI2LNode because 606 // 0xFFFFFFFFL masks the whole integer and we get a sign extension, 607 // which is wrong. 608 if (op == Op_ConvI2L && in1->in(1)->Opcode() == Op_LoadI && mask == CONST64(0x00000000FFFFFFFF)) { 609 Node* load = in1->in(1); 610 return new (phase->C, 3) LoadUI2LNode(load->in(MemNode::Control), 611 load->in(MemNode::Memory), 612 load->in(MemNode::Address), 613 load->adr_type()); 614 } 615 616 // Are we masking a long that was converted from an int with a mask 617 // that fits in 32-bits? Commute them and use an AndINode. Don't 618 // convert masks which would cause a sign extension of the integer 619 // value. This check includes UI2L masks (0x00000000FFFFFFFF) which 620 // would be optimized away later in Identity. 621 if (op == Op_ConvI2L && (mask & CONST64(0xFFFFFFFF80000000)) == 0) { 622 Node* andi = new (phase->C, 3) AndINode(in1->in(1), phase->intcon(mask)); 623 andi = phase->transform(andi); 624 return new (phase->C, 2) ConvI2LNode(andi); 625 } 626 627 // Masking off sign bits? Dont make them! 628 if (op == Op_RShiftL) { 629 const TypeInt* t12 = phase->type(in1->in(2))->isa_int(); 630 if( t12 && t12->is_con() ) { // Shift is by a constant 631 int shift = t12->get_con(); 632 shift &= BitsPerJavaLong - 1; // semantics of Java shifts 633 const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1); 634 // If the AND'ing of the 2 masks has no bits, then only original shifted 635 // bits survive. NO sign-extension bits survive the maskings. 636 if( (sign_bits_mask & mask) == 0 ) { 637 // Use zero-fill shift instead 638 Node *zshift = phase->transform(new (phase->C, 3) URShiftLNode(in1->in(1), in1->in(2))); 639 return new (phase->C, 3) AndLNode(zshift, in(2)); 640 } 641 } 642 } 643 644 return MulNode::Ideal(phase, can_reshape); 645 } 646 647 //============================================================================= 648 //------------------------------Identity--------------------------------------- 649 Node *LShiftINode::Identity( PhaseTransform *phase ) { 650 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int 651 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) ? in(1) : this; 652 } 653 654 //------------------------------Ideal------------------------------------------ 655 // If the right input is a constant, and the left input is an add of a 656 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0 657 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) { 658 const Type *t = phase->type( in(2) ); 659 if( t == Type::TOP ) return NULL; // Right input is dead 660 const TypeInt *t2 = t->isa_int(); 661 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant 662 const int con = t2->get_con() & ( BitsPerInt - 1 ); // masked shift count 663 664 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count 665 666 // Left input is an add of a constant? 667 Node *add1 = in(1); 668 int add1_op = add1->Opcode(); 669 if( add1_op == Op_AddI ) { // Left input is an add? 670 assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" ); 671 const TypeInt *t12 = phase->type(add1->in(2))->isa_int(); 672 if( t12 && t12->is_con() ){ // Left input is an add of a con? 673 // Transform is legal, but check for profit. Avoid breaking 'i2s' 674 // and 'i2b' patterns which typically fold into 'StoreC/StoreB'. 675 if( con < 16 ) { 676 // Compute X << con0 677 Node *lsh = phase->transform( new (phase->C, 3) LShiftINode( add1->in(1), in(2) ) ); 678 // Compute X<<con0 + (con1<<con0) 679 return new (phase->C, 3) AddINode( lsh, phase->intcon(t12->get_con() << con)); 680 } 681 } 682 } 683 684 // Check for "(x>>c0)<<c0" which just masks off low bits 685 if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) && 686 add1->in(2) == in(2) ) 687 // Convert to "(x & -(1<<c0))" 688 return new (phase->C, 3) AndINode(add1->in(1),phase->intcon( -(1<<con))); 689 690 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits 691 if( add1_op == Op_AndI ) { 692 Node *add2 = add1->in(1); 693 int add2_op = add2->Opcode(); 694 if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) && 695 add2->in(2) == in(2) ) { 696 // Convert to "(x & (Y<<c0))" 697 Node *y_sh = phase->transform( new (phase->C, 3) LShiftINode( add1->in(2), in(2) ) ); 698 return new (phase->C, 3) AndINode( add2->in(1), y_sh ); 699 } 700 } 701 702 // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits 703 // before shifting them away. 704 const jint bits_mask = right_n_bits(BitsPerJavaInteger-con); 705 if( add1_op == Op_AndI && 706 phase->type(add1->in(2)) == TypeInt::make( bits_mask ) ) 707 return new (phase->C, 3) LShiftINode( add1->in(1), in(2) ); 708 709 return NULL; 710 } 711 712 //------------------------------Value------------------------------------------ 713 // A LShiftINode shifts its input2 left by input1 amount. 714 const Type *LShiftINode::Value( PhaseTransform *phase ) const { 715 const Type *t1 = phase->type( in(1) ); 716 const Type *t2 = phase->type( in(2) ); 717 // Either input is TOP ==> the result is TOP 718 if( t1 == Type::TOP ) return Type::TOP; 719 if( t2 == Type::TOP ) return Type::TOP; 720 721 // Left input is ZERO ==> the result is ZERO. 722 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO; 723 // Shift by zero does nothing 724 if( t2 == TypeInt::ZERO ) return t1; 725 726 // Either input is BOTTOM ==> the result is BOTTOM 727 if( (t1 == TypeInt::INT) || (t2 == TypeInt::INT) || 728 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) ) 729 return TypeInt::INT; 730 731 const TypeInt *r1 = t1->is_int(); // Handy access 732 const TypeInt *r2 = t2->is_int(); // Handy access 733 734 if (!r2->is_con()) 735 return TypeInt::INT; 736 737 uint shift = r2->get_con(); 738 shift &= BitsPerJavaInteger-1; // semantics of Java shifts 739 // Shift by a multiple of 32 does nothing: 740 if (shift == 0) return t1; 741 742 // If the shift is a constant, shift the bounds of the type, 743 // unless this could lead to an overflow. 744 if (!r1->is_con()) { 745 jint lo = r1->_lo, hi = r1->_hi; 746 if (((lo << shift) >> shift) == lo && 747 ((hi << shift) >> shift) == hi) { 748 // No overflow. The range shifts up cleanly. 749 return TypeInt::make((jint)lo << (jint)shift, 750 (jint)hi << (jint)shift, 751 MAX2(r1->_widen,r2->_widen)); 752 } 753 return TypeInt::INT; 754 } 755 756 return TypeInt::make( (jint)r1->get_con() << (jint)shift ); 757 } 758 759 //============================================================================= 760 //------------------------------Identity--------------------------------------- 761 Node *LShiftLNode::Identity( PhaseTransform *phase ) { 762 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int 763 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this; 764 } 765 766 //------------------------------Ideal------------------------------------------ 767 // If the right input is a constant, and the left input is an add of a 768 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0 769 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) { 770 const Type *t = phase->type( in(2) ); 771 if( t == Type::TOP ) return NULL; // Right input is dead 772 const TypeInt *t2 = t->isa_int(); 773 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant 774 const int con = t2->get_con() & ( BitsPerLong - 1 ); // masked shift count 775 776 if ( con == 0 ) return NULL; // let Identity() handle 0 shift count 777 778 // Left input is an add of a constant? 779 Node *add1 = in(1); 780 int add1_op = add1->Opcode(); 781 if( add1_op == Op_AddL ) { // Left input is an add? 782 // Avoid dead data cycles from dead loops 783 assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" ); 784 const TypeLong *t12 = phase->type(add1->in(2))->isa_long(); 785 if( t12 && t12->is_con() ){ // Left input is an add of a con? 786 // Compute X << con0 787 Node *lsh = phase->transform( new (phase->C, 3) LShiftLNode( add1->in(1), in(2) ) ); 788 // Compute X<<con0 + (con1<<con0) 789 return new (phase->C, 3) AddLNode( lsh, phase->longcon(t12->get_con() << con)); 790 } 791 } 792 793 // Check for "(x>>c0)<<c0" which just masks off low bits 794 if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) && 795 add1->in(2) == in(2) ) 796 // Convert to "(x & -(1<<c0))" 797 return new (phase->C, 3) AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con))); 798 799 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits 800 if( add1_op == Op_AndL ) { 801 Node *add2 = add1->in(1); 802 int add2_op = add2->Opcode(); 803 if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) && 804 add2->in(2) == in(2) ) { 805 // Convert to "(x & (Y<<c0))" 806 Node *y_sh = phase->transform( new (phase->C, 3) LShiftLNode( add1->in(2), in(2) ) ); 807 return new (phase->C, 3) AndLNode( add2->in(1), y_sh ); 808 } 809 } 810 811 // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits 812 // before shifting them away. 813 const jlong bits_mask = ((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) - CONST64(1); 814 if( add1_op == Op_AndL && 815 phase->type(add1->in(2)) == TypeLong::make( bits_mask ) ) 816 return new (phase->C, 3) LShiftLNode( add1->in(1), in(2) ); 817 818 return NULL; 819 } 820 821 //------------------------------Value------------------------------------------ 822 // A LShiftLNode shifts its input2 left by input1 amount. 823 const Type *LShiftLNode::Value( PhaseTransform *phase ) const { 824 const Type *t1 = phase->type( in(1) ); 825 const Type *t2 = phase->type( in(2) ); 826 // Either input is TOP ==> the result is TOP 827 if( t1 == Type::TOP ) return Type::TOP; 828 if( t2 == Type::TOP ) return Type::TOP; 829 830 // Left input is ZERO ==> the result is ZERO. 831 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO; 832 // Shift by zero does nothing 833 if( t2 == TypeInt::ZERO ) return t1; 834 835 // Either input is BOTTOM ==> the result is BOTTOM 836 if( (t1 == TypeLong::LONG) || (t2 == TypeInt::INT) || 837 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) ) 838 return TypeLong::LONG; 839 840 const TypeLong *r1 = t1->is_long(); // Handy access 841 const TypeInt *r2 = t2->is_int(); // Handy access 842 843 if (!r2->is_con()) 844 return TypeLong::LONG; 845 846 uint shift = r2->get_con(); 847 shift &= BitsPerJavaLong - 1; // semantics of Java shifts 848 // Shift by a multiple of 64 does nothing: 849 if (shift == 0) return t1; 850 851 // If the shift is a constant, shift the bounds of the type, 852 // unless this could lead to an overflow. 853 if (!r1->is_con()) { 854 jlong lo = r1->_lo, hi = r1->_hi; 855 if (((lo << shift) >> shift) == lo && 856 ((hi << shift) >> shift) == hi) { 857 // No overflow. The range shifts up cleanly. 858 return TypeLong::make((jlong)lo << (jint)shift, 859 (jlong)hi << (jint)shift, 860 MAX2(r1->_widen,r2->_widen)); 861 } 862 return TypeLong::LONG; 863 } 864 865 return TypeLong::make( (jlong)r1->get_con() << (jint)shift ); 866 } 867 868 //============================================================================= 869 //------------------------------Identity--------------------------------------- 870 Node *RShiftINode::Identity( PhaseTransform *phase ) { 871 const TypeInt *t2 = phase->type(in(2))->isa_int(); 872 if( !t2 ) return this; 873 if ( t2->is_con() && ( t2->get_con() & ( BitsPerInt - 1 ) ) == 0 ) 874 return in(1); 875 876 // Check for useless sign-masking 877 if( in(1)->Opcode() == Op_LShiftI && 878 in(1)->req() == 3 && 879 in(1)->in(2) == in(2) && 880 t2->is_con() ) { 881 uint shift = t2->get_con(); 882 shift &= BitsPerJavaInteger-1; // semantics of Java shifts 883 // Compute masks for which this shifting doesn't change 884 int lo = (-1 << (BitsPerJavaInteger - shift-1)); // FFFF8000 885 int hi = ~lo; // 00007FFF 886 const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int(); 887 if( !t11 ) return this; 888 // Does actual value fit inside of mask? 889 if( lo <= t11->_lo && t11->_hi <= hi ) 890 return in(1)->in(1); // Then shifting is a nop 891 } 892 893 return this; 894 } 895 896 //------------------------------Ideal------------------------------------------ 897 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) { 898 // Inputs may be TOP if they are dead. 899 const TypeInt *t1 = phase->type( in(1) )->isa_int(); 900 if( !t1 ) return NULL; // Left input is an integer 901 const TypeInt *t2 = phase->type( in(2) )->isa_int(); 902 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant 903 const TypeInt *t3; // type of in(1).in(2) 904 int shift = t2->get_con(); 905 shift &= BitsPerJavaInteger-1; // semantics of Java shifts 906 907 if ( shift == 0 ) return NULL; // let Identity() handle 0 shift count 908 909 // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller. 910 // Such expressions arise normally from shift chains like (byte)(x >> 24). 911 const Node *mask = in(1); 912 if( mask->Opcode() == Op_AndI && 913 (t3 = phase->type(mask->in(2))->isa_int()) && 914 t3->is_con() ) { 915 Node *x = mask->in(1); 916 jint maskbits = t3->get_con(); 917 // Convert to "(x >> shift) & (mask >> shift)" 918 Node *shr_nomask = phase->transform( new (phase->C, 3) RShiftINode(mask->in(1), in(2)) ); 919 return new (phase->C, 3) AndINode(shr_nomask, phase->intcon( maskbits >> shift)); 920 } 921 922 // Check for "(short[i] <<16)>>16" which simply sign-extends 923 const Node *shl = in(1); 924 if( shl->Opcode() != Op_LShiftI ) return NULL; 925 926 if( shift == 16 && 927 (t3 = phase->type(shl->in(2))->isa_int()) && 928 t3->is_con(16) ) { 929 Node *ld = shl->in(1); 930 if( ld->Opcode() == Op_LoadS ) { 931 // Sign extension is just useless here. Return a RShiftI of zero instead 932 // returning 'ld' directly. We cannot return an old Node directly as 933 // that is the job of 'Identity' calls and Identity calls only work on 934 // direct inputs ('ld' is an extra Node removed from 'this'). The 935 // combined optimization requires Identity only return direct inputs. 936 set_req(1, ld); 937 set_req(2, phase->intcon(0)); 938 return this; 939 } 940 else if( ld->Opcode() == Op_LoadUS ) 941 // Replace zero-extension-load with sign-extension-load 942 return new (phase->C, 3) LoadSNode( ld->in(MemNode::Control), 943 ld->in(MemNode::Memory), 944 ld->in(MemNode::Address), 945 ld->adr_type()); 946 } 947 948 // Check for "(byte[i] <<24)>>24" which simply sign-extends 949 if( shift == 24 && 950 (t3 = phase->type(shl->in(2))->isa_int()) && 951 t3->is_con(24) ) { 952 Node *ld = shl->in(1); 953 if( ld->Opcode() == Op_LoadB ) { 954 // Sign extension is just useless here 955 set_req(1, ld); 956 set_req(2, phase->intcon(0)); 957 return this; 958 } 959 } 960 961 return NULL; 962 } 963 964 //------------------------------Value------------------------------------------ 965 // A RShiftINode shifts its input2 right by input1 amount. 966 const Type *RShiftINode::Value( PhaseTransform *phase ) const { 967 const Type *t1 = phase->type( in(1) ); 968 const Type *t2 = phase->type( in(2) ); 969 // Either input is TOP ==> the result is TOP 970 if( t1 == Type::TOP ) return Type::TOP; 971 if( t2 == Type::TOP ) return Type::TOP; 972 973 // Left input is ZERO ==> the result is ZERO. 974 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO; 975 // Shift by zero does nothing 976 if( t2 == TypeInt::ZERO ) return t1; 977 978 // Either input is BOTTOM ==> the result is BOTTOM 979 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM) 980 return TypeInt::INT; 981 982 if (t2 == TypeInt::INT) 983 return TypeInt::INT; 984 985 const TypeInt *r1 = t1->is_int(); // Handy access 986 const TypeInt *r2 = t2->is_int(); // Handy access 987 988 // If the shift is a constant, just shift the bounds of the type. 989 // For example, if the shift is 31, we just propagate sign bits. 990 if (r2->is_con()) { 991 uint shift = r2->get_con(); 992 shift &= BitsPerJavaInteger-1; // semantics of Java shifts 993 // Shift by a multiple of 32 does nothing: 994 if (shift == 0) return t1; 995 // Calculate reasonably aggressive bounds for the result. 996 // This is necessary if we are to correctly type things 997 // like (x<<24>>24) == ((byte)x). 998 jint lo = (jint)r1->_lo >> (jint)shift; 999 jint hi = (jint)r1->_hi >> (jint)shift; 1000 assert(lo <= hi, "must have valid bounds"); 1001 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen)); 1002 #ifdef ASSERT 1003 // Make sure we get the sign-capture idiom correct. 1004 if (shift == BitsPerJavaInteger-1) { 1005 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>31 of + is 0"); 1006 if (r1->_hi < 0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1"); 1007 } 1008 #endif 1009 return ti; 1010 } 1011 1012 if( !r1->is_con() || !r2->is_con() ) 1013 return TypeInt::INT; 1014 1015 // Signed shift right 1016 return TypeInt::make( r1->get_con() >> (r2->get_con()&31) ); 1017 } 1018 1019 //============================================================================= 1020 //------------------------------Identity--------------------------------------- 1021 Node *RShiftLNode::Identity( PhaseTransform *phase ) { 1022 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int 1023 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this; 1024 } 1025 1026 //------------------------------Value------------------------------------------ 1027 // A RShiftLNode shifts its input2 right by input1 amount. 1028 const Type *RShiftLNode::Value( PhaseTransform *phase ) const { 1029 const Type *t1 = phase->type( in(1) ); 1030 const Type *t2 = phase->type( in(2) ); 1031 // Either input is TOP ==> the result is TOP 1032 if( t1 == Type::TOP ) return Type::TOP; 1033 if( t2 == Type::TOP ) return Type::TOP; 1034 1035 // Left input is ZERO ==> the result is ZERO. 1036 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO; 1037 // Shift by zero does nothing 1038 if( t2 == TypeInt::ZERO ) return t1; 1039 1040 // Either input is BOTTOM ==> the result is BOTTOM 1041 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM) 1042 return TypeLong::LONG; 1043 1044 if (t2 == TypeInt::INT) 1045 return TypeLong::LONG; 1046 1047 const TypeLong *r1 = t1->is_long(); // Handy access 1048 const TypeInt *r2 = t2->is_int (); // Handy access 1049 1050 // If the shift is a constant, just shift the bounds of the type. 1051 // For example, if the shift is 63, we just propagate sign bits. 1052 if (r2->is_con()) { 1053 uint shift = r2->get_con(); 1054 shift &= (2*BitsPerJavaInteger)-1; // semantics of Java shifts 1055 // Shift by a multiple of 64 does nothing: 1056 if (shift == 0) return t1; 1057 // Calculate reasonably aggressive bounds for the result. 1058 // This is necessary if we are to correctly type things 1059 // like (x<<24>>24) == ((byte)x). 1060 jlong lo = (jlong)r1->_lo >> (jlong)shift; 1061 jlong hi = (jlong)r1->_hi >> (jlong)shift; 1062 assert(lo <= hi, "must have valid bounds"); 1063 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen)); 1064 #ifdef ASSERT 1065 // Make sure we get the sign-capture idiom correct. 1066 if (shift == (2*BitsPerJavaInteger)-1) { 1067 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>63 of + is 0"); 1068 if (r1->_hi < 0) assert(tl == TypeLong::MINUS_1, ">>63 of - is -1"); 1069 } 1070 #endif 1071 return tl; 1072 } 1073 1074 return TypeLong::LONG; // Give up 1075 } 1076 1077 //============================================================================= 1078 //------------------------------Identity--------------------------------------- 1079 Node *URShiftINode::Identity( PhaseTransform *phase ) { 1080 const TypeInt *ti = phase->type( in(2) )->isa_int(); 1081 if ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerInt - 1 ) ) == 0 ) return in(1); 1082 1083 // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x". 1084 // Happens during new-array length computation. 1085 // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)] 1086 Node *add = in(1); 1087 if( add->Opcode() == Op_AddI ) { 1088 const TypeInt *t2 = phase->type(add->in(2))->isa_int(); 1089 if( t2 && t2->is_con(wordSize - 1) && 1090 add->in(1)->Opcode() == Op_LShiftI ) { 1091 // Check that shift_counts are LogBytesPerWord 1092 Node *lshift_count = add->in(1)->in(2); 1093 const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int(); 1094 if( t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) && 1095 t_lshift_count == phase->type(in(2)) ) { 1096 Node *x = add->in(1)->in(1); 1097 const TypeInt *t_x = phase->type(x)->isa_int(); 1098 if( t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord) ) { 1099 return x; 1100 } 1101 } 1102 } 1103 } 1104 1105 return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this; 1106 } 1107 1108 //------------------------------Ideal------------------------------------------ 1109 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) { 1110 const TypeInt *t2 = phase->type( in(2) )->isa_int(); 1111 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant 1112 const int con = t2->get_con() & 31; // Shift count is always masked 1113 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count 1114 // We'll be wanting the right-shift amount as a mask of that many bits 1115 const int mask = right_n_bits(BitsPerJavaInteger - con); 1116 1117 int in1_op = in(1)->Opcode(); 1118 1119 // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32 1120 if( in1_op == Op_URShiftI ) { 1121 const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int(); 1122 if( t12 && t12->is_con() ) { // Right input is a constant 1123 assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" ); 1124 const int con2 = t12->get_con() & 31; // Shift count is always masked 1125 const int con3 = con+con2; 1126 if( con3 < 32 ) // Only merge shifts if total is < 32 1127 return new (phase->C, 3) URShiftINode( in(1)->in(1), phase->intcon(con3) ); 1128 } 1129 } 1130 1131 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z 1132 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z". 1133 // If Q is "X << z" the rounding is useless. Look for patterns like 1134 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask. 1135 Node *add = in(1); 1136 if( in1_op == Op_AddI ) { 1137 Node *lshl = add->in(1); 1138 if( lshl->Opcode() == Op_LShiftI && 1139 phase->type(lshl->in(2)) == t2 ) { 1140 Node *y_z = phase->transform( new (phase->C, 3) URShiftINode(add->in(2),in(2)) ); 1141 Node *sum = phase->transform( new (phase->C, 3) AddINode( lshl->in(1), y_z ) ); 1142 return new (phase->C, 3) AndINode( sum, phase->intcon(mask) ); 1143 } 1144 } 1145 1146 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z) 1147 // This shortens the mask. Also, if we are extracting a high byte and 1148 // storing it to a buffer, the mask will be removed completely. 1149 Node *andi = in(1); 1150 if( in1_op == Op_AndI ) { 1151 const TypeInt *t3 = phase->type( andi->in(2) )->isa_int(); 1152 if( t3 && t3->is_con() ) { // Right input is a constant 1153 jint mask2 = t3->get_con(); 1154 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help) 1155 Node *newshr = phase->transform( new (phase->C, 3) URShiftINode(andi->in(1), in(2)) ); 1156 return new (phase->C, 3) AndINode(newshr, phase->intcon(mask2)); 1157 // The negative values are easier to materialize than positive ones. 1158 // A typical case from address arithmetic is ((x & ~15) >> 4). 1159 // It's better to change that to ((x >> 4) & ~0) versus 1160 // ((x >> 4) & 0x0FFFFFFF). The difference is greatest in LP64. 1161 } 1162 } 1163 1164 // Check for "(X << z ) >>> z" which simply zero-extends 1165 Node *shl = in(1); 1166 if( in1_op == Op_LShiftI && 1167 phase->type(shl->in(2)) == t2 ) 1168 return new (phase->C, 3) AndINode( shl->in(1), phase->intcon(mask) ); 1169 1170 return NULL; 1171 } 1172 1173 //------------------------------Value------------------------------------------ 1174 // A URShiftINode shifts its input2 right by input1 amount. 1175 const Type *URShiftINode::Value( PhaseTransform *phase ) const { 1176 // (This is a near clone of RShiftINode::Value.) 1177 const Type *t1 = phase->type( in(1) ); 1178 const Type *t2 = phase->type( in(2) ); 1179 // Either input is TOP ==> the result is TOP 1180 if( t1 == Type::TOP ) return Type::TOP; 1181 if( t2 == Type::TOP ) return Type::TOP; 1182 1183 // Left input is ZERO ==> the result is ZERO. 1184 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO; 1185 // Shift by zero does nothing 1186 if( t2 == TypeInt::ZERO ) return t1; 1187 1188 // Either input is BOTTOM ==> the result is BOTTOM 1189 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM) 1190 return TypeInt::INT; 1191 1192 if (t2 == TypeInt::INT) 1193 return TypeInt::INT; 1194 1195 const TypeInt *r1 = t1->is_int(); // Handy access 1196 const TypeInt *r2 = t2->is_int(); // Handy access 1197 1198 if (r2->is_con()) { 1199 uint shift = r2->get_con(); 1200 shift &= BitsPerJavaInteger-1; // semantics of Java shifts 1201 // Shift by a multiple of 32 does nothing: 1202 if (shift == 0) return t1; 1203 // Calculate reasonably aggressive bounds for the result. 1204 jint lo = (juint)r1->_lo >> (juint)shift; 1205 jint hi = (juint)r1->_hi >> (juint)shift; 1206 if (r1->_hi >= 0 && r1->_lo < 0) { 1207 // If the type has both negative and positive values, 1208 // there are two separate sub-domains to worry about: 1209 // The positive half and the negative half. 1210 jint neg_lo = lo; 1211 jint neg_hi = (juint)-1 >> (juint)shift; 1212 jint pos_lo = (juint) 0 >> (juint)shift; 1213 jint pos_hi = hi; 1214 lo = MIN2(neg_lo, pos_lo); // == 0 1215 hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift; 1216 } 1217 assert(lo <= hi, "must have valid bounds"); 1218 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen)); 1219 #ifdef ASSERT 1220 // Make sure we get the sign-capture idiom correct. 1221 if (shift == BitsPerJavaInteger-1) { 1222 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>>31 of + is 0"); 1223 if (r1->_hi < 0) assert(ti == TypeInt::ONE, ">>>31 of - is +1"); 1224 } 1225 #endif 1226 return ti; 1227 } 1228 1229 // 1230 // Do not support shifted oops in info for GC 1231 // 1232 // else if( t1->base() == Type::InstPtr ) { 1233 // 1234 // const TypeInstPtr *o = t1->is_instptr(); 1235 // if( t1->singleton() ) 1236 // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift ); 1237 // } 1238 // else if( t1->base() == Type::KlassPtr ) { 1239 // const TypeKlassPtr *o = t1->is_klassptr(); 1240 // if( t1->singleton() ) 1241 // return TypeInt::make( ((uint32)o->const_oop() + o->_offset) >> shift ); 1242 // } 1243 1244 return TypeInt::INT; 1245 } 1246 1247 //============================================================================= 1248 //------------------------------Identity--------------------------------------- 1249 Node *URShiftLNode::Identity( PhaseTransform *phase ) { 1250 const TypeInt *ti = phase->type( in(2) )->isa_int(); // shift count is an int 1251 return ( ti && ti->is_con() && ( ti->get_con() & ( BitsPerLong - 1 ) ) == 0 ) ? in(1) : this; 1252 } 1253 1254 //------------------------------Ideal------------------------------------------ 1255 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) { 1256 const TypeInt *t2 = phase->type( in(2) )->isa_int(); 1257 if( !t2 || !t2->is_con() ) return NULL; // Right input is a constant 1258 const int con = t2->get_con() & ( BitsPerLong - 1 ); // Shift count is always masked 1259 if ( con == 0 ) return NULL; // let Identity() handle a 0 shift count 1260 // note: mask computation below does not work for 0 shift count 1261 // We'll be wanting the right-shift amount as a mask of that many bits 1262 const jlong mask = (((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - con)) -1); 1263 1264 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z 1265 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z". 1266 // If Q is "X << z" the rounding is useless. Look for patterns like 1267 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask. 1268 Node *add = in(1); 1269 if( add->Opcode() == Op_AddL ) { 1270 Node *lshl = add->in(1); 1271 if( lshl->Opcode() == Op_LShiftL && 1272 phase->type(lshl->in(2)) == t2 ) { 1273 Node *y_z = phase->transform( new (phase->C, 3) URShiftLNode(add->in(2),in(2)) ); 1274 Node *sum = phase->transform( new (phase->C, 3) AddLNode( lshl->in(1), y_z ) ); 1275 return new (phase->C, 3) AndLNode( sum, phase->longcon(mask) ); 1276 } 1277 } 1278 1279 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z) 1280 // This shortens the mask. Also, if we are extracting a high byte and 1281 // storing it to a buffer, the mask will be removed completely. 1282 Node *andi = in(1); 1283 if( andi->Opcode() == Op_AndL ) { 1284 const TypeLong *t3 = phase->type( andi->in(2) )->isa_long(); 1285 if( t3 && t3->is_con() ) { // Right input is a constant 1286 jlong mask2 = t3->get_con(); 1287 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help) 1288 Node *newshr = phase->transform( new (phase->C, 3) URShiftLNode(andi->in(1), in(2)) ); 1289 return new (phase->C, 3) AndLNode(newshr, phase->longcon(mask2)); 1290 } 1291 } 1292 1293 // Check for "(X << z ) >>> z" which simply zero-extends 1294 Node *shl = in(1); 1295 if( shl->Opcode() == Op_LShiftL && 1296 phase->type(shl->in(2)) == t2 ) 1297 return new (phase->C, 3) AndLNode( shl->in(1), phase->longcon(mask) ); 1298 1299 return NULL; 1300 } 1301 1302 //------------------------------Value------------------------------------------ 1303 // A URShiftINode shifts its input2 right by input1 amount. 1304 const Type *URShiftLNode::Value( PhaseTransform *phase ) const { 1305 // (This is a near clone of RShiftLNode::Value.) 1306 const Type *t1 = phase->type( in(1) ); 1307 const Type *t2 = phase->type( in(2) ); 1308 // Either input is TOP ==> the result is TOP 1309 if( t1 == Type::TOP ) return Type::TOP; 1310 if( t2 == Type::TOP ) return Type::TOP; 1311 1312 // Left input is ZERO ==> the result is ZERO. 1313 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO; 1314 // Shift by zero does nothing 1315 if( t2 == TypeInt::ZERO ) return t1; 1316 1317 // Either input is BOTTOM ==> the result is BOTTOM 1318 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM) 1319 return TypeLong::LONG; 1320 1321 if (t2 == TypeInt::INT) 1322 return TypeLong::LONG; 1323 1324 const TypeLong *r1 = t1->is_long(); // Handy access 1325 const TypeInt *r2 = t2->is_int (); // Handy access 1326 1327 if (r2->is_con()) { 1328 uint shift = r2->get_con(); 1329 shift &= BitsPerJavaLong - 1; // semantics of Java shifts 1330 // Shift by a multiple of 64 does nothing: 1331 if (shift == 0) return t1; 1332 // Calculate reasonably aggressive bounds for the result. 1333 jlong lo = (julong)r1->_lo >> (juint)shift; 1334 jlong hi = (julong)r1->_hi >> (juint)shift; 1335 if (r1->_hi >= 0 && r1->_lo < 0) { 1336 // If the type has both negative and positive values, 1337 // there are two separate sub-domains to worry about: 1338 // The positive half and the negative half. 1339 jlong neg_lo = lo; 1340 jlong neg_hi = (julong)-1 >> (juint)shift; 1341 jlong pos_lo = (julong) 0 >> (juint)shift; 1342 jlong pos_hi = hi; 1343 //lo = MIN2(neg_lo, pos_lo); // == 0 1344 lo = neg_lo < pos_lo ? neg_lo : pos_lo; 1345 //hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift; 1346 hi = neg_hi > pos_hi ? neg_hi : pos_hi; 1347 } 1348 assert(lo <= hi, "must have valid bounds"); 1349 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen)); 1350 #ifdef ASSERT 1351 // Make sure we get the sign-capture idiom correct. 1352 if (shift == BitsPerJavaLong - 1) { 1353 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>>63 of + is 0"); 1354 if (r1->_hi < 0) assert(tl == TypeLong::ONE, ">>>63 of - is +1"); 1355 } 1356 #endif 1357 return tl; 1358 } 1359 1360 return TypeLong::LONG; // Give up 1361 }