src/cpu/x86/vm/stubGenerator_x86_32.cpp

rev 8344 : 8076276: Add support for AVX512
Reviewed-by: kvn, roland
Contributed-by: michael.c.berg@intel.com

*** 164,173 ****
--- 164,180 ----
  
      // save rdi, rsi, & rbx, according to C calling conventions
      __ movptr(saved_rdi, rdi);
      __ movptr(saved_rsi, rsi);
      __ movptr(saved_rbx, rbx);
+ 
+     // provide initial value for required masks
+     if (UseAVX > 2) {
+       __ movl(rbx, 0xffff);
+       __ kmovdl(k1, rbx);
+     }
+ 
      // save and initialize %mxcsr
      if (sse_save) {
        Label skip_ldmx;
        __ stmxcsr(mxcsr_save);
        __ movl(rax, mxcsr_save);
*** 792,802 ****
      __ jmpb(L_copy_64_bytes);
      __ align(OptoLoopAlignment);
    __ BIND(L_copy_64_bytes_loop);
  
      if (UseUnalignedLoadStores) {
!       if (UseAVX >= 2) {
          __ vmovdqu(xmm0, Address(from,  0));
          __ vmovdqu(Address(from, to_from, Address::times_1,  0), xmm0);
          __ vmovdqu(xmm1, Address(from, 32));
          __ vmovdqu(Address(from, to_from, Address::times_1, 32), xmm1);
        } else {
--- 799,812 ----
      __ jmpb(L_copy_64_bytes);
      __ align(OptoLoopAlignment);
    __ BIND(L_copy_64_bytes_loop);
  
      if (UseUnalignedLoadStores) {
!       if (UseAVX > 2) {
!         __ evmovdqu(xmm0, Address(from, 0), Assembler::AVX_512bit);
!         __ evmovdqu(Address(from, to_from, Address::times_1, 0), xmm0, Assembler::AVX_512bit);
!       } else if (UseAVX == 2) {
          __ vmovdqu(xmm0, Address(from,  0));
          __ vmovdqu(Address(from, to_from, Address::times_1,  0), xmm0);
          __ vmovdqu(xmm1, Address(from, 32));
          __ vmovdqu(Address(from, to_from, Address::times_1, 32), xmm1);
        } else {
*** 831,841 ****
      __ addl(from, 64);
    __ BIND(L_copy_64_bytes);
      __ subl(qword_count, 8);
      __ jcc(Assembler::greaterEqual, L_copy_64_bytes_loop);
  
!     if (UseUnalignedLoadStores && (UseAVX >= 2)) {
        // clean upper bits of YMM registers
        __ vpxor(xmm0, xmm0);
        __ vpxor(xmm1, xmm1);
      }
      __ addl(qword_count, 8);
--- 841,851 ----
      __ addl(from, 64);
    __ BIND(L_copy_64_bytes);
      __ subl(qword_count, 8);
      __ jcc(Assembler::greaterEqual, L_copy_64_bytes_loop);
  
!     if (UseUnalignedLoadStores && (UseAVX == 2)) {
        // clean upper bits of YMM registers
        __ vpxor(xmm0, xmm0);
        __ vpxor(xmm1, xmm1);
      }
      __ addl(qword_count, 8);