22  *
  23  */
  24 
  25 #ifndef CPU_X86_VM_VMREG_X86_INLINE_HPP
  26 #define CPU_X86_VM_VMREG_X86_INLINE_HPP
  27 
  28 inline VMReg RegisterImpl::as_VMReg() {
  29   if( this==noreg ) return VMRegImpl::Bad();
  30 #ifdef AMD64
  31   return VMRegImpl::as_VMReg(encoding() << 1 );
  32 #else
  33   return VMRegImpl::as_VMReg(encoding() );
  34 #endif // AMD64
  35 }
  36 
  37 inline VMReg FloatRegisterImpl::as_VMReg() {
  38   return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr);
  39 }
  40 
  41 inline VMReg XMMRegisterImpl::as_VMReg() {
  42   return VMRegImpl::as_VMReg((encoding() << 3) + ConcreteRegisterImpl::max_fpr);




  43 }
  44 
  45 #endif // CPU_X86_VM_VMREG_X86_INLINE_HPP

  22  *
  23  */
  24 
  25 #ifndef CPU_X86_VM_VMREG_X86_INLINE_HPP
  26 #define CPU_X86_VM_VMREG_X86_INLINE_HPP
  27 
  28 inline VMReg RegisterImpl::as_VMReg() {
  29   if( this==noreg ) return VMRegImpl::Bad();
  30 #ifdef AMD64
  31   return VMRegImpl::as_VMReg(encoding() << 1 );
  32 #else
  33   return VMRegImpl::as_VMReg(encoding() );
  34 #endif // AMD64
  35 }
  36 
  37 inline VMReg FloatRegisterImpl::as_VMReg() {
  38   return VMRegImpl::as_VMReg((encoding() << 1) + ConcreteRegisterImpl::max_gpr);
  39 }
  40 
  41 inline VMReg XMMRegisterImpl::as_VMReg() {
  42   return VMRegImpl::as_VMReg((encoding() << 4) + ConcreteRegisterImpl::max_fpr);
  43 }
  44 
  45 inline VMReg KRegisterImpl::as_VMReg() {
  46   return VMRegImpl::as_VMReg(encoding() + ConcreteRegisterImpl::max_xmm);
  47 }
  48 
  49 #endif // CPU_X86_VM_VMREG_X86_INLINE_HPP