src/share/vm/opto/chaitin.cpp
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8076276 Cdiff src/share/vm/opto/chaitin.cpp
src/share/vm/opto/chaitin.cpp
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rev 8344 : 8076276: Add support for AVX512
Reviewed-by: kvn, roland
Contributed-by: michael.c.berg@intel.com
*** 905,914 ****
--- 905,921 ----
assert(RegMask::num_registers(Op_VecY) == RegMask::SlotsPerVecY, "sanity");
assert(lrgmask.is_aligned_sets(RegMask::SlotsPerVecY), "vector should be aligned");
lrg.set_num_regs(RegMask::SlotsPerVecY);
lrg.set_reg_pressure(1);
break;
+ case Op_VecZ:
+ assert(Matcher::vector_size_supported(T_FLOAT,RegMask::SlotsPerVecZ), "sanity");
+ assert(RegMask::num_registers(Op_VecZ) == RegMask::SlotsPerVecZ, "sanity");
+ assert(lrgmask.is_aligned_sets(RegMask::SlotsPerVecZ), "vector should be aligned");
+ lrg.set_num_regs(RegMask::SlotsPerVecZ);
+ lrg.set_reg_pressure(1);
+ break;
default:
ShouldNotReachHere();
}
}
*** 1512,1522 ****
// to make. In this case, the mask has more bits in it than the colors
// chosen. Restrict the mask to just what was picked.
int n_regs = lrg->num_regs();
assert(!lrg->_is_vector || !lrg->_fat_proj, "sanity");
if (n_regs == 1 || !lrg->_fat_proj) {
! assert(!lrg->_is_vector || n_regs <= RegMask::SlotsPerVecY, "sanity");
lrg->Clear(); // Clear the mask
lrg->Insert(reg); // Set regmask to match selected reg
// For vectors and pairs, also insert the low bit of the pair
for (int i = 1; i < n_regs; i++)
lrg->Insert(OptoReg::add(reg,-i));
--- 1519,1529 ----
// to make. In this case, the mask has more bits in it than the colors
// chosen. Restrict the mask to just what was picked.
int n_regs = lrg->num_regs();
assert(!lrg->_is_vector || !lrg->_fat_proj, "sanity");
if (n_regs == 1 || !lrg->_fat_proj) {
! assert(!lrg->_is_vector || n_regs <= RegMask::SlotsPerVecZ, "sanity");
lrg->Clear(); // Clear the mask
lrg->Insert(reg); // Set regmask to match selected reg
// For vectors and pairs, also insert the low bit of the pair
for (int i = 1; i < n_regs; i++)
lrg->Insert(OptoReg::add(reg,-i));
src/share/vm/opto/chaitin.cpp
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