1 /* 2 * Copyright (c) 1997, 2014, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #ifndef SHARE_VM_OPTO_REGMASK_HPP 26 #define SHARE_VM_OPTO_REGMASK_HPP 27 28 #include "code/vmreg.hpp" 29 #include "opto/optoreg.hpp" 30 31 // Some fun naming (textual) substitutions: 32 // 33 // RegMask::get_low_elem() ==> RegMask::find_first_elem() 34 // RegMask::Special ==> RegMask::Empty 35 // RegMask::_flags ==> RegMask::is_AllStack() 36 // RegMask::operator<<=() ==> RegMask::Insert() 37 // RegMask::operator>>=() ==> RegMask::Remove() 38 // RegMask::Union() ==> RegMask::OR 39 // RegMask::Inter() ==> RegMask::AND 40 // 41 // OptoRegister::RegName ==> OptoReg::Name 42 // 43 // OptoReg::stack0() ==> _last_Mach_Reg or ZERO in core version 44 // 45 // numregs in chaitin ==> proper degree in chaitin 46 47 //-------------Non-zero bit search methods used by RegMask--------------------- 48 // Find lowest 1, or return 32 if empty 49 int find_lowest_bit( uint32_t mask ); 50 // Find highest 1, or return 32 if empty 51 int find_hihghest_bit( uint32_t mask ); 52 53 //------------------------------RegMask---------------------------------------- 54 // The ADL file describes how to print the machine-specific registers, as well 55 // as any notion of register classes. We provide a register mask, which is 56 // just a collection of Register numbers. 57 58 // The ADLC defines 2 macros, RM_SIZE and FORALL_BODY. 59 // RM_SIZE is the size of a register mask in words. 60 // FORALL_BODY replicates a BODY macro once per word in the register mask. 61 // The usage is somewhat clumsy and limited to the regmask.[h,c]pp files. 62 // However, it means the ADLC can redefine the unroll macro and all loops 63 // over register masks will be unrolled by the correct amount. 64 65 class RegMask VALUE_OBJ_CLASS_SPEC { 66 union { 67 double _dummy_force_double_alignment[RM_SIZE>>1]; 68 // Array of Register Mask bits. This array is large enough to cover 69 // all the machine registers and all parameters that need to be passed 70 // on the stack (stack registers) up to some interesting limit. Methods 71 // that need more parameters will NOT be compiled. On Intel, the limit 72 // is something like 90+ parameters. 73 int _A[RM_SIZE]; 74 }; 75 76 enum { 77 _WordBits = BitsPerInt, 78 _LogWordBits = LogBitsPerInt, 79 _RM_SIZE = RM_SIZE // local constant, imported, then hidden by #undef 80 }; 81 82 public: 83 enum { CHUNK_SIZE = RM_SIZE*_WordBits }; 84 85 // SlotsPerLong is 2, since slots are 32 bits and longs are 64 bits. 86 // Also, consider the maximum alignment size for a normally allocated 87 // value. Since we allocate register pairs but not register quads (at 88 // present), this alignment is SlotsPerLong (== 2). A normally 89 // aligned allocated register is either a single register, or a pair 90 // of adjacent registers, the lower-numbered being even. 91 // See also is_aligned_Pairs() below, and the padding added before 92 // Matcher::_new_SP to keep allocated pairs aligned properly. 93 // If we ever go to quad-word allocations, SlotsPerQuad will become 94 // the controlling alignment constraint. Note that this alignment 95 // requirement is internal to the allocator, and independent of any 96 // particular platform. 97 enum { SlotsPerLong = 2, 98 SlotsPerVecS = 1, 99 SlotsPerVecD = 2, 100 SlotsPerVecX = 4, 101 SlotsPerVecY = 8 }; 102 103 // A constructor only used by the ADLC output. All mask fields are filled 104 // in directly. Calls to this look something like RM(1,2,3,4); 105 RegMask( 106 # define BODY(I) int a##I, 107 FORALL_BODY 108 # undef BODY 109 int dummy = 0 ) { 110 # define BODY(I) _A[I] = a##I; 111 FORALL_BODY 112 # undef BODY 113 } 114 115 // Handy copying constructor 116 RegMask( RegMask *rm ) { 117 # define BODY(I) _A[I] = rm->_A[I]; 118 FORALL_BODY 119 # undef BODY 120 } 121 122 // Construct an empty mask 123 RegMask( ) { Clear(); } 124 125 // Construct a mask with a single bit 126 RegMask( OptoReg::Name reg ) { Clear(); Insert(reg); } 127 128 // Check for register being in mask 129 int Member( OptoReg::Name reg ) const { 130 assert( reg < CHUNK_SIZE, "" ); 131 return _A[reg>>_LogWordBits] & (1<<(reg&(_WordBits-1))); 132 } 133 134 // The last bit in the register mask indicates that the mask should repeat 135 // indefinitely with ONE bits. Returns TRUE if mask is infinite or 136 // unbounded in size. Returns FALSE if mask is finite size. 137 int is_AllStack() const { return _A[RM_SIZE-1] >> (_WordBits-1); } 138 139 // Work around an -xO3 optimization problme in WS6U1. The old way: 140 // void set_AllStack() { _A[RM_SIZE-1] |= (1<<(_WordBits-1)); } 141 // will cause _A[RM_SIZE-1] to be clobbered, not updated when set_AllStack() 142 // follows an Insert() loop, like the one found in init_spill_mask(). Using 143 // Insert() instead works because the index into _A in computed instead of 144 // constant. See bug 4665841. 145 void set_AllStack() { Insert(OptoReg::Name(CHUNK_SIZE-1)); } 146 147 // Test for being a not-empty mask. 148 int is_NotEmpty( ) const { 149 int tmp = 0; 150 # define BODY(I) tmp |= _A[I]; 151 FORALL_BODY 152 # undef BODY 153 return tmp; 154 } 155 156 // Find lowest-numbered register from mask, or BAD if mask is empty. 157 OptoReg::Name find_first_elem() const { 158 int base, bits; 159 # define BODY(I) if( (bits = _A[I]) != 0 ) base = I<<_LogWordBits; else 160 FORALL_BODY 161 # undef BODY 162 { base = OptoReg::Bad; bits = 1<<0; } 163 return OptoReg::Name(base + find_lowest_bit(bits)); 164 } 165 // Get highest-numbered register from mask, or BAD if mask is empty. 166 OptoReg::Name find_last_elem() const { 167 int base, bits; 168 # define BODY(I) if( (bits = _A[RM_SIZE-1-I]) != 0 ) base = (RM_SIZE-1-I)<<_LogWordBits; else 169 FORALL_BODY 170 # undef BODY 171 { base = OptoReg::Bad; bits = 1<<0; } 172 return OptoReg::Name(base + find_hihghest_bit(bits)); 173 } 174 175 // Find the lowest-numbered register pair in the mask. Return the 176 // HIGHEST register number in the pair, or BAD if no pairs. 177 // Assert that the mask contains only bit pairs. 178 OptoReg::Name find_first_pair() const; 179 180 // Clear out partial bits; leave only aligned adjacent bit pairs. 181 void clear_to_pairs(); 182 // Smear out partial bits; leave only aligned adjacent bit pairs. 183 void smear_to_pairs(); 184 // Verify that the mask contains only aligned adjacent bit pairs 185 void verify_pairs() const { assert( is_aligned_pairs(), "mask is not aligned, adjacent pairs" ); } 186 // Test that the mask contains only aligned adjacent bit pairs 187 bool is_aligned_pairs() const; 188 189 // mask is a pair of misaligned registers 190 bool is_misaligned_pair() const { return Size()==2 && !is_aligned_pairs(); } 191 // Test for single register 192 int is_bound1() const; 193 // Test for a single adjacent pair 194 int is_bound_pair() const; 195 // Test for a single adjacent set of ideal register's size. 196 int is_bound(uint ireg) const { 197 if (is_vector(ireg)) { 198 if (is_bound_set(num_registers(ireg))) 199 return true; 200 } else if (is_bound1() || is_bound_pair()) { 201 return true; 202 } 203 return false; 204 } 205 206 // Find the lowest-numbered register set in the mask. Return the 207 // HIGHEST register number in the set, or BAD if no sets. 208 // Assert that the mask contains only bit sets. 209 OptoReg::Name find_first_set(const int size) const; 210 211 // Clear out partial bits; leave only aligned adjacent bit sets of size. 212 void clear_to_sets(const int size); 213 // Smear out partial bits to aligned adjacent bit sets. 214 void smear_to_sets(const int size); 215 // Verify that the mask contains only aligned adjacent bit sets 216 void verify_sets(int size) const { assert(is_aligned_sets(size), "mask is not aligned, adjacent sets"); } 217 // Test that the mask contains only aligned adjacent bit sets 218 bool is_aligned_sets(const int size) const; 219 220 // mask is a set of misaligned registers 221 bool is_misaligned_set(int size) const { return (int)Size()==size && !is_aligned_sets(size);} 222 223 // Test for a single adjacent set 224 int is_bound_set(const int size) const; 225 226 static bool is_vector(uint ireg); 227 static int num_registers(uint ireg); 228 229 // Fast overlap test. Non-zero if any registers in common. 230 int overlap( const RegMask &rm ) const { 231 return 232 # define BODY(I) (_A[I] & rm._A[I]) | 233 FORALL_BODY 234 # undef BODY 235 0 ; 236 } 237 238 // Special test for register pressure based splitting 239 // UP means register only, Register plus stack, or stack only is DOWN 240 bool is_UP() const; 241 242 // Clear a register mask 243 void Clear( ) { 244 # define BODY(I) _A[I] = 0; 245 FORALL_BODY 246 # undef BODY 247 } 248 249 // Fill a register mask with 1's 250 void Set_All( ) { 251 # define BODY(I) _A[I] = -1; 252 FORALL_BODY 253 # undef BODY 254 } 255 256 // Insert register into mask 257 void Insert( OptoReg::Name reg ) { 258 assert( reg < CHUNK_SIZE, "" ); 259 _A[reg>>_LogWordBits] |= (1<<(reg&(_WordBits-1))); 260 } 261 262 // Remove register from mask 263 void Remove( OptoReg::Name reg ) { 264 assert( reg < CHUNK_SIZE, "" ); 265 _A[reg>>_LogWordBits] &= ~(1<<(reg&(_WordBits-1))); 266 } 267 268 // OR 'rm' into 'this' 269 void OR( const RegMask &rm ) { 270 # define BODY(I) this->_A[I] |= rm._A[I]; 271 FORALL_BODY 272 # undef BODY 273 } 274 275 // AND 'rm' into 'this' 276 void AND( const RegMask &rm ) { 277 # define BODY(I) this->_A[I] &= rm._A[I]; 278 FORALL_BODY 279 # undef BODY 280 } 281 282 // Subtract 'rm' from 'this' 283 void SUBTRACT( const RegMask &rm ) { 284 # define BODY(I) _A[I] &= ~rm._A[I]; 285 FORALL_BODY 286 # undef BODY 287 } 288 289 // Compute size of register mask: number of bits 290 uint Size() const; 291 292 #ifndef PRODUCT 293 void print() const { dump(); } 294 void dump(outputStream *st = tty) const; // Print a mask 295 #endif 296 297 static const RegMask Empty; // Common empty mask 298 299 static bool can_represent(OptoReg::Name reg) { 300 // NOTE: -1 in computation reflects the usage of the last 301 // bit of the regmask as an infinite stack flag and 302 // -7 is to keep mask aligned for largest value (VecY). 303 return (int)reg < (int)(CHUNK_SIZE-1); 304 } 305 static bool can_represent_arg(OptoReg::Name reg) { 306 // NOTE: -SlotsPerVecY in computation reflects the need 307 // to keep mask aligned for largest value (VecY). 308 return (int)reg < (int)(CHUNK_SIZE-SlotsPerVecY); 309 } 310 }; 311 312 // Do not use this constant directly in client code! 313 #undef RM_SIZE 314 315 #endif // SHARE_VM_OPTO_REGMASK_HPP