81
82 public:
83 enum { CHUNK_SIZE = RM_SIZE*_WordBits };
84
85 // SlotsPerLong is 2, since slots are 32 bits and longs are 64 bits.
86 // Also, consider the maximum alignment size for a normally allocated
87 // value. Since we allocate register pairs but not register quads (at
88 // present), this alignment is SlotsPerLong (== 2). A normally
89 // aligned allocated register is either a single register, or a pair
90 // of adjacent registers, the lower-numbered being even.
91 // See also is_aligned_Pairs() below, and the padding added before
92 // Matcher::_new_SP to keep allocated pairs aligned properly.
93 // If we ever go to quad-word allocations, SlotsPerQuad will become
94 // the controlling alignment constraint. Note that this alignment
95 // requirement is internal to the allocator, and independent of any
96 // particular platform.
97 enum { SlotsPerLong = 2,
98 SlotsPerVecS = 1,
99 SlotsPerVecD = 2,
100 SlotsPerVecX = 4,
101 SlotsPerVecY = 8 };
102
103 // A constructor only used by the ADLC output. All mask fields are filled
104 // in directly. Calls to this look something like RM(1,2,3,4);
105 RegMask(
106 # define BODY(I) int a##I,
107 FORALL_BODY
108 # undef BODY
109 int dummy = 0 ) {
110 # define BODY(I) _A[I] = a##I;
111 FORALL_BODY
112 # undef BODY
113 }
114
115 // Handy copying constructor
116 RegMask( RegMask *rm ) {
117 # define BODY(I) _A[I] = rm->_A[I];
118 FORALL_BODY
119 # undef BODY
120 }
121
282 // Subtract 'rm' from 'this'
283 void SUBTRACT( const RegMask &rm ) {
284 # define BODY(I) _A[I] &= ~rm._A[I];
285 FORALL_BODY
286 # undef BODY
287 }
288
289 // Compute size of register mask: number of bits
290 uint Size() const;
291
292 #ifndef PRODUCT
293 void print() const { dump(); }
294 void dump(outputStream *st = tty) const; // Print a mask
295 #endif
296
297 static const RegMask Empty; // Common empty mask
298
299 static bool can_represent(OptoReg::Name reg) {
300 // NOTE: -1 in computation reflects the usage of the last
301 // bit of the regmask as an infinite stack flag and
302 // -7 is to keep mask aligned for largest value (VecY).
303 return (int)reg < (int)(CHUNK_SIZE-1);
304 }
305 static bool can_represent_arg(OptoReg::Name reg) {
306 // NOTE: -SlotsPerVecY in computation reflects the need
307 // to keep mask aligned for largest value (VecY).
308 return (int)reg < (int)(CHUNK_SIZE-SlotsPerVecY);
309 }
310 };
311
312 // Do not use this constant directly in client code!
313 #undef RM_SIZE
314
315 #endif // SHARE_VM_OPTO_REGMASK_HPP
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81
82 public:
83 enum { CHUNK_SIZE = RM_SIZE*_WordBits };
84
85 // SlotsPerLong is 2, since slots are 32 bits and longs are 64 bits.
86 // Also, consider the maximum alignment size for a normally allocated
87 // value. Since we allocate register pairs but not register quads (at
88 // present), this alignment is SlotsPerLong (== 2). A normally
89 // aligned allocated register is either a single register, or a pair
90 // of adjacent registers, the lower-numbered being even.
91 // See also is_aligned_Pairs() below, and the padding added before
92 // Matcher::_new_SP to keep allocated pairs aligned properly.
93 // If we ever go to quad-word allocations, SlotsPerQuad will become
94 // the controlling alignment constraint. Note that this alignment
95 // requirement is internal to the allocator, and independent of any
96 // particular platform.
97 enum { SlotsPerLong = 2,
98 SlotsPerVecS = 1,
99 SlotsPerVecD = 2,
100 SlotsPerVecX = 4,
101 SlotsPerVecY = 8,
102 SlotsPerVecZ = 16 };
103
104 // A constructor only used by the ADLC output. All mask fields are filled
105 // in directly. Calls to this look something like RM(1,2,3,4);
106 RegMask(
107 # define BODY(I) int a##I,
108 FORALL_BODY
109 # undef BODY
110 int dummy = 0 ) {
111 # define BODY(I) _A[I] = a##I;
112 FORALL_BODY
113 # undef BODY
114 }
115
116 // Handy copying constructor
117 RegMask( RegMask *rm ) {
118 # define BODY(I) _A[I] = rm->_A[I];
119 FORALL_BODY
120 # undef BODY
121 }
122
283 // Subtract 'rm' from 'this'
284 void SUBTRACT( const RegMask &rm ) {
285 # define BODY(I) _A[I] &= ~rm._A[I];
286 FORALL_BODY
287 # undef BODY
288 }
289
290 // Compute size of register mask: number of bits
291 uint Size() const;
292
293 #ifndef PRODUCT
294 void print() const { dump(); }
295 void dump(outputStream *st = tty) const; // Print a mask
296 #endif
297
298 static const RegMask Empty; // Common empty mask
299
300 static bool can_represent(OptoReg::Name reg) {
301 // NOTE: -1 in computation reflects the usage of the last
302 // bit of the regmask as an infinite stack flag and
303 // -7 is to keep mask aligned for largest value (VecZ).
304 return (int)reg < (int)(CHUNK_SIZE-1);
305 }
306 static bool can_represent_arg(OptoReg::Name reg) {
307 // NOTE: -SlotsPerVecZ in computation reflects the need
308 // to keep mask aligned for largest value (VecZ).
309 return (int)reg < (int)(CHUNK_SIZE-SlotsPerVecZ);
310 }
311 };
312
313 // Do not use this constant directly in client code!
314 #undef RM_SIZE
315
316 #endif // SHARE_VM_OPTO_REGMASK_HPP
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