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src/hotspot/cpu/aarch64/c1_LIRGenerator_aarch64.cpp

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*** 731,741 **** LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) { LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience new_value.load_item(); cmp_value.load_item(); LIR_Opr result = new_register(T_INT); ! if (type == T_OBJECT || type == T_ARRAY) { __ cas_obj(addr, cmp_value.result(), new_value.result(), new_register(T_INT), new_register(T_INT), result); } else if (type == T_INT) { __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill); } else if (type == T_LONG) { __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill); --- 731,741 ---- LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) { LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience new_value.load_item(); cmp_value.load_item(); LIR_Opr result = new_register(T_INT); ! if (is_reference_type(type)) { __ cas_obj(addr, cmp_value.result(), new_value.result(), new_register(T_INT), new_register(T_INT), result); } else if (type == T_INT) { __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill); } else if (type == T_LONG) { __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
*** 746,756 **** __ logical_xor(FrameMap::r8_opr, LIR_OprFact::intConst(1), result); return result; } LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) { ! bool is_oop = type == T_OBJECT || type == T_ARRAY; LIR_Opr result = new_register(type); value.load_item(); assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type"); LIR_Opr tmp = new_register(T_INT); __ xchg(addr, value.result(), result, tmp); --- 746,756 ---- __ logical_xor(FrameMap::r8_opr, LIR_OprFact::intConst(1), result); return result; } LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) { ! bool is_oop = is_reference_type(type); LIR_Opr result = new_register(type); value.load_item(); assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type"); LIR_Opr tmp = new_register(T_INT); __ xchg(addr, value.result(), result, tmp);
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