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src/hotspot/cpu/arm/assembler_arm_32.hpp

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rev 54763 : 8213084: Rework and enhance Print[Opto]Assembly output
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 182 
 183   int encoding_s() const {
 184     return _encoding;
 185   }
 186 
 187   int encoding_d() const {
 188     assert((_encoding & 0xFF) <= 16, "no more than 16 double registers" );
 189     return (_encoding & 0xFFFFFF00) | ((_encoding & 0xFF) << 1);
 190   }
 191 
 192 };
 193 
 194 
 195 class Assembler : public AbstractAssembler  {
 196 
 197  public:
 198 
 199   static const int LogInstructionSize = 2;
 200   static const int InstructionSize    = 1 << LogInstructionSize;
 201 








 202   static inline AsmCondition inverse(AsmCondition cond) {
 203     assert ((cond != al) && (cond != nv), "AL and NV conditions cannot be inversed");
 204     return (AsmCondition)((int)cond ^ 1);
 205   }
 206 
 207   // Returns true if given value can be used as immediate in arithmetic (add/sub/cmp/cmn) instructions.
 208   static inline bool is_arith_imm_in_range(intx value) {
 209     return AsmOperand::is_rotated_imm(value);
 210   }
 211 
 212   // Arithmetic instructions
 213 
 214 #define F(mnemonic, opcode) \
 215   void mnemonic(Register rd, Register rn, AsmOperand operand, AsmCondition cond = al) {    \
 216     emit_int32(cond << 28 | opcode << 21 | rn->encoding() << 16 |                          \
 217                rd->encoding() << 12 | operand.encoding());                                 \
 218   }                                                                                        \
 219   void mnemonic##s(Register rd, Register rn, AsmOperand operand, AsmCondition cond = al) { \
 220     emit_int32(cond << 28 | opcode << 21 | 1 << 20 | rn->encoding() << 16 |                \
 221                rd->encoding() << 12 | operand.encoding());                                 \




 182 
 183   int encoding_s() const {
 184     return _encoding;
 185   }
 186 
 187   int encoding_d() const {
 188     assert((_encoding & 0xFF) <= 16, "no more than 16 double registers" );
 189     return (_encoding & 0xFFFFFF00) | ((_encoding & 0xFF) << 1);
 190   }
 191 
 192 };
 193 
 194 
 195 class Assembler : public AbstractAssembler  {
 196 
 197  public:
 198 
 199   static const int LogInstructionSize = 2;
 200   static const int InstructionSize    = 1 << LogInstructionSize;
 201 
 202   //---<  calculate length of instruction  >---
 203   // We just use the values set above.
 204   // instruction must start at passed address
 205   static unsigned int instr_len(unsigned char *instr) { return InstructionSize; }
 206 
 207   //---<  longest instructions  >---
 208   static unsigned int instr_maxlen() { return InstructionSize; }
 209 
 210   static inline AsmCondition inverse(AsmCondition cond) {
 211     assert ((cond != al) && (cond != nv), "AL and NV conditions cannot be inversed");
 212     return (AsmCondition)((int)cond ^ 1);
 213   }
 214 
 215   // Returns true if given value can be used as immediate in arithmetic (add/sub/cmp/cmn) instructions.
 216   static inline bool is_arith_imm_in_range(intx value) {
 217     return AsmOperand::is_rotated_imm(value);
 218   }
 219 
 220   // Arithmetic instructions
 221 
 222 #define F(mnemonic, opcode) \
 223   void mnemonic(Register rd, Register rn, AsmOperand operand, AsmCondition cond = al) {    \
 224     emit_int32(cond << 28 | opcode << 21 | rn->encoding() << 16 |                          \
 225                rd->encoding() << 12 | operand.encoding());                                 \
 226   }                                                                                        \
 227   void mnemonic##s(Register rd, Register rn, AsmOperand operand, AsmCondition cond = al) { \
 228     emit_int32(cond << 28 | opcode << 21 | 1 << 20 | rn->encoding() << 16 |                \
 229                rd->encoding() << 12 | operand.encoding());                                 \


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