1 /* 2 * Copyright (c) 2016, 2019, Oracle and/or its affiliates. All rights reserved. 3 * Copyright (c) 2016, 2019 SAP SE. All rights reserved. 4 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 5 * 6 * This code is free software; you can redistribute it and/or modify it 7 * under the terms of the GNU General Public License version 2 only, as 8 * published by the Free Software Foundation. 9 * 10 * This code is distributed in the hope that it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 13 * version 2 for more details (a copy is included in the LICENSE file that 14 * accompanied this code). 15 * 16 * You should have received a copy of the GNU General Public License version 17 * 2 along with this work; if not, write to the Free Software Foundation, 18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 19 * 20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 21 * or visit www.oracle.com if you need additional information or have any 22 * questions. 23 * 24 */ 25 26 #include "precompiled.hpp" 27 #include "jvm.h" 28 #include "asm/assembler.inline.hpp" 29 #include "compiler/disassembler.hpp" 30 #include "code/compiledIC.hpp" 31 #include "memory/resourceArea.hpp" 32 #include "runtime/java.hpp" 33 #include "runtime/stubCodeGenerator.hpp" 34 #include "vm_version_s390.hpp" 35 36 # include <sys/sysinfo.h> 37 38 bool VM_Version::_is_determine_features_test_running = false; 39 const char* VM_Version::_model_string; 40 41 unsigned long VM_Version::_features[_features_buffer_len] = {0, 0, 0, 0}; 42 unsigned long VM_Version::_cipher_features[_features_buffer_len] = {0, 0, 0, 0}; 43 unsigned long VM_Version::_msgdigest_features[_features_buffer_len] = {0, 0, 0, 0}; 44 unsigned int VM_Version::_nfeatures = 0; 45 unsigned int VM_Version::_ncipher_features = 0; 46 unsigned int VM_Version::_nmsgdigest_features = 0; 47 unsigned int VM_Version::_Dcache_lineSize = 256; 48 unsigned int VM_Version::_Icache_lineSize = 256; 49 50 static const char* z_gen[] = {" ", "G1", "G2", "G3", "G4", "G5", "G6", "G7" }; 51 static const char* z_machine[] = {" ", "2064", "2084", "2094", "2097", "2817", " ", "2964" }; 52 static const char* z_name[] = {" ", "z900", "z990", "z9 EC", "z10 EC", "z196 EC", "ec12", "z13" }; 53 54 void VM_Version::initialize() { 55 determine_features(); // Get processor capabilities. 56 set_features_string(); // Set a descriptive feature indication. 57 58 if (Verbose) { 59 print_features(); 60 } 61 62 intx cache_line_size = Dcache_lineSize(0); 63 64 MaxVectorSize = 8; 65 66 if (has_PrefetchRaw()) { 67 if (FLAG_IS_DEFAULT(AllocatePrefetchStyle)) { // not preset 68 // 0 = no prefetch. 69 // 1 = Prefetch instructions for each allocation. 70 // 2 = Use TLAB watermark to gate allocation prefetch. 71 AllocatePrefetchStyle = 1; 72 } 73 74 if (AllocatePrefetchStyle > 0) { // Prefetching turned on at all? 75 // Distance to prefetch ahead of allocation pointer. 76 if (FLAG_IS_DEFAULT(AllocatePrefetchDistance) || (AllocatePrefetchDistance < 0)) { // not preset 77 AllocatePrefetchDistance = 0; 78 } 79 80 // Number of lines to prefetch ahead of allocation pointer. 81 if (FLAG_IS_DEFAULT(AllocatePrefetchLines) || (AllocatePrefetchLines <= 0)) { // not preset 82 AllocatePrefetchLines = 3; 83 } 84 85 // Step size in bytes of sequential prefetch instructions. 86 if (FLAG_IS_DEFAULT(AllocatePrefetchStepSize) || (AllocatePrefetchStepSize <= 0)) { // not preset 87 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 88 } else if (AllocatePrefetchStepSize < cache_line_size) { 89 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 90 } else { 91 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 92 } 93 } else { 94 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 0); 95 AllocatePrefetchDistance = 0; 96 AllocatePrefetchLines = 0; 97 // Can't be zero. Will SIGFPE during constraints checking. 98 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 99 } 100 101 } else { 102 FLAG_SET_DEFAULT(AllocatePrefetchStyle, 0); 103 AllocatePrefetchDistance = 0; 104 AllocatePrefetchLines = 0; 105 // Can't be zero. Will SIGFPE during constraints checking. 106 FLAG_SET_DEFAULT(AllocatePrefetchStepSize, cache_line_size); 107 } 108 109 // TODO: 110 // On z/Architecture, cache line size is significantly large (256 bytes). Do we really need 111 // to keep contended members that far apart? Performance tests are required. 112 if (FLAG_IS_DEFAULT(ContendedPaddingWidth) && (cache_line_size > ContendedPaddingWidth)) { 113 ContendedPaddingWidth = cache_line_size; 114 } 115 116 // On z/Architecture, the CRC32/CRC32C intrinsics are implemented "by hand". 117 // TODO: Provide implementation based on the vector instructions available from z13. 118 // Note: The CHECKSUM instruction, which has been there since the very beginning 119 // (of z/Architecture), computes "some kind of" a checksum. 120 // It has nothing to do with the CRC32 algorithm. 121 if (FLAG_IS_DEFAULT(UseCRC32Intrinsics)) { 122 FLAG_SET_DEFAULT(UseCRC32Intrinsics, true); 123 } 124 if (FLAG_IS_DEFAULT(UseCRC32CIntrinsics)) { 125 FLAG_SET_DEFAULT(UseCRC32CIntrinsics, true); 126 } 127 128 // TODO: Provide implementation. 129 if (UseAdler32Intrinsics) { 130 warning("Adler32Intrinsics not available on this CPU."); 131 FLAG_SET_DEFAULT(UseAdler32Intrinsics, false); 132 } 133 134 // On z/Architecture, we take UseAES as the general switch to enable/disable the AES intrinsics. 135 // The specific, and yet to be defined, switches UseAESxxxIntrinsics will then be set 136 // depending on the actual machine capabilities. 137 // Explicitly setting them via CmdLine option takes precedence, of course. 138 // TODO: UseAESIntrinsics must be made keylength specific. 139 // As of March 2015 and Java8, only AES128 is supported by the Java Cryptographic Extensions. 140 // Therefore, UseAESIntrinsics is of minimal use at the moment. 141 if (FLAG_IS_DEFAULT(UseAES) && has_Crypto_AES()) { 142 FLAG_SET_DEFAULT(UseAES, true); 143 } 144 if (UseAES && !has_Crypto_AES()) { 145 warning("AES instructions are not available on this CPU"); 146 FLAG_SET_DEFAULT(UseAES, false); 147 } 148 if (UseAES) { 149 if (FLAG_IS_DEFAULT(UseAESIntrinsics)) { 150 FLAG_SET_DEFAULT(UseAESIntrinsics, true); 151 } 152 } 153 if (UseAESIntrinsics && !has_Crypto_AES()) { 154 warning("AES intrinsics are not available on this CPU"); 155 FLAG_SET_DEFAULT(UseAESIntrinsics, false); 156 } 157 if (UseAESIntrinsics && !UseAES) { 158 warning("AES intrinsics require UseAES flag to be enabled. Intrinsics will be disabled."); 159 FLAG_SET_DEFAULT(UseAESIntrinsics, false); 160 } 161 162 // TODO: implement AES/CTR intrinsics 163 if (UseAESCTRIntrinsics) { 164 warning("AES/CTR intrinsics are not available on this CPU"); 165 FLAG_SET_DEFAULT(UseAESCTRIntrinsics, false); 166 } 167 168 if (FLAG_IS_DEFAULT(UseGHASHIntrinsics) && has_Crypto_GHASH()) { 169 FLAG_SET_DEFAULT(UseGHASHIntrinsics, true); 170 } 171 if (UseGHASHIntrinsics && !has_Crypto_GHASH()) { 172 warning("GHASH intrinsics are not available on this CPU"); 173 FLAG_SET_DEFAULT(UseGHASHIntrinsics, false); 174 } 175 176 if (FLAG_IS_DEFAULT(UseFMA)) { 177 FLAG_SET_DEFAULT(UseFMA, true); 178 } 179 180 // On z/Architecture, we take UseSHA as the general switch to enable/disable the SHA intrinsics. 181 // The specific switches UseSHAxxxIntrinsics will then be set depending on the actual 182 // machine capabilities. 183 // Explicitly setting them via CmdLine option takes precedence, of course. 184 if (FLAG_IS_DEFAULT(UseSHA) && has_Crypto_SHA()) { 185 FLAG_SET_DEFAULT(UseSHA, true); 186 } 187 if (UseSHA && !has_Crypto_SHA()) { 188 warning("SHA instructions are not available on this CPU"); 189 FLAG_SET_DEFAULT(UseSHA, false); 190 } 191 if (UseSHA && has_Crypto_SHA1()) { 192 if (FLAG_IS_DEFAULT(UseSHA1Intrinsics)) { 193 FLAG_SET_DEFAULT(UseSHA1Intrinsics, true); 194 } 195 } else if (UseSHA1Intrinsics) { 196 warning("Intrinsics for SHA-1 crypto hash functions not available on this CPU."); 197 FLAG_SET_DEFAULT(UseSHA1Intrinsics, false); 198 } 199 if (UseSHA && has_Crypto_SHA256()) { 200 if (FLAG_IS_DEFAULT(UseSHA256Intrinsics)) { 201 FLAG_SET_DEFAULT(UseSHA256Intrinsics, true); 202 } 203 } else if (UseSHA256Intrinsics) { 204 warning("Intrinsics for SHA-224 and SHA-256 crypto hash functions not available on this CPU."); 205 FLAG_SET_DEFAULT(UseSHA256Intrinsics, false); 206 } 207 if (UseSHA && has_Crypto_SHA512()) { 208 if (FLAG_IS_DEFAULT(UseSHA512Intrinsics)) { 209 FLAG_SET_DEFAULT(UseSHA512Intrinsics, true); 210 } 211 } else if (UseSHA512Intrinsics) { 212 warning("Intrinsics for SHA-384 and SHA-512 crypto hash functions not available on this CPU."); 213 FLAG_SET_DEFAULT(UseSHA512Intrinsics, false); 214 } 215 216 if (!(UseSHA1Intrinsics || UseSHA256Intrinsics || UseSHA512Intrinsics)) { 217 FLAG_SET_DEFAULT(UseSHA, false); 218 } 219 220 if (FLAG_IS_DEFAULT(UseMultiplyToLenIntrinsic)) { 221 FLAG_SET_DEFAULT(UseMultiplyToLenIntrinsic, true); 222 } 223 if (FLAG_IS_DEFAULT(UseMontgomeryMultiplyIntrinsic)) { 224 FLAG_SET_DEFAULT(UseMontgomeryMultiplyIntrinsic, true); 225 } 226 if (FLAG_IS_DEFAULT(UseMontgomerySquareIntrinsic)) { 227 FLAG_SET_DEFAULT(UseMontgomerySquareIntrinsic, true); 228 } 229 if (FLAG_IS_DEFAULT(UsePopCountInstruction)) { 230 FLAG_SET_DEFAULT(UsePopCountInstruction, true); 231 } 232 233 // z/Architecture supports 8-byte compare-exchange operations 234 // (see Atomic::cmpxchg) 235 // and 'atomic long memory ops' (see Unsafe_GetLongVolatile). 236 _supports_cx8 = true; 237 238 _supports_atomic_getadd4 = VM_Version::has_LoadAndALUAtomicV1(); 239 _supports_atomic_getadd8 = VM_Version::has_LoadAndALUAtomicV1(); 240 241 // z/Architecture supports unaligned memory accesses. 242 // Performance penalty is negligible. An additional tick or so 243 // is lost if the accessed data spans a cache line boundary. 244 // Unaligned accesses are not atomic, of course. 245 if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) { 246 FLAG_SET_DEFAULT(UseUnalignedAccesses, true); 247 } 248 } 249 250 251 void VM_Version::set_features_string() { 252 253 unsigned int ambiguity = 0; 254 _model_string = z_name[0]; 255 if (is_z13()) { 256 _features_string = "System z G7-z13 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update, TxM, VectorInstr)"; 257 _model_string = z_name[7]; 258 ambiguity++; 259 } 260 if (is_ec12()) { 261 _features_string = "System z G6-EC12 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update, TxM)"; 262 _model_string = z_name[6]; 263 ambiguity++; 264 } 265 if (is_z196()) { 266 _features_string = "System z G5-z196 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB, Cond Load/Store, Interlocked Update)"; 267 _model_string = z_name[5]; 268 ambiguity++; 269 } 270 if (is_z10()) { 271 _features_string = "System z G4-z10 (LDISP_fast, ExtImm, PCrel Load/Store, CmpB)"; 272 _model_string = z_name[4]; 273 ambiguity++; 274 } 275 if (is_z9()) { 276 _features_string = "System z G3-z9 (LDISP_fast, ExtImm), out-of-support as of 2016-04-01"; 277 _model_string = z_name[3]; 278 ambiguity++; 279 } 280 if (is_z990()) { 281 _features_string = "System z G2-z990 (LDISP_fast), out-of-support as of 2014-07-01"; 282 _model_string = z_name[2]; 283 ambiguity++; 284 } 285 if (is_z900()) { 286 _features_string = "System z G1-z900 (LDISP), out-of-support as of 2014-07-01"; 287 _model_string = z_name[1]; 288 ambiguity++; 289 } 290 291 if (ambiguity == 0) { 292 _features_string = "z/Architecture (unknown generation)"; 293 } else if (ambiguity > 1) { 294 tty->print_cr("*** WARNING *** Ambiguous z/Architecture detection, ambiguity = %d", ambiguity); 295 tty->print_cr(" oldest detected generation is %s", _features_string); 296 _features_string = "z/Architecture (ambiguous detection)"; 297 } 298 299 if (has_Crypto_AES()) { 300 char buf[256]; 301 assert(strlen(_features_string) + 4 + 3*4 + 1 < sizeof(buf), "increase buffer size"); 302 jio_snprintf(buf, sizeof(buf), "%s aes%s%s%s", // String 'aes' must be surrounded by spaces so that jtreg tests recognize it. 303 _features_string, 304 has_Crypto_AES128() ? " 128" : "", 305 has_Crypto_AES192() ? " 192" : "", 306 has_Crypto_AES256() ? " 256" : ""); 307 _features_string = os::strdup(buf); 308 } 309 310 if (has_Crypto_SHA()) { 311 char buf[256]; 312 assert(strlen(_features_string) + 4 + 2 + 2*4 + 6 + 1 < sizeof(buf), "increase buffer size"); 313 // String 'sha1' etc must be surrounded by spaces so that jtreg tests recognize it. 314 jio_snprintf(buf, sizeof(buf), "%s %s%s%s%s", 315 _features_string, 316 has_Crypto_SHA1() ? " sha1" : "", 317 has_Crypto_SHA256() ? " sha256" : "", 318 has_Crypto_SHA512() ? " sha512" : "", 319 has_Crypto_GHASH() ? " ghash" : ""); 320 if (has_Crypto_AES()) { os::free((void *)_features_string); } 321 _features_string = os::strdup(buf); 322 } 323 } 324 325 // featureBuffer - bit array indicating availability of various features 326 // featureNum - bit index of feature to be tested 327 // Featurenum < 0 requests test for any nonzero bit in featureBuffer. 328 // bufLen - length of featureBuffer in bits 329 bool VM_Version::test_feature_bit(unsigned long* featureBuffer, int featureNum, unsigned int bufLen) { 330 assert(bufLen > 0, "buffer len must be positive"); 331 assert((bufLen & 0x0007) == 0, "unaligned buffer len"); 332 assert(((intptr_t)featureBuffer&0x0007) == 0, "unaligned feature buffer"); 333 if (featureNum < 0) { 334 // Any bit set at all? 335 bool anyBit = false; 336 for (size_t i = 0; i < bufLen/(8*sizeof(long)); i++) { 337 anyBit = anyBit || (featureBuffer[i] != 0); 338 } 339 return anyBit; 340 } else { 341 assert((unsigned int)featureNum < bufLen, "feature index out of range"); 342 unsigned char* byteBuffer = (unsigned char*)featureBuffer; 343 int byteIndex = featureNum/(8*sizeof(char)); 344 int bitIndex = featureNum%(8*sizeof(char)); 345 // Indexed bit set? 346 return (byteBuffer[byteIndex] & (1U<<(7-bitIndex))) != 0; 347 } 348 } 349 350 void VM_Version::print_features_internal(const char* text, bool print_anyway) { 351 tty->print_cr("%s %s", text, features_string()); 352 tty->print("%s", text); 353 for (unsigned int i = 0; i < _nfeatures; i++) { 354 tty->print(" 0x%16.16lx", _features[i]); 355 } 356 tty->cr(); 357 358 if (Verbose || print_anyway) { 359 // z900 360 if (has_long_displacement() ) tty->print_cr("available: %s", "LongDispFacility"); 361 // z990 362 if (has_long_displacement_fast() ) tty->print_cr("available: %s", "LongDispFacilityHighPerf"); 363 if (has_ETF2() && has_ETF3() ) tty->print_cr("available: %s", "ETF2 and ETF3"); 364 if (has_Crypto() ) tty->print_cr("available: %s", "CryptoFacility"); 365 // z9 366 if (has_extended_immediate() ) tty->print_cr("available: %s", "ExtImmedFacility"); 367 if (has_StoreFacilityListExtended()) tty->print_cr("available: %s", "StoreFacilityListExtended"); 368 if (has_StoreClockFast() ) tty->print_cr("available: %s", "StoreClockFast"); 369 if (has_ETF2Enhancements() ) tty->print_cr("available: %s", "ETF2 Enhancements"); 370 if (has_ETF3Enhancements() ) tty->print_cr("available: %s", "ETF3 Enhancements"); 371 if (has_HFPUnnormalized() ) tty->print_cr("available: %s", "HFPUnnormalizedFacility"); 372 if (has_HFPMultiplyAndAdd() ) tty->print_cr("available: %s", "HFPMultiplyAndAddFacility"); 373 // z10 374 if (has_ParsingEnhancements() ) tty->print_cr("available: %s", "Parsing Enhancements"); 375 if (has_ExtractCPUtime() ) tty->print_cr("available: %s", "ExtractCPUTime"); 376 if (has_CompareSwapStore() ) tty->print_cr("available: %s", "CompareSwapStore"); 377 if (has_GnrlInstrExtensions() ) tty->print_cr("available: %s", "General Instruction Extensions"); 378 if (has_CompareBranch() ) tty->print_cr(" available: %s", "Compare and Branch"); 379 if (has_CompareTrap() ) tty->print_cr(" available: %s", "Compare and Trap"); 380 if (has_RelativeLoadStore() ) tty->print_cr(" available: %s", "Relative Load/Store"); 381 if (has_MultiplySingleImm32() ) tty->print_cr(" available: %s", "MultiplySingleImm32"); 382 if (has_Prefetch() ) tty->print_cr(" available: %s", "Prefetch"); 383 if (has_MoveImmToMem() ) tty->print_cr(" available: %s", "Direct Moves Immediate to Memory"); 384 if (has_MemWithImmALUOps() ) tty->print_cr(" available: %s", "Direct ALU Ops Memory .op. Immediate"); 385 if (has_ExtractCPUAttributes() ) tty->print_cr(" available: %s", "Extract CPU Atributes"); 386 if (has_ExecuteExtensions() ) tty->print_cr("available: %s", "ExecuteExtensions"); 387 if (has_FPSupportEnhancements() ) tty->print_cr("available: %s", "FPSupportEnhancements"); 388 if (has_DecimalFloatingPoint() ) tty->print_cr("available: %s", "DecimalFloatingPoint"); 389 // z196 390 if (has_DistinctOpnds() ) tty->print_cr("available: %s", "Distinct Operands"); 391 if (has_InterlockedAccessV1() ) tty->print_cr(" available: %s", "InterlockedAccess V1 (fast)"); 392 if (has_PopCount() ) tty->print_cr(" available: %s", "PopCount"); 393 if (has_LoadStoreConditional() ) tty->print_cr(" available: %s", "LoadStoreConditional"); 394 if (has_HighWordInstr() ) tty->print_cr(" available: %s", "HighWord Instructions"); 395 if (has_FastSync() ) tty->print_cr(" available: %s", "FastSync (bcr 14,0)"); 396 if (has_AtomicMemWithImmALUOps() ) tty->print_cr("available: %s", "Atomic Direct ALU Ops Memory .op. Immediate"); 397 if (has_FPExtensions() ) tty->print_cr("available: %s", "Floatingpoint Extensions"); 398 if (has_CryptoExt3() ) tty->print_cr("available: %s", "Crypto Extensions 3"); 399 if (has_CryptoExt4() ) tty->print_cr("available: %s", "Crypto Extensions 4"); 400 // EC12 401 if (has_MiscInstrExt() ) tty->print_cr("available: %s", "Miscelaneous Instruction Extensions"); 402 if (has_ExecutionHint() ) tty->print_cr(" available: %s", "Execution Hints (branch prediction)"); 403 if (has_ProcessorAssist() ) tty->print_cr(" available: %s", "Processor Assists"); 404 if (has_LoadAndTrap() ) tty->print_cr(" available: %s", "Load and Trap"); 405 if (has_TxMem() ) tty->print_cr("available: %s", "Transactional Memory"); 406 if (has_InterlockedAccessV2() ) tty->print_cr(" available: %s", "InterlockedAccess V2 (fast)"); 407 if (has_DFPZonedConversion() ) tty->print_cr(" available: %s", "DFP Zoned Conversions"); 408 // z13 409 if (has_LoadStoreConditional2() ) tty->print_cr("available: %s", "Load/Store Conditional 2"); 410 if (has_CryptoExt5() ) tty->print_cr("available: %s", "Crypto Extensions 5"); 411 if (has_DFPPackedConversion() ) tty->print_cr("available: %s", "DFP Packed Conversions"); 412 if (has_VectorFacility() ) tty->print_cr("available: %s", "Vector Facility"); 413 // test switches 414 if (has_TestFeature1Impl() ) tty->print_cr("available: %s", "TestFeature1Impl"); 415 if (has_TestFeature2Impl() ) tty->print_cr("available: %s", "TestFeature2Impl"); 416 if (has_TestFeature4Impl() ) tty->print_cr("available: %s", "TestFeature4Impl"); 417 if (has_TestFeature8Impl() ) tty->print_cr("available: %s", "TestFeature8Impl"); 418 419 if (has_Crypto()) { 420 tty->cr(); 421 tty->print_cr("detailed availability of %s capabilities:", "CryptoFacility"); 422 if (test_feature_bit(&_cipher_features[0], -1, 2*Cipher::_featureBits)) { 423 tty->cr(); 424 tty->print_cr(" available: %s", "Message Cipher Functions"); 425 } 426 if (test_feature_bit(&_cipher_features[0], -1, (int)Cipher::_featureBits)) { 427 tty->print_cr(" available Crypto Features of KM (Cipher Message):"); 428 for (unsigned int i = 0; i < Cipher::_featureBits; i++) { 429 if (test_feature_bit(&_cipher_features[0], i, (int)Cipher::_featureBits)) { 430 switch (i) { 431 case Cipher::_Query: tty->print_cr(" available: KM Query"); break; 432 case Cipher::_DEA: tty->print_cr(" available: KM DEA"); break; 433 case Cipher::_TDEA128: tty->print_cr(" available: KM TDEA-128"); break; 434 case Cipher::_TDEA192: tty->print_cr(" available: KM TDEA-192"); break; 435 case Cipher::_EncryptedDEA: tty->print_cr(" available: KM Encrypted DEA"); break; 436 case Cipher::_EncryptedDEA128: tty->print_cr(" available: KM Encrypted DEA-128"); break; 437 case Cipher::_EncryptedDEA192: tty->print_cr(" available: KM Encrypted DEA-192"); break; 438 case Cipher::_AES128: tty->print_cr(" available: KM AES-128"); break; 439 case Cipher::_AES192: tty->print_cr(" available: KM AES-192"); break; 440 case Cipher::_AES256: tty->print_cr(" available: KM AES-256"); break; 441 case Cipher::_EnccryptedAES128: tty->print_cr(" available: KM Encrypted-AES-128"); break; 442 case Cipher::_EnccryptedAES192: tty->print_cr(" available: KM Encrypted-AES-192"); break; 443 case Cipher::_EnccryptedAES256: tty->print_cr(" available: KM Encrypted-AES-256"); break; 444 case Cipher::_XTSAES128: tty->print_cr(" available: KM XTS-AES-128"); break; 445 case Cipher::_XTSAES256: tty->print_cr(" available: KM XTS-AES-256"); break; 446 case Cipher::_EncryptedXTSAES128: tty->print_cr(" available: KM XTS-Encrypted-AES-128"); break; 447 case Cipher::_EncryptedXTSAES256: tty->print_cr(" available: KM XTS-Encrypted-AES-256"); break; 448 default: tty->print_cr(" available: unknown KM code %d", i); break; 449 } 450 } 451 } 452 } 453 if (test_feature_bit(&_cipher_features[2], -1, (int)Cipher::_featureBits)) { 454 tty->print_cr(" available Crypto Features of KMC (Cipher Message with Chaining):"); 455 for (unsigned int i = 0; i < Cipher::_featureBits; i++) { 456 if (test_feature_bit(&_cipher_features[2], i, (int)Cipher::_featureBits)) { 457 switch (i) { 458 case Cipher::_Query: tty->print_cr(" available: KMC Query"); break; 459 case Cipher::_DEA: tty->print_cr(" available: KMC DEA"); break; 460 case Cipher::_TDEA128: tty->print_cr(" available: KMC TDEA-128"); break; 461 case Cipher::_TDEA192: tty->print_cr(" available: KMC TDEA-192"); break; 462 case Cipher::_EncryptedDEA: tty->print_cr(" available: KMC Encrypted DEA"); break; 463 case Cipher::_EncryptedDEA128: tty->print_cr(" available: KMC Encrypted DEA-128"); break; 464 case Cipher::_EncryptedDEA192: tty->print_cr(" available: KMC Encrypted DEA-192"); break; 465 case Cipher::_AES128: tty->print_cr(" available: KMC AES-128"); break; 466 case Cipher::_AES192: tty->print_cr(" available: KMC AES-192"); break; 467 case Cipher::_AES256: tty->print_cr(" available: KMC AES-256"); break; 468 case Cipher::_EnccryptedAES128: tty->print_cr(" available: KMC Encrypted-AES-128"); break; 469 case Cipher::_EnccryptedAES192: tty->print_cr(" available: KMC Encrypted-AES-192"); break; 470 case Cipher::_EnccryptedAES256: tty->print_cr(" available: KMC Encrypted-AES-256"); break; 471 case Cipher::_PRNG: tty->print_cr(" available: KMC PRNG"); break; 472 default: tty->print_cr(" available: unknown KMC code %d", i); break; 473 } 474 } 475 } 476 } 477 478 if (test_feature_bit(&_msgdigest_features[0], -1, 2*MsgDigest::_featureBits)) { 479 tty->cr(); 480 tty->print_cr(" available: %s", "Message Digest Functions for SHA"); 481 } 482 if (test_feature_bit(&_msgdigest_features[0], -1, (int)MsgDigest::_featureBits)) { 483 tty->print_cr(" available Features of KIMD (Msg Digest):"); 484 for (unsigned int i = 0; i < MsgDigest::_featureBits; i++) { 485 if (test_feature_bit(&_msgdigest_features[0], i, (int)MsgDigest::_featureBits)) { 486 switch (i) { 487 case MsgDigest::_Query: tty->print_cr(" available: KIMD Query"); break; 488 case MsgDigest::_SHA1: tty->print_cr(" available: KIMD SHA-1"); break; 489 case MsgDigest::_SHA256: tty->print_cr(" available: KIMD SHA-256"); break; 490 case MsgDigest::_SHA512: tty->print_cr(" available: KIMD SHA-512"); break; 491 case MsgDigest::_GHASH: tty->print_cr(" available: KIMD GHASH"); break; 492 default: tty->print_cr(" available: unknown code %d", i); break; 493 } 494 } 495 } 496 } 497 if (test_feature_bit(&_msgdigest_features[2], -1, (int)MsgDigest::_featureBits)) { 498 tty->print_cr(" available Features of KLMD (Msg Digest):"); 499 for (unsigned int i = 0; i < MsgDigest::_featureBits; i++) { 500 if (test_feature_bit(&_msgdigest_features[2], i, (int)MsgDigest::_featureBits)) { 501 switch (i) { 502 case MsgDigest::_Query: tty->print_cr(" available: KLMD Query"); break; 503 case MsgDigest::_SHA1: tty->print_cr(" available: KLMD SHA-1"); break; 504 case MsgDigest::_SHA256: tty->print_cr(" available: KLMD SHA-256"); break; 505 case MsgDigest::_SHA512: tty->print_cr(" available: KLMD SHA-512"); break; 506 default: tty->print_cr(" available: unknown code %d", i); break; 507 } 508 } 509 } 510 } 511 } 512 if (ContendedPaddingWidth > 0) { 513 tty->cr(); 514 tty->print_cr("ContendedPaddingWidth " INTX_FORMAT, ContendedPaddingWidth); 515 } 516 } 517 } 518 519 void VM_Version::print_platform_virtualization_info(outputStream* st) { 520 // /proc/sysinfo contains interesting information about 521 // - LPAR 522 // - whole "Box" (CPUs ) 523 // - z/VM / KVM (VM<nn>); this is not available in an LPAR-only setup 524 const char* kw[] = { "LPAR", "CPUs", "VM", NULL }; 525 const char* info_file = "/proc/sysinfo"; 526 527 if (!print_matching_lines_from_file(info_file, st, kw)) { 528 st->print_cr(" <%s Not Available>", info_file); 529 } 530 } 531 532 void VM_Version::print_features() { 533 print_features_internal("Version:"); 534 } 535 536 void VM_Version::reset_features(bool reset) { 537 if (reset) { 538 for (unsigned int i = 0; i < _features_buffer_len; i++) { 539 VM_Version::_features[i] = 0; 540 } 541 } 542 } 543 544 void VM_Version::set_features_z900(bool reset) { 545 reset_features(reset); 546 547 set_has_long_displacement(); 548 set_has_ETF2(); 549 } 550 551 void VM_Version::set_features_z990(bool reset) { 552 reset_features(reset); 553 554 set_features_z900(false); 555 set_has_ETF3(); 556 set_has_long_displacement_fast(); 557 set_has_HFPMultiplyAndAdd(); 558 } 559 560 void VM_Version::set_features_z9(bool reset) { 561 reset_features(reset); 562 563 set_features_z990(false); 564 set_has_StoreFacilityListExtended(); 565 // set_has_Crypto(); // Do not set, crypto features must be retrieved separately. 566 set_has_ETF2Enhancements(); 567 set_has_ETF3Enhancements(); 568 set_has_extended_immediate(); 569 set_has_StoreClockFast(); 570 set_has_HFPUnnormalized(); 571 } 572 573 void VM_Version::set_features_z10(bool reset) { 574 reset_features(reset); 575 576 set_features_z9(false); 577 set_has_CompareSwapStore(); 578 set_has_RelativeLoadStore(); 579 set_has_CompareBranch(); 580 set_has_CompareTrap(); 581 set_has_MultiplySingleImm32(); 582 set_has_Prefetch(); 583 set_has_MoveImmToMem(); 584 set_has_MemWithImmALUOps(); 585 set_has_ExecuteExtensions(); 586 set_has_FPSupportEnhancements(); 587 set_has_DecimalFloatingPoint(); 588 set_has_ExtractCPUtime(); 589 set_has_CryptoExt3(); 590 } 591 592 void VM_Version::set_features_z196(bool reset) { 593 reset_features(reset); 594 595 set_features_z10(false); 596 set_has_InterlockedAccessV1(); 597 set_has_PopCount(); 598 set_has_LoadStoreConditional(); 599 set_has_HighWordInstr(); 600 set_has_FastSync(); 601 set_has_FPExtensions(); 602 set_has_DistinctOpnds(); 603 set_has_CryptoExt4(); 604 } 605 606 void VM_Version::set_features_ec12(bool reset) { 607 reset_features(reset); 608 609 set_features_z196(false); 610 set_has_MiscInstrExt(); 611 set_has_InterlockedAccessV2(); 612 set_has_LoadAndALUAtomicV2(); 613 set_has_TxMem(); 614 } 615 616 void VM_Version::set_features_z13(bool reset) { 617 reset_features(reset); 618 619 set_features_ec12(false); 620 set_has_LoadStoreConditional2(); 621 set_has_CryptoExt5(); 622 set_has_VectorFacility(); 623 } 624 625 void VM_Version::set_features_from(const char* march) { 626 bool err = false; 627 bool prt = false; 628 629 if ((march != NULL) && (march[0] != '\0')) { 630 const int buf_len = 16; 631 const int hdr_len = 5; 632 char buf[buf_len]; 633 if (strlen(march) >= hdr_len) { 634 memcpy(buf, march, hdr_len); 635 buf[hdr_len] = '\00'; 636 } else { 637 buf[0] = '\00'; 638 } 639 640 if (!strcmp(march, "z900")) { 641 set_features_z900(); 642 } else if (!strcmp(march, "z990")) { 643 set_features_z990(); 644 } else if (!strcmp(march, "z9")) { 645 set_features_z9(); 646 } else if (!strcmp(march, "z10")) { 647 set_features_z10(); 648 } else if (!strcmp(march, "z196")) { 649 set_features_z196(); 650 } else if (!strcmp(march, "ec12")) { 651 set_features_ec12(); 652 } else if (!strcmp(march, "z13")) { 653 set_features_z13(); 654 } else if (!strcmp(buf, "ztest")) { 655 assert(!has_TestFeaturesImpl(), "possible facility list flag conflict"); 656 if (strlen(march) > hdr_len) { 657 int itest = 0; 658 if ((strlen(march)-hdr_len) >= buf_len) err = true; 659 if (!err) { 660 memcpy(buf, &march[hdr_len], strlen(march)-hdr_len); 661 buf[strlen(march)-hdr_len] = '\00'; 662 for (size_t i = 0; !err && (i < strlen(buf)); i++) { 663 itest = itest*10 + buf[i]-'0'; 664 err = err || ((buf[i]-'0') < 0) || ((buf[i]-'0') > 9) || (itest > 15); 665 } 666 } 667 if (!err) { 668 prt = true; 669 if (itest & 0x01) { set_has_TestFeature1Impl(); } 670 if (itest & 0x02) { set_has_TestFeature2Impl(); } 671 if (itest & 0x04) { set_has_TestFeature4Impl(); } 672 if (itest & 0x08) { set_has_TestFeature8Impl(); } 673 } 674 } else { 675 prt = true; 676 set_has_TestFeature1Impl(); 677 set_has_TestFeature2Impl(); 678 set_has_TestFeature4Impl(); 679 set_has_TestFeature8Impl(); 680 } 681 } else { 682 err = true; 683 } 684 if (!err) { 685 set_features_string(); 686 if (prt || PrintAssembly) { 687 print_features_internal("CPU Version as set by cmdline option:", prt); 688 } 689 } else { 690 tty->print_cr("***Warning: Unsupported ProcessorArchitecture: %s, internal settings left undisturbed.", march); 691 } 692 } 693 694 } 695 696 static long (*getFeatures)(unsigned long*, int, int) = NULL; 697 698 void VM_Version::set_getFeatures(address entryPoint) { 699 if (getFeatures == NULL) { 700 getFeatures = (long(*)(unsigned long*, int, int))entryPoint; 701 } 702 } 703 704 long VM_Version::call_getFeatures(unsigned long* buffer, int buflen, int functionCode) { 705 VM_Version::_is_determine_features_test_running = true; 706 long functionResult = (*getFeatures)(buffer, buflen, functionCode); 707 VM_Version::_is_determine_features_test_running = false; 708 return functionResult; 709 } 710 711 // Helper function for "extract cache attribute" instruction. 712 int VM_Version::calculate_ECAG_functionCode(unsigned int attributeIndication, 713 unsigned int levelIndication, 714 unsigned int typeIndication) { 715 return (attributeIndication<<4) | (levelIndication<<1) | typeIndication; 716 } 717 718 void VM_Version::determine_features() { 719 720 const int cbuf_size = _code_buffer_len; 721 const int buf_len = _features_buffer_len; 722 723 // Allocate code buffer space for the detection code. 724 ResourceMark rm; 725 CodeBuffer cbuf("determine CPU features", cbuf_size, 0); 726 MacroAssembler* a = new MacroAssembler(&cbuf); 727 728 // Emit code. 729 set_getFeatures(a->pc()); 730 address code = a->pc(); 731 732 // Try STFLE. Possible INVOP will cause defaults to be used. 733 Label getFEATURES; 734 Label getCPUFEATURES; // fcode = -1 (cache) 735 Label getCIPHERFEATURES; // fcode = -2 (cipher) 736 Label getMSGDIGESTFEATURES; // fcode = -3 (SHA) 737 Label getVECTORFEATURES; // fcode = -4 (OS support for vector instructions) 738 Label errRTN; 739 a->z_ltgfr(Z_R0, Z_ARG2); // Buf len to r0 and test. 740 a->z_brl(getFEATURES); // negative -> Get machine features not covered by facility list. 741 a->z_lghi(Z_R1,0); 742 a->z_brz(errRTN); // zero -> Function code currently not used, indicate "aborted". 743 744 a->z_aghi(Z_R0, -1); 745 a->z_stfle(0, Z_ARG1); 746 a->z_lg(Z_R1, 0, Z_ARG1); // Get first DW of facility list. 747 a->z_lgr(Z_RET, Z_R0); // Calculate rtn value for success. 748 a->z_la(Z_RET, 1, Z_RET); 749 a->z_brnz(errRTN); // Instr failed if non-zero CC. 750 a->z_ltgr(Z_R1, Z_R1); // Instr failed if first DW == 0. 751 a->z_bcr(Assembler::bcondNotZero, Z_R14); // Successful return. 752 753 a->bind(errRTN); 754 a->z_lngr(Z_RET, Z_RET); 755 a->z_ltgr(Z_R1, Z_R1); 756 a->z_bcr(Assembler::bcondNotZero, Z_R14); // Return "buffer too small". 757 a->z_xgr(Z_RET, Z_RET); 758 a->z_br(Z_R14); // Return "operation aborted". 759 760 a->bind(getFEATURES); 761 a->z_cghi(Z_R0, -1); // -1: Extract CPU attributes, currently: cache layout only. 762 a->z_bre(getCPUFEATURES); 763 a->z_cghi(Z_R0, -2); // -2: Extract detailed crypto capabilities (cipher instructions). 764 a->z_bre(getCIPHERFEATURES); 765 a->z_cghi(Z_R0, -3); // -3: Extract detailed crypto capabilities (msg digest instructions). 766 a->z_bre(getMSGDIGESTFEATURES); 767 a->z_cghi(Z_R0, -4); // -4: Verify vector instruction availability (OS support). 768 a->z_bre(getVECTORFEATURES); 769 770 a->z_xgr(Z_RET, Z_RET); // Not a valid function code. 771 a->z_br(Z_R14); // Return "operation aborted". 772 773 // Try KIMD/KLMD query function to get details about msg digest (secure hash, SHA) instructions. 774 a->bind(getMSGDIGESTFEATURES); 775 a->z_lghi(Z_R0,(int)MsgDigest::_Query); // query function code 776 a->z_lgr(Z_R1,Z_R2); // param block addr, 2*16 bytes min size 777 a->z_kimd(Z_R2,Z_R2); // Get available KIMD functions (bit pattern in param blk). 778 a->z_la(Z_R1,16,Z_R1); // next param block addr 779 a->z_klmd(Z_R2,Z_R2); // Get available KLMD functions (bit pattern in param blk). 780 a->z_lghi(Z_RET,4); 781 a->z_br(Z_R14); 782 783 // Try KM/KMC query function to get details about crypto instructions. 784 a->bind(getCIPHERFEATURES); 785 a->z_lghi(Z_R0,(int)Cipher::_Query); // query function code 786 a->z_lgr(Z_R1,Z_R2); // param block addr, 2*16 bytes min size (KIMD/KLMD output) 787 a->z_km(Z_R2,Z_R2); // get available KM functions 788 a->z_la(Z_R1,16,Z_R1); // next param block addr 789 a->z_kmc(Z_R2,Z_R2); // get available KMC functions 790 a->z_lghi(Z_RET,4); 791 a->z_br(Z_R14); 792 793 // Use EXTRACT CPU ATTRIBUTE instruction to get information about cache layout. 794 a->bind(getCPUFEATURES); 795 a->z_xgr(Z_R0,Z_R0); // as recommended in instruction documentation 796 a->z_ecag(Z_RET,Z_R0,0,Z_ARG3); // Extract information as requested by Z_ARG1 contents. 797 a->z_br(Z_R14); 798 799 // Use a vector instruction to verify OS support. Will fail with SIGFPE if OS support is missing. 800 a->bind(getVECTORFEATURES); 801 a->z_vtm(Z_V0,Z_V0); // non-destructive vector instruction. Will cause SIGFPE if not supported. 802 a->z_br(Z_R14); 803 804 address code_end = a->pc(); 805 a->flush(); 806 807 cbuf.insts()->set_end(code_end); 808 809 // Print the detection code. 810 bool printVerbose = Verbose || PrintAssembly || PrintStubCode; 811 if (printVerbose) { 812 ttyLocker ttyl; 813 tty->print_cr("Decoding CPU feature detection stub at " INTPTR_FORMAT " before execution:", p2i(code)); 814 tty->print_cr("Stub length is %ld bytes, codebuffer reserves %d bytes, %ld bytes spare.", 815 code_end-code, cbuf_size, cbuf_size-(code_end-code)); 816 817 // Use existing decode function. This enables the [MachCode] format which is needed to DecodeErrorFile. 818 Disassembler::decode(&cbuf, code, code_end, tty); 819 } 820 821 // Prepare for detection code execution and clear work buffer. 822 _nfeatures = 0; 823 _ncipher_features = 0; 824 unsigned long buffer[buf_len]; 825 826 for (int i = 0; i < buf_len; i++) { 827 buffer[i] = 0L; 828 } 829 830 // execute code 831 // Illegal instructions will be replaced by 0 in signal handler. 832 // In case of problems, call_getFeatures will return a not-positive result. 833 long used_len = call_getFeatures(buffer, buf_len, 0); 834 835 bool ok; 836 if (used_len == 1) { 837 ok = true; 838 } else if (used_len > 1) { 839 unsigned int used_lenU = (unsigned int)used_len; 840 ok = true; 841 for (unsigned int i = 1; i < used_lenU; i++) { 842 ok = ok && (buffer[i] == 0L); 843 } 844 if (printVerbose && !ok) { 845 bool compact = false; 846 tty->print_cr("Note: feature list has %d (i.e. more than one) array elements.", used_lenU); 847 if (compact) { 848 tty->print("non-zero feature list elements:"); 849 for (unsigned int i = 0; i < used_lenU; i++) { 850 tty->print(" [%d]: 0x%16.16lx", i, buffer[i]); 851 } 852 tty->cr(); 853 } else { 854 for (unsigned int i = 0; i < used_lenU; i++) { 855 tty->print_cr("non-zero feature list[%d]: 0x%16.16lx", i, buffer[i]); 856 } 857 } 858 859 if (compact) { 860 tty->print_cr("Active features (compact view):"); 861 for (unsigned int k = 0; k < used_lenU; k++) { 862 tty->print_cr(" buffer[%d]:", k); 863 for (unsigned int j = k*sizeof(long); j < (k+1)*sizeof(long); j++) { 864 bool line = false; 865 for (unsigned int i = j*8; i < (j+1)*8; i++) { 866 bool bit = test_feature_bit(buffer, i, used_lenU*sizeof(long)*8); 867 if (bit) { 868 if (!line) { 869 tty->print(" byte[%d]:", j); 870 line = true; 871 } 872 tty->print(" [%3.3d]", i); 873 } 874 } 875 if (line) { 876 tty->cr(); 877 } 878 } 879 } 880 } else { 881 tty->print_cr("Active features (full view):"); 882 for (unsigned int k = 0; k < used_lenU; k++) { 883 tty->print_cr(" buffer[%d]:", k); 884 for (unsigned int j = k*sizeof(long); j < (k+1)*sizeof(long); j++) { 885 tty->print(" byte[%d]:", j); 886 for (unsigned int i = j*8; i < (j+1)*8; i++) { 887 bool bit = test_feature_bit(buffer, i, used_lenU*sizeof(long)*8); 888 if (bit) { 889 tty->print(" [%3.3d]", i); 890 } else { 891 tty->print(" "); 892 } 893 } 894 tty->cr(); 895 } 896 } 897 } 898 } 899 ok = true; 900 } else { // No features retrieved if we reach here. Buffer too short or instr not available. 901 if (used_len < 0) { 902 ok = false; 903 if (printVerbose) { 904 tty->print_cr("feature list buffer[%d] too short, required: buffer[%ld]", buf_len, -used_len); 905 } 906 } else { 907 if (printVerbose) { 908 tty->print_cr("feature list could not be retrieved. Running on z900 or z990? Trying to find out..."); 909 } 910 used_len = call_getFeatures(buffer, 0, 0); // Must provide at least two DW buffer elements!!!! 911 912 ok = used_len > 0; 913 if (ok) { 914 if (buffer[1]*10 < buffer[0]) { 915 set_features_z900(); 916 } else { 917 set_features_z990(); 918 } 919 920 if (printVerbose) { 921 tty->print_cr("Note: high-speed long displacement test used %ld iterations.", used_len); 922 tty->print_cr(" Positive displacement loads took %8.8lu microseconds.", buffer[1]); 923 tty->print_cr(" Negative displacement loads took %8.8lu microseconds.", buffer[0]); 924 if (has_long_displacement_fast()) { 925 tty->print_cr(" assuming high-speed long displacement IS available."); 926 } else { 927 tty->print_cr(" assuming high-speed long displacement is NOT available."); 928 } 929 } 930 } else { 931 if (printVerbose) { 932 tty->print_cr("Note: high-speed long displacement test was not successful."); 933 tty->print_cr(" assuming long displacement is NOT available."); 934 } 935 } 936 return; // Do not copy buffer to _features, no test for cipher features. 937 } 938 } 939 940 if (ok) { 941 // Fill features buffer. 942 // Clear work buffer. 943 for (int i = 0; i < buf_len; i++) { 944 _features[i] = buffer[i]; 945 _cipher_features[i] = 0; 946 _msgdigest_features[i] = 0; 947 buffer[i] = 0L; 948 } 949 _nfeatures = used_len; 950 } else { 951 for (int i = 0; i < buf_len; i++) { 952 _features[i] = 0; 953 _cipher_features[i] = 0; 954 _msgdigest_features[i] = 0; 955 buffer[i] = 0L; 956 } 957 _nfeatures = 0; 958 } 959 960 if (has_VectorFacility()) { 961 // Verify that feature can actually be used. OS support required. 962 call_getFeatures(buffer, -4, 0); 963 if (printVerbose) { 964 ttyLocker ttyl; 965 if (has_VectorFacility()) { 966 tty->print_cr(" Vector Facility has been verified to be supported by OS"); 967 } else { 968 tty->print_cr(" Vector Facility has been disabled - not supported by OS"); 969 } 970 } 971 } 972 973 // Extract Crypto Facility details. 974 if (has_Crypto()) { 975 // Get cipher features. 976 used_len = call_getFeatures(buffer, -2, 0); 977 for (int i = 0; i < buf_len; i++) { 978 _cipher_features[i] = buffer[i]; 979 } 980 _ncipher_features = used_len; 981 982 // Get msg digest features. 983 used_len = call_getFeatures(buffer, -3, 0); 984 for (int i = 0; i < buf_len; i++) { 985 _msgdigest_features[i] = buffer[i]; 986 } 987 _nmsgdigest_features = used_len; 988 } 989 990 static int levelProperties[_max_cache_levels]; // All property indications per level. 991 static int levelScope[_max_cache_levels]; // private/shared 992 static const char* levelScopeText[4] = {"No cache ", 993 "CPU private", 994 "shared ", 995 "reserved "}; 996 997 static int levelType[_max_cache_levels]; // D/I/mixed 998 static const char* levelTypeText[4] = {"separate D and I caches", 999 "I cache only ", 1000 "D-cache only ", 1001 "combined D/I cache "}; 1002 1003 static unsigned int levelReserved[_max_cache_levels]; // reserved property bits 1004 static unsigned int levelLineSize[_max_cache_levels]; 1005 static unsigned int levelTotalSize[_max_cache_levels]; 1006 static unsigned int levelAssociativity[_max_cache_levels]; 1007 1008 1009 // Extract Cache Layout details. 1010 if (has_ExtractCPUAttributes() && printVerbose) { // For information only, as of now. 1011 bool lineSize_mismatch; 1012 bool print_something; 1013 long functionResult; 1014 unsigned int attributeIndication = 0; // 0..15 1015 unsigned int levelIndication = 0; // 0..8 1016 unsigned int typeIndication = 0; // 0..1 (D-Cache, I-Cache) 1017 int functionCode = calculate_ECAG_functionCode(attributeIndication, levelIndication, typeIndication); 1018 1019 // Get cache topology. 1020 functionResult = call_getFeatures(buffer, -1, functionCode); 1021 1022 for (unsigned int i = 0; i < _max_cache_levels; i++) { 1023 if (functionResult > 0) { 1024 int shiftVal = 8*(_max_cache_levels-(i+1)); 1025 levelProperties[i] = (functionResult & (0xffUL<<shiftVal)) >> shiftVal; 1026 levelReserved[i] = (levelProperties[i] & 0xf0) >> 4; 1027 levelScope[i] = (levelProperties[i] & 0x0c) >> 2; 1028 levelType[i] = (levelProperties[i] & 0x03); 1029 } else { 1030 levelProperties[i] = 0; 1031 levelReserved[i] = 0; 1032 levelScope[i] = 0; 1033 levelType[i] = 0; 1034 } 1035 levelLineSize[i] = 0; 1036 levelTotalSize[i] = 0; 1037 levelAssociativity[i] = 0; 1038 } 1039 1040 tty->cr(); 1041 tty->print_cr("------------------------------------"); 1042 tty->print_cr("--- Cache Topology Information ---"); 1043 tty->print_cr("------------------------------------"); 1044 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1045 tty->print_cr(" Cache Level %d: <scope> %s | <type> %s", 1046 i+1, levelScopeText[levelScope[i]], levelTypeText[levelType[i]]); 1047 } 1048 1049 // Get D-cache details per level. 1050 _Dcache_lineSize = 0; 1051 lineSize_mismatch = false; 1052 print_something = false; 1053 typeIndication = 0; // 0..1 (D-Cache, I-Cache) 1054 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1055 if ((levelType[i] == 0) || (levelType[i] == 2)) { 1056 print_something = true; 1057 1058 // Get cache line size of level i. 1059 attributeIndication = 1; 1060 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1061 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1062 1063 // Get cache total size of level i. 1064 attributeIndication = 2; 1065 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1066 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1067 1068 // Get cache associativity of level i. 1069 attributeIndication = 3; 1070 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1071 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1072 1073 _Dcache_lineSize = _Dcache_lineSize == 0 ? levelLineSize[i] : _Dcache_lineSize; 1074 lineSize_mismatch = lineSize_mismatch || (_Dcache_lineSize != levelLineSize[i]); 1075 } else { 1076 levelLineSize[i] = 0; 1077 } 1078 } 1079 1080 if (print_something) { 1081 tty->cr(); 1082 tty->print_cr("------------------------------------"); 1083 tty->print_cr("--- D-Cache Detail Information ---"); 1084 tty->print_cr("------------------------------------"); 1085 if (lineSize_mismatch) { 1086 tty->print_cr("WARNING: D-Cache line size mismatch!"); 1087 } 1088 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1089 if (levelLineSize[i] > 0) { 1090 tty->print_cr(" D-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d", 1091 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]); 1092 } 1093 } 1094 } 1095 1096 // Get I-cache details per level. 1097 _Icache_lineSize = 0; 1098 lineSize_mismatch = false; 1099 print_something = false; 1100 typeIndication = 1; // 0..1 (D-Cache, I-Cache) 1101 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1102 if ((levelType[i] == 0) || (levelType[i] == 1)) { 1103 print_something = true; 1104 1105 // Get cache line size of level i. 1106 attributeIndication = 1; 1107 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1108 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1109 1110 // Get cache total size of level i. 1111 attributeIndication = 2; 1112 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1113 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1114 1115 // Get cache associativity of level i. 1116 attributeIndication = 3; 1117 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1118 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1119 1120 _Icache_lineSize = _Icache_lineSize == 0 ? levelLineSize[i] : _Icache_lineSize; 1121 lineSize_mismatch = lineSize_mismatch || (_Icache_lineSize != levelLineSize[i]); 1122 } else { 1123 levelLineSize[i] = 0; 1124 } 1125 } 1126 1127 if (print_something) { 1128 tty->cr(); 1129 tty->print_cr("------------------------------------"); 1130 tty->print_cr("--- I-Cache Detail Information ---"); 1131 tty->print_cr("------------------------------------"); 1132 if (lineSize_mismatch) { 1133 tty->print_cr("WARNING: I-Cache line size mismatch!"); 1134 } 1135 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1136 if (levelLineSize[i] > 0) { 1137 tty->print_cr(" I-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d", 1138 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]); 1139 } 1140 } 1141 } 1142 1143 // Get D/I-cache details per level. 1144 lineSize_mismatch = false; 1145 print_something = false; 1146 typeIndication = 0; // 0..1 (D-Cache, I-Cache) 1147 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1148 if (levelType[i] == 3) { 1149 print_something = true; 1150 1151 // Get cache line size of level i. 1152 attributeIndication = 1; 1153 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1154 levelLineSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1155 1156 // Get cache total size of level i. 1157 attributeIndication = 2; 1158 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1159 levelTotalSize[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1160 1161 // Get cache associativity of level i. 1162 attributeIndication = 3; 1163 functionCode = calculate_ECAG_functionCode(attributeIndication, i, typeIndication); 1164 levelAssociativity[i] = (unsigned int)call_getFeatures(buffer, -1, functionCode); 1165 1166 _Dcache_lineSize = _Dcache_lineSize == 0 ? levelLineSize[i] : _Dcache_lineSize; 1167 _Icache_lineSize = _Icache_lineSize == 0 ? levelLineSize[i] : _Icache_lineSize; 1168 lineSize_mismatch = lineSize_mismatch || (_Dcache_lineSize != levelLineSize[i]) 1169 || (_Icache_lineSize != levelLineSize[i]); 1170 } else { 1171 levelLineSize[i] = 0; 1172 } 1173 } 1174 1175 if (print_something) { 1176 tty->cr(); 1177 tty->print_cr("--------------------------------------"); 1178 tty->print_cr("--- D/I-Cache Detail Information ---"); 1179 tty->print_cr("--------------------------------------"); 1180 if (lineSize_mismatch) { 1181 tty->print_cr("WARNING: D/I-Cache line size mismatch!"); 1182 } 1183 for (unsigned int i = 0; (i < _max_cache_levels) && (levelProperties[i] != 0); i++) { 1184 if (levelLineSize[i] > 0) { 1185 tty->print_cr(" D/I-Cache Level %d: line size = %4d, total size = %6dKB, associativity = %2d", 1186 i+1, levelLineSize[i], levelTotalSize[i]/(int)K, levelAssociativity[i]); 1187 } 1188 } 1189 } 1190 tty->cr(); 1191 } 1192 return; 1193 } 1194 1195 unsigned long VM_Version::z_SIGILL() { 1196 unsigned long ZeroBuffer = 0; 1197 unsigned long work; 1198 asm( 1199 " LA %[work],%[buffer] \n\t" // Load address of buffer. 1200 " LARL 14,+6 \n\t" // Load address of faulting instruction. 1201 " BCR 15,%[work] \n\t" // Branch into buffer, execute whatever is in there. 1202 : [buffer] "+Q" (ZeroBuffer) /* outputs */ 1203 , [work] "=&a" (work) /* outputs */ 1204 : /* inputs */ 1205 : "cc" /* clobbered */ 1206 ); 1207 return ZeroBuffer; 1208 } 1209 1210 unsigned long VM_Version::z_SIGSEGV() { 1211 unsigned long ZeroBuffer = 0; 1212 unsigned long work; 1213 asm( 1214 " LG %[work],%[buffer] \n\t" // Load zero address. 1215 " STG %[work],0(,%[work])\n\t" // Store to address zero. 1216 : [buffer] "+Q" (ZeroBuffer) /* outputs */ 1217 , [work] "=&a" (work) /* outputs */ 1218 : /* inputs */ 1219 : "cc" /* clobbered */ 1220 ); 1221 return ZeroBuffer; 1222 } 1223