16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef CPU_ARM_DISASSEMBLER_ARM_HPP
26 #define CPU_ARM_DISASSEMBLER_ARM_HPP
27
28 static int pd_instruction_alignment() {
29 return sizeof(int);
30 }
31
32 static const char* pd_cpu_opts() {
33 return "";
34 }
35
36 #endif // CPU_ARM_DISASSEMBLER_ARM_HPP
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16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #ifndef CPU_ARM_DISASSEMBLER_ARM_HPP
26 #define CPU_ARM_DISASSEMBLER_ARM_HPP
27
28 static int pd_instruction_alignment() {
29 return sizeof(int);
30 }
31
32 static const char* pd_cpu_opts() {
33 return "";
34 }
35
36 // Returns address of n-th instruction preceding addr,
37 // NULL if no preceding instruction can be found.
38 // On ARM, we assume a constant instruction length.
39 // It might be beneficial to check "is_readable" as we do on ppc and s390.
40 static address find_prev_instr(address addr, int n_instr) {
41 return addr - Assembler::InstructionSize*n_instr;
42 }
43
44 // special-case instruction decoding.
45 // There may be cases where the binutils disassembler doesn't do
46 // the perfect job. In those cases, decode_instruction0 may kick in
47 // and do it right.
48 // If nothing had to be done, just return "here", otherwise return "here + instr_len(here)"
49 static address decode_instruction0(address here, outputStream* st, address virtual_begin = NULL) {
50 return here;
51 }
52
53 // platform-specific instruction annotations (like value of loaded constants)
54 static void annotate(address pc, outputStream* st) { };
55
56 #endif // CPU_ARM_DISASSEMBLER_ARM_HPP
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