1 /*
   2  * Copyright (c) 2002, 2019, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2012, 2019 SAP SE. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
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  25 
  26 #ifndef CPU_PPC_DISASSEMBLER_PPC_HPP
  27 #define CPU_PPC_DISASSEMBLER_PPC_HPP
  28 
  29   static int pd_instruction_alignment() {
  30     return sizeof(int);
  31   }
  32 
  33   static const char* pd_cpu_opts() {
  34     return "ppc64";
  35   }
  36 
  37   // Find preceding instruction.
  38   //
  39   // Starting at the passed location, the n-th preceding (towards lower addresses)
  40   // location is searched, the contents of which - if interpreted as
  41   // instructions - has the passed location as n-th successor.
  42   //  - If no such location exists, NULL is returned. The caller should then
  43   //    terminate its search and react properly.
  44   static address find_prev_instr(address here, int n_instr);
  45 
  46   // special-case instruction decoding.
  47   // There may be cases where the binutils disassembler doesn't do
  48   // the perfect job. In those cases, decode_instruction0 may kick in
  49   // and do it right.
  50   // If nothing had to be done, just return "here", otherwise return "here + instr_len(here)"
  51   static address decode_instruction0(address here, outputStream* st, address virtual_begin = NULL);
  52 
  53   // platform-specific instruction annotations (like value of loaded constants)
  54   static void annotate(address pc, outputStream* st);
  55 
  56 #endif // CPU_PPC_DISASSEMBLER_PPC_HPP