1 /*
   2  * Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2016, 2018 SAP SE. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.
  23  *
  24  */
  25 
  26 #ifndef OS_CPU_LINUX_S390_VM_ATOMIC_LINUX_S390_INLINE_HPP
  27 #define OS_CPU_LINUX_S390_VM_ATOMIC_LINUX_S390_INLINE_HPP
  28 
  29 #include "runtime/atomic.hpp"
  30 #include "runtime/os.hpp"
  31 #include "vm_version_s390.hpp"
  32 
  33 // Note that the compare-and-swap instructions on System z perform
  34 // a serialization function before the storage operand is fetched
  35 // and again after the operation is completed.
  36 //
  37 // Used constraint modifiers:
  38 // = write-only access: Value on entry to inline-assembler code irrelevant.
  39 // + read/write access: Value on entry is used; on exit value is changed.
  40 //   read-only  access: Value on entry is used and never changed.
  41 // & early-clobber access: Might be modified before all read-only operands
  42 //                         have been used.
  43 // a address register operand (not GR0).
  44 // d general register operand (including GR0)
  45 // Q memory operand w/o index register.
  46 // 0..9 operand reference (by operand position).
  47 //      Used for operands that fill multiple roles. One example would be a
  48 //      write-only operand receiving its initial value from a read-only operand.
  49 //      Refer to cmpxchg(..) operand #0 and variable cmp_val for a real-life example.
  50 //
  51 

   1 /*
   2  * Copyright (c) 2016, 2018, Oracle and/or its affiliates. All rights reserved.
   3  * Copyright (c) 2016, 2019 SAP SE. All rights reserved.
   4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   5  *
   6  * This code is free software; you can redistribute it and/or modify it
   7  * under the terms of the GNU General Public License version 2 only, as
   8  * published by the Free Software Foundation.
   9  *
  10  * This code is distributed in the hope that it will be useful, but WITHOUT
  11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  13  * version 2 for more details (a copy is included in the LICENSE file that
  14  * accompanied this code).
  15  *
  16  * You should have received a copy of the GNU General Public License version
  17  * 2 along with this work; if not, write to the Free Software Foundation,
  18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  19  *
  20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  21  * or visit www.oracle.com if you need additional information or have any
  22  * questions.
  23  *
  24  */
  25 
  26 #ifndef OS_CPU_LINUX_S390_VM_ATOMIC_LINUX_S390_INLINE_HPP
  27 #define OS_CPU_LINUX_S390_VM_ATOMIC_LINUX_S390_INLINE_HPP
  28 
  29 #include "runtime/atomic.hpp"
  30 #include "runtime/os.hpp"
  31 #include "runtime/vm_version.hpp"
  32 
  33 // Note that the compare-and-swap instructions on System z perform
  34 // a serialization function before the storage operand is fetched
  35 // and again after the operation is completed.
  36 //
  37 // Used constraint modifiers:
  38 // = write-only access: Value on entry to inline-assembler code irrelevant.
  39 // + read/write access: Value on entry is used; on exit value is changed.
  40 //   read-only  access: Value on entry is used and never changed.
  41 // & early-clobber access: Might be modified before all read-only operands
  42 //                         have been used.
  43 // a address register operand (not GR0).
  44 // d general register operand (including GR0)
  45 // Q memory operand w/o index register.
  46 // 0..9 operand reference (by operand position).
  47 //      Used for operands that fill multiple roles. One example would be a
  48 //      write-only operand receiving its initial value from a read-only operand.
  49 //      Refer to cmpxchg(..) operand #0 and variable cmp_val for a real-life example.
  50 //
  51