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src/hotspot/cpu/x86/vm_version_x86.cpp

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1579   if (FLAG_IS_DEFAULT(PrefetchCopyIntervalInBytes)) {
1580     FLAG_SET_DEFAULT(PrefetchCopyIntervalInBytes, 576);
1581   }
1582   if (FLAG_IS_DEFAULT(PrefetchScanIntervalInBytes)) {
1583     FLAG_SET_DEFAULT(PrefetchScanIntervalInBytes, 576);
1584   }
1585   if (FLAG_IS_DEFAULT(PrefetchFieldsAhead)) {
1586     FLAG_SET_DEFAULT(PrefetchFieldsAhead, 1);
1587   }
1588 #endif
1589 
1590   if (FLAG_IS_DEFAULT(ContendedPaddingWidth) &&
1591      (cache_line_size > ContendedPaddingWidth))
1592      ContendedPaddingWidth = cache_line_size;
1593 
1594   // This machine allows unaligned memory accesses
1595   if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) {
1596     FLAG_SET_DEFAULT(UseUnalignedAccesses, true);
1597   }
1598 




1599 #ifndef PRODUCT
1600   if (log_is_enabled(Info, os, cpu)) {
1601     LogStream ls(Log(os, cpu)::info());
1602     outputStream* log = &ls;
1603     log->print_cr("Logical CPUs per core: %u",
1604                   logical_processors_per_package());
1605     log->print_cr("L1 data cache line size: %u", L1_data_cache_line_size());
1606     log->print("UseSSE=%d", (int) UseSSE);
1607     if (UseAVX > 0) {
1608       log->print("  UseAVX=%d", (int) UseAVX);
1609     }
1610     if (UseAES) {
1611       log->print("  UseAES=1");
1612     }
1613 #ifdef COMPILER2
1614     if (MaxVectorSize > 0) {
1615       log->print("  MaxVectorSize=%d", (int) MaxVectorSize);
1616     }
1617 #endif
1618     log->cr();

1579   if (FLAG_IS_DEFAULT(PrefetchCopyIntervalInBytes)) {
1580     FLAG_SET_DEFAULT(PrefetchCopyIntervalInBytes, 576);
1581   }
1582   if (FLAG_IS_DEFAULT(PrefetchScanIntervalInBytes)) {
1583     FLAG_SET_DEFAULT(PrefetchScanIntervalInBytes, 576);
1584   }
1585   if (FLAG_IS_DEFAULT(PrefetchFieldsAhead)) {
1586     FLAG_SET_DEFAULT(PrefetchFieldsAhead, 1);
1587   }
1588 #endif
1589 
1590   if (FLAG_IS_DEFAULT(ContendedPaddingWidth) &&
1591      (cache_line_size > ContendedPaddingWidth))
1592      ContendedPaddingWidth = cache_line_size;
1593 
1594   // This machine allows unaligned memory accesses
1595   if (FLAG_IS_DEFAULT(UseUnalignedAccesses)) {
1596     FLAG_SET_DEFAULT(UseUnalignedAccesses, true);
1597   }
1598 
1599   if (FLAG_IS_DEFAULT(UseMD5Intrinsics)) {
1600     UseMD5Intrinsics = true;
1601   }
1602 
1603 #ifndef PRODUCT
1604   if (log_is_enabled(Info, os, cpu)) {
1605     LogStream ls(Log(os, cpu)::info());
1606     outputStream* log = &ls;
1607     log->print_cr("Logical CPUs per core: %u",
1608                   logical_processors_per_package());
1609     log->print_cr("L1 data cache line size: %u", L1_data_cache_line_size());
1610     log->print("UseSSE=%d", (int) UseSSE);
1611     if (UseAVX > 0) {
1612       log->print("  UseAVX=%d", (int) UseAVX);
1613     }
1614     if (UseAES) {
1615       log->print("  UseAES=1");
1616     }
1617 #ifdef COMPILER2
1618     if (MaxVectorSize > 0) {
1619       log->print("  MaxVectorSize=%d", (int) MaxVectorSize);
1620     }
1621 #endif
1622     log->cr();
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