13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #ifndef CPU_PPC_VM_MACROASSEMBLER_PPC_INLINE_HPP
27 #define CPU_PPC_VM_MACROASSEMBLER_PPC_INLINE_HPP
28
29 #include "asm/assembler.inline.hpp"
30 #include "asm/macroAssembler.hpp"
31 #include "asm/codeBuffer.hpp"
32 #include "code/codeCache.hpp"
33
34 inline bool MacroAssembler::is_ld_largeoffset(address a) {
35 const int inst1 = *(int *)a;
36 const int inst2 = *(int *)(a+4);
37 return (is_ld(inst1)) ||
38 (is_addis(inst1) && is_ld(inst2) && inv_ra_field(inst2) == inv_rt_field(inst1));
39 }
40
41 inline int MacroAssembler::get_ld_largeoffset_offset(address a) {
42 assert(MacroAssembler::is_ld_largeoffset(a), "must be ld with large offset");
43
44 const int inst1 = *(int *)a;
45 if (is_ld(inst1)) {
46 return inv_d1_field(inst1);
47 } else {
48 const int inst2 = *(int *)(a+4);
49 return (inv_d1_field(inst1) << 16) + inv_d1_field(inst2);
50 }
51 }
52
244 inline address MacroAssembler::call_stub(Register function_entry) {
245 mtctr(function_entry);
246 bctrl();
247 return pc();
248 }
249
250 inline void MacroAssembler::call_stub_and_return_to(Register function_entry, Register return_pc) {
251 assert_different_registers(function_entry, return_pc);
252 mtlr(return_pc);
253 mtctr(function_entry);
254 bctr();
255 }
256
257 // Get the pc where the last emitted call will return to.
258 inline address MacroAssembler::last_calls_return_pc() {
259 return _last_calls_return_pc;
260 }
261
262 // Read from the polling page, its address is already in a register.
263 inline void MacroAssembler::load_from_polling_page(Register polling_page_address, int offset) {
264 ld(R0, offset, polling_page_address);
265 }
266
267 // Trap-instruction-based checks.
268
269 inline void MacroAssembler::trap_null_check(Register a, trap_to_bits cmp) {
270 assert(TrapBasedNullChecks, "sanity");
271 tdi(cmp, a/*reg a*/, 0);
272 }
273 inline void MacroAssembler::trap_zombie_not_entrant() {
274 tdi(traptoUnconditional, 0/*reg 0*/, 1);
275 }
276 inline void MacroAssembler::trap_should_not_reach_here() {
277 tdi_unchecked(traptoUnconditional, 0/*reg 0*/, 2);
278 }
279
280 inline void MacroAssembler::trap_ic_miss_check(Register a, Register b) {
281 td(traptoGreaterThanUnsigned | traptoLessThanUnsigned, a, b);
282 }
283
284 // Do an explicit null check if access to a+offset will not raise a SIGSEGV.
|
13 * version 2 for more details (a copy is included in the LICENSE file that
14 * accompanied this code).
15 *
16 * You should have received a copy of the GNU General Public License version
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #ifndef CPU_PPC_VM_MACROASSEMBLER_PPC_INLINE_HPP
27 #define CPU_PPC_VM_MACROASSEMBLER_PPC_INLINE_HPP
28
29 #include "asm/assembler.inline.hpp"
30 #include "asm/macroAssembler.hpp"
31 #include "asm/codeBuffer.hpp"
32 #include "code/codeCache.hpp"
33 #include "runtime/safepointMechanism.hpp"
34
35 inline bool MacroAssembler::is_ld_largeoffset(address a) {
36 const int inst1 = *(int *)a;
37 const int inst2 = *(int *)(a+4);
38 return (is_ld(inst1)) ||
39 (is_addis(inst1) && is_ld(inst2) && inv_ra_field(inst2) == inv_rt_field(inst1));
40 }
41
42 inline int MacroAssembler::get_ld_largeoffset_offset(address a) {
43 assert(MacroAssembler::is_ld_largeoffset(a), "must be ld with large offset");
44
45 const int inst1 = *(int *)a;
46 if (is_ld(inst1)) {
47 return inv_d1_field(inst1);
48 } else {
49 const int inst2 = *(int *)(a+4);
50 return (inv_d1_field(inst1) << 16) + inv_d1_field(inst2);
51 }
52 }
53
245 inline address MacroAssembler::call_stub(Register function_entry) {
246 mtctr(function_entry);
247 bctrl();
248 return pc();
249 }
250
251 inline void MacroAssembler::call_stub_and_return_to(Register function_entry, Register return_pc) {
252 assert_different_registers(function_entry, return_pc);
253 mtlr(return_pc);
254 mtctr(function_entry);
255 bctr();
256 }
257
258 // Get the pc where the last emitted call will return to.
259 inline address MacroAssembler::last_calls_return_pc() {
260 return _last_calls_return_pc;
261 }
262
263 // Read from the polling page, its address is already in a register.
264 inline void MacroAssembler::load_from_polling_page(Register polling_page_address, int offset) {
265 if (SafepointMechanism::uses_thread_local_poll() && USE_POLL_BIT_ONLY) {
266 int encoding = SafepointMechanism::poll_bit();
267 tdi(traptoGreaterThanUnsigned | traptoEqual, polling_page_address, encoding);
268 } else {
269 ld(R0, offset, polling_page_address);
270 }
271 }
272
273 // Trap-instruction-based checks.
274
275 inline void MacroAssembler::trap_null_check(Register a, trap_to_bits cmp) {
276 assert(TrapBasedNullChecks, "sanity");
277 tdi(cmp, a/*reg a*/, 0);
278 }
279 inline void MacroAssembler::trap_zombie_not_entrant() {
280 tdi(traptoUnconditional, 0/*reg 0*/, 1);
281 }
282 inline void MacroAssembler::trap_should_not_reach_here() {
283 tdi_unchecked(traptoUnconditional, 0/*reg 0*/, 2);
284 }
285
286 inline void MacroAssembler::trap_ic_miss_check(Register a, Register b) {
287 td(traptoGreaterThanUnsigned | traptoLessThanUnsigned, a, b);
288 }
289
290 // Do an explicit null check if access to a+offset will not raise a SIGSEGV.
|