src/hotspot/os_cpu/linux_s390/atomic_linux_s390.hpp

rev 49845 : 8202080: Introduce ordering semantics for Atomic::add
Reviewed-by:

*** 71,86 ****
  template<size_t byte_size>
  struct Atomic::PlatformAdd
    : Atomic::AddAndFetch<Atomic::PlatformAdd<byte_size> >
  {
    template<typename I, typename D>
!   D add_and_fetch(I add_value, D volatile* dest) const;
  };
  
  template<>
  template<typename I, typename D>
! inline D Atomic::PlatformAdd<4>::add_and_fetch(I inc, D volatile* dest) const {
    STATIC_ASSERT(4 == sizeof(I));
    STATIC_ASSERT(4 == sizeof(D));
  
    D old, upd;
  
--- 71,87 ----
  template<size_t byte_size>
  struct Atomic::PlatformAdd
    : Atomic::AddAndFetch<Atomic::PlatformAdd<byte_size> >
  {
    template<typename I, typename D>
!   D add_and_fetch(I add_value, D volatile* dest, cmpxchg_memory_order order) const;
  };
  
  template<>
  template<typename I, typename D>
! inline D Atomic::PlatformAdd<4>::add_and_fetch(I inc, D volatile* dest,
!                                                cmpxchg_memory_order order) const {
    STATIC_ASSERT(4 == sizeof(I));
    STATIC_ASSERT(4 == sizeof(D));
  
    D old, upd;
  
*** 104,113 ****
--- 105,117 ----
        //---<  inputs  >---
        : [inc]  "a"   (inc)    // read-only.
        //---<  clobbered  >---
        : "cc", "r0", "r2", "r3", "memory"
      );
+     if (order == memory_order_conservative) {
+       __asm__ __volatile__ ("bcr 14, 0" : : : "memory");
+     }
    } else {
      __asm__ __volatile__ (
        "   LLGF     %[old],%[mem]           \n\t" // get old value
        "0: LA       %[upd],0(%[inc],%[old]) \n\t" // calc result
        "   CS       %[old],%[upd],%[mem]    \n\t" // try to xchg res with mem
*** 127,137 ****
  }
  
  
  template<>
  template<typename I, typename D>
! inline D Atomic::PlatformAdd<8>::add_and_fetch(I inc, D volatile* dest) const {
    STATIC_ASSERT(8 == sizeof(I));
    STATIC_ASSERT(8 == sizeof(D));
  
    D old, upd;
  
--- 131,142 ----
  }
  
  
  template<>
  template<typename I, typename D>
! inline D Atomic::PlatformAdd<8>::add_and_fetch(I inc, D volatile* dest,
!                                                cmpxchg_memory_order order) const {
    STATIC_ASSERT(8 == sizeof(I));
    STATIC_ASSERT(8 == sizeof(D));
  
    D old, upd;
  
*** 155,164 ****
--- 160,172 ----
        //---<  inputs  >---
        : [inc]  "a"   (inc)    // read-only.
        //---<  clobbered  >---
        : "cc", "r0", "r2", "r3", "memory"
      );
+     if (order == memory_order_conservative) {
+       __asm__ __volatile__ ("bcr 14, 0" : : : "memory");
+     }
    } else {
      __asm__ __volatile__ (
        "   LG       %[old],%[mem]           \n\t" // get old value
        "0: LA       %[upd],0(%[inc],%[old]) \n\t" // calc result
        "   CSG      %[old],%[upd],%[mem]    \n\t" // try to xchg res with mem