17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #ifndef CPU_AARCH64_GLOBALDEFINITIONS_AARCH64_HPP
27 #define CPU_AARCH64_GLOBALDEFINITIONS_AARCH64_HPP
28
29 const int StackAlignmentInBytes = 16;
30
31 // Indicates whether the C calling conventions require that
32 // 32-bit integer argument values are extended to 64 bits.
33 const bool CCallingConventionRequiresIntsAsLongs = false;
34
35 #define SUPPORTS_NATIVE_CX8
36
37 // According to the ARMv8 ARM, "Concurrent modification and execution
38 // of instructions can lead to the resulting instruction performing
39 // any behavior that can be achieved by executing any sequence of
40 // instructions that can be executed from the same Exception level,
41 // except where the instruction before modification and the
42 // instruction after modification is a B, BL, NOP, BKPT, SVC, HVC, or
43 // SMC instruction."
44 //
45 // This makes the games we play when patching difficult, so when we
46 // come across an access that needs patching we deoptimize. There are
47 // ways we can avoid this, but these would slow down C1-compiled code
48 // in the defauilt case. We could revisit this decision if we get any
49 // evidence that it's worth doing.
50 #define DEOPTIMIZE_WHEN_PATCHING
51
52 #define SUPPORT_RESERVED_STACK_AREA
53
54 #define THREAD_LOCAL_POLL
55
56 #endif // CPU_AARCH64_GLOBALDEFINITIONS_AARCH64_HPP
|
17 * 2 along with this work; if not, write to the Free Software Foundation,
18 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21 * or visit www.oracle.com if you need additional information or have any
22 * questions.
23 *
24 */
25
26 #ifndef CPU_AARCH64_GLOBALDEFINITIONS_AARCH64_HPP
27 #define CPU_AARCH64_GLOBALDEFINITIONS_AARCH64_HPP
28
29 const int StackAlignmentInBytes = 16;
30
31 // Indicates whether the C calling conventions require that
32 // 32-bit integer argument values are extended to 64 bits.
33 const bool CCallingConventionRequiresIntsAsLongs = false;
34
35 #define SUPPORTS_NATIVE_CX8
36
37 // aarch64 is not CPU_MULTI_COPY_ATOMIC
38
39 // According to the ARMv8 ARM, "Concurrent modification and execution
40 // of instructions can lead to the resulting instruction performing
41 // any behavior that can be achieved by executing any sequence of
42 // instructions that can be executed from the same Exception level,
43 // except where the instruction before modification and the
44 // instruction after modification is a B, BL, NOP, BKPT, SVC, HVC, or
45 // SMC instruction."
46 //
47 // This makes the games we play when patching difficult, so when we
48 // come across an access that needs patching we deoptimize. There are
49 // ways we can avoid this, but these would slow down C1-compiled code
50 // in the defauilt case. We could revisit this decision if we get any
51 // evidence that it's worth doing.
52 #define DEOPTIMIZE_WHEN_PATCHING
53
54 #define SUPPORT_RESERVED_STACK_AREA
55
56 #define THREAD_LOCAL_POLL
57
58 #endif // CPU_AARCH64_GLOBALDEFINITIONS_AARCH64_HPP
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