1 /*
   2  * Copyright (c) 2003, 2019, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
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  22  *
  23  */
  24 
  25 #ifndef OS_CPU_SOLARIS_SPARC_ORDERACCESS_SOLARIS_SPARC_HPP
  26 #define OS_CPU_SOLARIS_SPARC_ORDERACCESS_SOLARIS_SPARC_HPP
  27 
  28 // Included in orderAccess.hpp header file.
  29 
  30 // Compiler version last used for testing: solaris studio 12u3
  31 // Please update this information when this file changes
  32 
  33 // Implementation of class OrderAccess.
  34 
  35 // Assume TSO.
  36 
  37 // A compiler barrier, forcing the C++ compiler to invalidate all memory assumptions
  38 inline void compiler_barrier() {
  39   __asm__ volatile ("" : : : "memory");
  40 }
  41 
  42 inline void OrderAccess::loadload()   { compiler_barrier(); }
  43 inline void OrderAccess::storestore() { compiler_barrier(); }
  44 inline void OrderAccess::loadstore()  { compiler_barrier(); }
  45 inline void OrderAccess::storeload()  { fence();            }
  46 
  47 inline void OrderAccess::acquire()    { compiler_barrier(); }
  48 inline void OrderAccess::release()    { compiler_barrier(); }
  49 
  50 inline void OrderAccess::fence() {
  51   __asm__ volatile ("membar  #StoreLoad" : : : "memory");
  52 }
  53 
  54 inline void OrderAccess::cross_modify_fence() { }
  55 
  56 #endif // OS_CPU_SOLARIS_SPARC_ORDERACCESS_SOLARIS_SPARC_HPP