1 /* 2 * Copyright (c) 2000, 2017, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #include "precompiled.hpp" 26 #include "c1/c1_InstructionPrinter.hpp" 27 #include "c1/c1_LIR.hpp" 28 #include "c1/c1_LIRAssembler.hpp" 29 #include "c1/c1_ValueStack.hpp" 30 #include "ci/ciInstance.hpp" 31 #include "runtime/sharedRuntime.hpp" 32 33 Register LIR_OprDesc::as_register() const { 34 return FrameMap::cpu_rnr2reg(cpu_regnr()); 35 } 36 37 Register LIR_OprDesc::as_register_lo() const { 38 return FrameMap::cpu_rnr2reg(cpu_regnrLo()); 39 } 40 41 Register LIR_OprDesc::as_register_hi() const { 42 return FrameMap::cpu_rnr2reg(cpu_regnrHi()); 43 } 44 45 LIR_Opr LIR_OprFact::illegalOpr = LIR_OprFact::illegal(); 46 47 LIR_Opr LIR_OprFact::value_type(ValueType* type) { 48 ValueTag tag = type->tag(); 49 switch (tag) { 50 case metaDataTag : { 51 ClassConstant* c = type->as_ClassConstant(); 52 if (c != NULL && !c->value()->is_loaded()) { 53 return LIR_OprFact::metadataConst(NULL); 54 } else if (c != NULL) { 55 return LIR_OprFact::metadataConst(c->value()->constant_encoding()); 56 } else { 57 MethodConstant* m = type->as_MethodConstant(); 58 assert (m != NULL, "not a class or a method?"); 59 return LIR_OprFact::metadataConst(m->value()->constant_encoding()); 60 } 61 } 62 case objectTag : { 63 return LIR_OprFact::oopConst(type->as_ObjectType()->encoding()); 64 } 65 case addressTag: return LIR_OprFact::addressConst(type->as_AddressConstant()->value()); 66 case intTag : return LIR_OprFact::intConst(type->as_IntConstant()->value()); 67 case floatTag : return LIR_OprFact::floatConst(type->as_FloatConstant()->value()); 68 case longTag : return LIR_OprFact::longConst(type->as_LongConstant()->value()); 69 case doubleTag : return LIR_OprFact::doubleConst(type->as_DoubleConstant()->value()); 70 default: ShouldNotReachHere(); return LIR_OprFact::intConst(-1); 71 } 72 } 73 74 75 //--------------------------------------------------- 76 77 78 LIR_Address::Scale LIR_Address::scale(BasicType type) { 79 int elem_size = type2aelembytes(type); 80 switch (elem_size) { 81 case 1: return LIR_Address::times_1; 82 case 2: return LIR_Address::times_2; 83 case 4: return LIR_Address::times_4; 84 case 8: return LIR_Address::times_8; 85 } 86 ShouldNotReachHere(); 87 return LIR_Address::times_1; 88 } 89 90 //--------------------------------------------------- 91 92 char LIR_OprDesc::type_char(BasicType t) { 93 switch (t) { 94 case T_ARRAY: 95 t = T_OBJECT; 96 case T_BOOLEAN: 97 case T_CHAR: 98 case T_FLOAT: 99 case T_DOUBLE: 100 case T_BYTE: 101 case T_SHORT: 102 case T_INT: 103 case T_LONG: 104 case T_OBJECT: 105 case T_ADDRESS: 106 case T_VOID: 107 return ::type2char(t); 108 case T_METADATA: 109 return 'M'; 110 case T_ILLEGAL: 111 return '?'; 112 113 default: 114 ShouldNotReachHere(); 115 return '?'; 116 } 117 } 118 119 #ifndef PRODUCT 120 void LIR_OprDesc::validate_type() const { 121 122 #ifdef ASSERT 123 if (!is_pointer() && !is_illegal()) { 124 OprKind kindfield = kind_field(); // Factored out because of compiler bug, see 8002160 125 switch (as_BasicType(type_field())) { 126 case T_LONG: 127 assert((kindfield == cpu_register || kindfield == stack_value) && 128 size_field() == double_size, "must match"); 129 break; 130 case T_FLOAT: 131 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI) 132 assert((kindfield == fpu_register || kindfield == stack_value 133 ARM_ONLY(|| kindfield == cpu_register) 134 PPC32_ONLY(|| kindfield == cpu_register) ) && 135 size_field() == single_size, "must match"); 136 break; 137 case T_DOUBLE: 138 // FP return values can be also in CPU registers on ARM and PPC32 (softfp ABI) 139 assert((kindfield == fpu_register || kindfield == stack_value 140 ARM_ONLY(|| kindfield == cpu_register) 141 PPC32_ONLY(|| kindfield == cpu_register) ) && 142 size_field() == double_size, "must match"); 143 break; 144 case T_BOOLEAN: 145 case T_CHAR: 146 case T_BYTE: 147 case T_SHORT: 148 case T_INT: 149 case T_ADDRESS: 150 case T_OBJECT: 151 case T_METADATA: 152 case T_ARRAY: 153 assert((kindfield == cpu_register || kindfield == stack_value) && 154 size_field() == single_size, "must match"); 155 break; 156 157 case T_ILLEGAL: 158 // XXX TKR also means unknown right now 159 // assert(is_illegal(), "must match"); 160 break; 161 162 default: 163 ShouldNotReachHere(); 164 } 165 } 166 #endif 167 168 } 169 #endif // PRODUCT 170 171 172 bool LIR_OprDesc::is_oop() const { 173 if (is_pointer()) { 174 return pointer()->is_oop_pointer(); 175 } else { 176 OprType t= type_field(); 177 assert(t != unknown_type, "not set"); 178 return t == object_type; 179 } 180 } 181 182 183 184 void LIR_Op2::verify() const { 185 #ifdef ASSERT 186 switch (code()) { 187 case lir_cmove: 188 case lir_xchg: 189 break; 190 191 default: 192 assert(!result_opr()->is_register() || !result_opr()->is_oop_register(), 193 "can't produce oops from arith"); 194 } 195 196 if (TwoOperandLIRForm) { 197 198 #ifdef ASSERT 199 bool threeOperandForm = false; 200 #ifdef S390 201 // There are 3 operand shifts on S390 (see LIR_Assembler::shift_op()). 202 threeOperandForm = 203 code() == lir_shl || 204 ((code() == lir_shr || code() == lir_ushr) && (result_opr()->is_double_cpu() || in_opr1()->type() == T_OBJECT)); 205 #endif 206 #endif 207 208 switch (code()) { 209 case lir_add: 210 case lir_sub: 211 case lir_mul: 212 case lir_mul_strictfp: 213 case lir_div: 214 case lir_div_strictfp: 215 case lir_rem: 216 case lir_logic_and: 217 case lir_logic_or: 218 case lir_logic_xor: 219 case lir_shl: 220 case lir_shr: 221 assert(in_opr1() == result_opr() || threeOperandForm, "opr1 and result must match"); 222 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); 223 break; 224 225 // special handling for lir_ushr because of write barriers 226 case lir_ushr: 227 assert(in_opr1() == result_opr() || in_opr2()->is_constant() || threeOperandForm, "opr1 and result must match or shift count is constant"); 228 assert(in_opr1()->is_valid() && in_opr2()->is_valid(), "must be valid"); 229 break; 230 231 default: 232 break; 233 } 234 } 235 #endif 236 } 237 238 239 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block) 240 : LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 241 , _cond(cond) 242 , _type(type) 243 , _label(block->label()) 244 , _block(block) 245 , _ublock(NULL) 246 , _stub(NULL) { 247 } 248 249 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, CodeStub* stub) : 250 LIR_Op(lir_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 251 , _cond(cond) 252 , _type(type) 253 , _label(stub->entry()) 254 , _block(NULL) 255 , _ublock(NULL) 256 , _stub(stub) { 257 } 258 259 LIR_OpBranch::LIR_OpBranch(LIR_Condition cond, BasicType type, BlockBegin* block, BlockBegin* ublock) 260 : LIR_Op(lir_cond_float_branch, LIR_OprFact::illegalOpr, (CodeEmitInfo*)NULL) 261 , _cond(cond) 262 , _type(type) 263 , _label(block->label()) 264 , _block(block) 265 , _ublock(ublock) 266 , _stub(NULL) 267 { 268 } 269 270 void LIR_OpBranch::change_block(BlockBegin* b) { 271 assert(_block != NULL, "must have old block"); 272 assert(_block->label() == label(), "must be equal"); 273 274 _block = b; 275 _label = b->label(); 276 } 277 278 void LIR_OpBranch::change_ublock(BlockBegin* b) { 279 assert(_ublock != NULL, "must have old block"); 280 _ublock = b; 281 } 282 283 void LIR_OpBranch::negate_cond() { 284 switch (_cond) { 285 case lir_cond_equal: _cond = lir_cond_notEqual; break; 286 case lir_cond_notEqual: _cond = lir_cond_equal; break; 287 case lir_cond_less: _cond = lir_cond_greaterEqual; break; 288 case lir_cond_lessEqual: _cond = lir_cond_greater; break; 289 case lir_cond_greaterEqual: _cond = lir_cond_less; break; 290 case lir_cond_greater: _cond = lir_cond_lessEqual; break; 291 default: ShouldNotReachHere(); 292 } 293 } 294 295 296 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr result, LIR_Opr object, ciKlass* klass, 297 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, 298 bool fast_check, CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, 299 CodeStub* stub) 300 301 : LIR_Op(code, result, NULL) 302 , _object(object) 303 , _array(LIR_OprFact::illegalOpr) 304 , _klass(klass) 305 , _tmp1(tmp1) 306 , _tmp2(tmp2) 307 , _tmp3(tmp3) 308 , _fast_check(fast_check) 309 , _info_for_patch(info_for_patch) 310 , _info_for_exception(info_for_exception) 311 , _stub(stub) 312 , _profiled_method(NULL) 313 , _profiled_bci(-1) 314 , _should_profile(false) 315 { 316 if (code == lir_checkcast) { 317 assert(info_for_exception != NULL, "checkcast throws exceptions"); 318 } else if (code == lir_instanceof) { 319 assert(info_for_exception == NULL, "instanceof throws no exceptions"); 320 } else { 321 ShouldNotReachHere(); 322 } 323 } 324 325 326 327 LIR_OpTypeCheck::LIR_OpTypeCheck(LIR_Code code, LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, CodeEmitInfo* info_for_exception) 328 : LIR_Op(code, LIR_OprFact::illegalOpr, NULL) 329 , _object(object) 330 , _array(array) 331 , _klass(NULL) 332 , _tmp1(tmp1) 333 , _tmp2(tmp2) 334 , _tmp3(tmp3) 335 , _fast_check(false) 336 , _info_for_patch(NULL) 337 , _info_for_exception(info_for_exception) 338 , _stub(NULL) 339 , _profiled_method(NULL) 340 , _profiled_bci(-1) 341 , _should_profile(false) 342 { 343 if (code == lir_store_check) { 344 _stub = new ArrayStoreExceptionStub(object, info_for_exception); 345 assert(info_for_exception != NULL, "store_check throws exceptions"); 346 } else { 347 ShouldNotReachHere(); 348 } 349 } 350 351 352 LIR_OpArrayCopy::LIR_OpArrayCopy(LIR_Opr src, LIR_Opr src_pos, LIR_Opr dst, LIR_Opr dst_pos, LIR_Opr length, 353 LIR_Opr tmp, ciArrayKlass* expected_type, int flags, CodeEmitInfo* info) 354 : LIR_Op(lir_arraycopy, LIR_OprFact::illegalOpr, info) 355 , _src(src) 356 , _src_pos(src_pos) 357 , _dst(dst) 358 , _dst_pos(dst_pos) 359 , _length(length) 360 , _tmp(tmp) 361 , _expected_type(expected_type) 362 , _flags(flags) { 363 _stub = new ArrayCopyStub(this); 364 } 365 366 LIR_OpUpdateCRC32::LIR_OpUpdateCRC32(LIR_Opr crc, LIR_Opr val, LIR_Opr res) 367 : LIR_Op(lir_updatecrc32, res, NULL) 368 , _crc(crc) 369 , _val(val) { 370 } 371 372 //-------------------verify-------------------------- 373 374 void LIR_Op1::verify() const { 375 switch(code()) { 376 case lir_move: 377 assert(in_opr()->is_valid() && result_opr()->is_valid(), "must be"); 378 break; 379 case lir_null_check: 380 assert(in_opr()->is_register(), "must be"); 381 break; 382 case lir_return: 383 assert(in_opr()->is_register() || in_opr()->is_illegal(), "must be"); 384 break; 385 default: 386 break; 387 } 388 } 389 390 void LIR_OpRTCall::verify() const { 391 assert(strcmp(Runtime1::name_for_address(addr()), "<unknown function>") != 0, "unknown function"); 392 } 393 394 //-------------------visits-------------------------- 395 396 // complete rework of LIR instruction visitor. 397 // The virtual call for each instruction type is replaced by a big 398 // switch that adds the operands for each instruction 399 400 void LIR_OpVisitState::visit(LIR_Op* op) { 401 // copy information from the LIR_Op 402 reset(); 403 set_op(op); 404 405 switch (op->code()) { 406 407 // LIR_Op0 408 case lir_backwardbranch_target: // result and info always invalid 409 case lir_fpop_raw: // result and info always invalid 410 case lir_breakpoint: // result and info always invalid 411 case lir_membar: // result and info always invalid 412 case lir_membar_acquire: // result and info always invalid 413 case lir_membar_release: // result and info always invalid 414 case lir_membar_loadload: // result and info always invalid 415 case lir_membar_storestore: // result and info always invalid 416 case lir_membar_loadstore: // result and info always invalid 417 case lir_membar_storeload: // result and info always invalid 418 case lir_on_spin_wait: 419 { 420 assert(op->as_Op0() != NULL, "must be"); 421 assert(op->_info == NULL, "info not used by this instruction"); 422 assert(op->_result->is_illegal(), "not used"); 423 break; 424 } 425 426 case lir_nop: // may have info, result always invalid 427 case lir_std_entry: // may have result, info always invalid 428 case lir_osr_entry: // may have result, info always invalid 429 case lir_get_thread: // may have result, info always invalid 430 { 431 assert(op->as_Op0() != NULL, "must be"); 432 if (op->_info != NULL) do_info(op->_info); 433 if (op->_result->is_valid()) do_output(op->_result); 434 break; 435 } 436 437 438 // LIR_OpLabel 439 case lir_label: // result and info always invalid 440 { 441 assert(op->as_OpLabel() != NULL, "must be"); 442 assert(op->_info == NULL, "info not used by this instruction"); 443 assert(op->_result->is_illegal(), "not used"); 444 break; 445 } 446 447 448 // LIR_Op1 449 case lir_fxch: // input always valid, result and info always invalid 450 case lir_fld: // input always valid, result and info always invalid 451 case lir_push: // input always valid, result and info always invalid 452 case lir_pop: // input always valid, result and info always invalid 453 case lir_return: // input always valid, result and info always invalid 454 case lir_leal: // input and result always valid, info always invalid 455 case lir_monaddr: // input and result always valid, info always invalid 456 case lir_null_check: // input and info always valid, result always invalid 457 case lir_move: // input and result always valid, may have info 458 case lir_pack64: // input and result always valid 459 case lir_unpack64: // input and result always valid 460 { 461 assert(op->as_Op1() != NULL, "must be"); 462 LIR_Op1* op1 = (LIR_Op1*)op; 463 464 if (op1->_info) do_info(op1->_info); 465 if (op1->_opr->is_valid()) do_input(op1->_opr); 466 if (op1->_result->is_valid()) do_output(op1->_result); 467 468 break; 469 } 470 471 case lir_safepoint: 472 { 473 assert(op->as_Op1() != NULL, "must be"); 474 LIR_Op1* op1 = (LIR_Op1*)op; 475 476 assert(op1->_info != NULL, ""); do_info(op1->_info); 477 if (op1->_opr->is_valid()) do_temp(op1->_opr); // safepoints on SPARC need temporary register 478 assert(op1->_result->is_illegal(), "safepoint does not produce value"); 479 480 break; 481 } 482 483 // LIR_OpConvert; 484 case lir_convert: // input and result always valid, info always invalid 485 { 486 assert(op->as_OpConvert() != NULL, "must be"); 487 LIR_OpConvert* opConvert = (LIR_OpConvert*)op; 488 489 assert(opConvert->_info == NULL, "must be"); 490 if (opConvert->_opr->is_valid()) do_input(opConvert->_opr); 491 if (opConvert->_result->is_valid()) do_output(opConvert->_result); 492 #ifdef PPC32 493 if (opConvert->_tmp1->is_valid()) do_temp(opConvert->_tmp1); 494 if (opConvert->_tmp2->is_valid()) do_temp(opConvert->_tmp2); 495 #endif 496 do_stub(opConvert->_stub); 497 498 break; 499 } 500 501 // LIR_OpBranch; 502 case lir_branch: // may have info, input and result register always invalid 503 case lir_cond_float_branch: // may have info, input and result register always invalid 504 { 505 assert(op->as_OpBranch() != NULL, "must be"); 506 LIR_OpBranch* opBranch = (LIR_OpBranch*)op; 507 508 if (opBranch->_info != NULL) do_info(opBranch->_info); 509 assert(opBranch->_result->is_illegal(), "not used"); 510 if (opBranch->_stub != NULL) opBranch->stub()->visit(this); 511 512 break; 513 } 514 515 516 // LIR_OpAllocObj 517 case lir_alloc_object: 518 { 519 assert(op->as_OpAllocObj() != NULL, "must be"); 520 LIR_OpAllocObj* opAllocObj = (LIR_OpAllocObj*)op; 521 522 if (opAllocObj->_info) do_info(opAllocObj->_info); 523 if (opAllocObj->_opr->is_valid()) { do_input(opAllocObj->_opr); 524 do_temp(opAllocObj->_opr); 525 } 526 if (opAllocObj->_tmp1->is_valid()) do_temp(opAllocObj->_tmp1); 527 if (opAllocObj->_tmp2->is_valid()) do_temp(opAllocObj->_tmp2); 528 if (opAllocObj->_tmp3->is_valid()) do_temp(opAllocObj->_tmp3); 529 if (opAllocObj->_tmp4->is_valid()) do_temp(opAllocObj->_tmp4); 530 if (opAllocObj->_result->is_valid()) do_output(opAllocObj->_result); 531 do_stub(opAllocObj->_stub); 532 break; 533 } 534 535 536 // LIR_OpRoundFP; 537 case lir_roundfp: { 538 assert(op->as_OpRoundFP() != NULL, "must be"); 539 LIR_OpRoundFP* opRoundFP = (LIR_OpRoundFP*)op; 540 541 assert(op->_info == NULL, "info not used by this instruction"); 542 assert(opRoundFP->_tmp->is_illegal(), "not used"); 543 do_input(opRoundFP->_opr); 544 do_output(opRoundFP->_result); 545 546 break; 547 } 548 549 550 // LIR_Op2 551 case lir_cmp: 552 case lir_cmp_l2i: 553 case lir_ucmp_fd2i: 554 case lir_cmp_fd2i: 555 case lir_add: 556 case lir_sub: 557 case lir_mul: 558 case lir_div: 559 case lir_rem: 560 case lir_sqrt: 561 case lir_abs: 562 case lir_neg: 563 case lir_logic_and: 564 case lir_logic_or: 565 case lir_logic_xor: 566 case lir_shl: 567 case lir_shr: 568 case lir_ushr: 569 case lir_xadd: 570 case lir_xchg: 571 case lir_assert: 572 { 573 assert(op->as_Op2() != NULL, "must be"); 574 LIR_Op2* op2 = (LIR_Op2*)op; 575 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && 576 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 577 578 if (op2->_info) do_info(op2->_info); 579 if (op2->_opr1->is_valid()) do_input(op2->_opr1); 580 if (op2->_opr2->is_valid()) do_input(op2->_opr2); 581 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1); 582 if (op2->_result->is_valid()) do_output(op2->_result); 583 if (op->code() == lir_xchg || op->code() == lir_xadd) { 584 // on ARM and PPC, return value is loaded first so could 585 // destroy inputs. On other platforms that implement those 586 // (x86, sparc), the extra constrainsts are harmless. 587 if (op2->_opr1->is_valid()) do_temp(op2->_opr1); 588 if (op2->_opr2->is_valid()) do_temp(op2->_opr2); 589 } 590 591 break; 592 } 593 594 // special handling for cmove: right input operand must not be equal 595 // to the result operand, otherwise the backend fails 596 case lir_cmove: 597 { 598 assert(op->as_Op2() != NULL, "must be"); 599 LIR_Op2* op2 = (LIR_Op2*)op; 600 601 assert(op2->_info == NULL && op2->_tmp1->is_illegal() && op2->_tmp2->is_illegal() && 602 op2->_tmp3->is_illegal() && op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 603 assert(op2->_opr1->is_valid() && op2->_opr2->is_valid() && op2->_result->is_valid(), "used"); 604 605 do_input(op2->_opr1); 606 do_input(op2->_opr2); 607 do_temp(op2->_opr2); 608 do_output(op2->_result); 609 610 break; 611 } 612 613 // vspecial handling for strict operations: register input operands 614 // as temp to guarantee that they do not overlap with other 615 // registers 616 case lir_mul_strictfp: 617 case lir_div_strictfp: 618 { 619 assert(op->as_Op2() != NULL, "must be"); 620 LIR_Op2* op2 = (LIR_Op2*)op; 621 622 assert(op2->_info == NULL, "not used"); 623 assert(op2->_opr1->is_valid(), "used"); 624 assert(op2->_opr2->is_valid(), "used"); 625 assert(op2->_result->is_valid(), "used"); 626 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && 627 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 628 629 do_input(op2->_opr1); do_temp(op2->_opr1); 630 do_input(op2->_opr2); do_temp(op2->_opr2); 631 if (op2->_tmp1->is_valid()) do_temp(op2->_tmp1); 632 do_output(op2->_result); 633 634 break; 635 } 636 637 case lir_throw: { 638 assert(op->as_Op2() != NULL, "must be"); 639 LIR_Op2* op2 = (LIR_Op2*)op; 640 641 if (op2->_info) do_info(op2->_info); 642 if (op2->_opr1->is_valid()) do_temp(op2->_opr1); 643 if (op2->_opr2->is_valid()) do_input(op2->_opr2); // exception object is input parameter 644 assert(op2->_result->is_illegal(), "no result"); 645 assert(op2->_tmp2->is_illegal() && op2->_tmp3->is_illegal() && 646 op2->_tmp4->is_illegal() && op2->_tmp5->is_illegal(), "not used"); 647 648 break; 649 } 650 651 case lir_unwind: { 652 assert(op->as_Op1() != NULL, "must be"); 653 LIR_Op1* op1 = (LIR_Op1*)op; 654 655 assert(op1->_info == NULL, "no info"); 656 assert(op1->_opr->is_valid(), "exception oop"); do_input(op1->_opr); 657 assert(op1->_result->is_illegal(), "no result"); 658 659 break; 660 } 661 662 // LIR_Op3 663 case lir_idiv: 664 case lir_irem: { 665 assert(op->as_Op3() != NULL, "must be"); 666 LIR_Op3* op3= (LIR_Op3*)op; 667 668 if (op3->_info) do_info(op3->_info); 669 if (op3->_opr1->is_valid()) do_input(op3->_opr1); 670 671 // second operand is input and temp, so ensure that second operand 672 // and third operand get not the same register 673 if (op3->_opr2->is_valid()) do_input(op3->_opr2); 674 if (op3->_opr2->is_valid()) do_temp(op3->_opr2); 675 if (op3->_opr3->is_valid()) do_temp(op3->_opr3); 676 677 if (op3->_result->is_valid()) do_output(op3->_result); 678 679 break; 680 } 681 682 case lir_fmad: 683 case lir_fmaf: { 684 assert(op->as_Op3() != NULL, "must be"); 685 LIR_Op3* op3= (LIR_Op3*)op; 686 assert(op3->_info == NULL, "no info"); 687 do_input(op3->_opr1); 688 do_input(op3->_opr2); 689 do_input(op3->_opr3); 690 do_output(op3->_result); 691 break; 692 } 693 694 // LIR_OpJavaCall 695 case lir_static_call: 696 case lir_optvirtual_call: 697 case lir_icvirtual_call: 698 case lir_virtual_call: 699 case lir_dynamic_call: { 700 LIR_OpJavaCall* opJavaCall = op->as_OpJavaCall(); 701 assert(opJavaCall != NULL, "must be"); 702 703 if (opJavaCall->_receiver->is_valid()) do_input(opJavaCall->_receiver); 704 705 // only visit register parameters 706 int n = opJavaCall->_arguments->length(); 707 for (int i = opJavaCall->_receiver->is_valid() ? 1 : 0; i < n; i++) { 708 if (!opJavaCall->_arguments->at(i)->is_pointer()) { 709 do_input(*opJavaCall->_arguments->adr_at(i)); 710 } 711 } 712 713 if (opJavaCall->_info) do_info(opJavaCall->_info); 714 if (FrameMap::method_handle_invoke_SP_save_opr() != LIR_OprFact::illegalOpr && 715 opJavaCall->is_method_handle_invoke()) { 716 opJavaCall->_method_handle_invoke_SP_save_opr = FrameMap::method_handle_invoke_SP_save_opr(); 717 do_temp(opJavaCall->_method_handle_invoke_SP_save_opr); 718 } 719 do_call(); 720 if (opJavaCall->_result->is_valid()) do_output(opJavaCall->_result); 721 722 break; 723 } 724 725 726 // LIR_OpRTCall 727 case lir_rtcall: { 728 assert(op->as_OpRTCall() != NULL, "must be"); 729 LIR_OpRTCall* opRTCall = (LIR_OpRTCall*)op; 730 731 // only visit register parameters 732 int n = opRTCall->_arguments->length(); 733 for (int i = 0; i < n; i++) { 734 if (!opRTCall->_arguments->at(i)->is_pointer()) { 735 do_input(*opRTCall->_arguments->adr_at(i)); 736 } 737 } 738 if (opRTCall->_info) do_info(opRTCall->_info); 739 if (opRTCall->_tmp->is_valid()) do_temp(opRTCall->_tmp); 740 do_call(); 741 if (opRTCall->_result->is_valid()) do_output(opRTCall->_result); 742 743 break; 744 } 745 746 747 // LIR_OpArrayCopy 748 case lir_arraycopy: { 749 assert(op->as_OpArrayCopy() != NULL, "must be"); 750 LIR_OpArrayCopy* opArrayCopy = (LIR_OpArrayCopy*)op; 751 752 assert(opArrayCopy->_result->is_illegal(), "unused"); 753 assert(opArrayCopy->_src->is_valid(), "used"); do_input(opArrayCopy->_src); do_temp(opArrayCopy->_src); 754 assert(opArrayCopy->_src_pos->is_valid(), "used"); do_input(opArrayCopy->_src_pos); do_temp(opArrayCopy->_src_pos); 755 assert(opArrayCopy->_dst->is_valid(), "used"); do_input(opArrayCopy->_dst); do_temp(opArrayCopy->_dst); 756 assert(opArrayCopy->_dst_pos->is_valid(), "used"); do_input(opArrayCopy->_dst_pos); do_temp(opArrayCopy->_dst_pos); 757 assert(opArrayCopy->_length->is_valid(), "used"); do_input(opArrayCopy->_length); do_temp(opArrayCopy->_length); 758 assert(opArrayCopy->_tmp->is_valid(), "used"); do_temp(opArrayCopy->_tmp); 759 if (opArrayCopy->_info) do_info(opArrayCopy->_info); 760 761 // the implementation of arraycopy always has a call into the runtime 762 do_call(); 763 764 break; 765 } 766 767 768 // LIR_OpUpdateCRC32 769 case lir_updatecrc32: { 770 assert(op->as_OpUpdateCRC32() != NULL, "must be"); 771 LIR_OpUpdateCRC32* opUp = (LIR_OpUpdateCRC32*)op; 772 773 assert(opUp->_crc->is_valid(), "used"); do_input(opUp->_crc); do_temp(opUp->_crc); 774 assert(opUp->_val->is_valid(), "used"); do_input(opUp->_val); do_temp(opUp->_val); 775 assert(opUp->_result->is_valid(), "used"); do_output(opUp->_result); 776 assert(opUp->_info == NULL, "no info for LIR_OpUpdateCRC32"); 777 778 break; 779 } 780 781 782 // LIR_OpLock 783 case lir_lock: 784 case lir_unlock: { 785 assert(op->as_OpLock() != NULL, "must be"); 786 LIR_OpLock* opLock = (LIR_OpLock*)op; 787 788 if (opLock->_info) do_info(opLock->_info); 789 790 // TODO: check if these operands really have to be temp 791 // (or if input is sufficient). This may have influence on the oop map! 792 assert(opLock->_lock->is_valid(), "used"); do_temp(opLock->_lock); 793 assert(opLock->_hdr->is_valid(), "used"); do_temp(opLock->_hdr); 794 assert(opLock->_obj->is_valid(), "used"); do_temp(opLock->_obj); 795 796 if (opLock->_scratch->is_valid()) do_temp(opLock->_scratch); 797 assert(opLock->_result->is_illegal(), "unused"); 798 799 do_stub(opLock->_stub); 800 801 break; 802 } 803 804 805 // LIR_OpDelay 806 case lir_delay_slot: { 807 assert(op->as_OpDelay() != NULL, "must be"); 808 LIR_OpDelay* opDelay = (LIR_OpDelay*)op; 809 810 visit(opDelay->delay_op()); 811 break; 812 } 813 814 // LIR_OpTypeCheck 815 case lir_instanceof: 816 case lir_checkcast: 817 case lir_store_check: { 818 assert(op->as_OpTypeCheck() != NULL, "must be"); 819 LIR_OpTypeCheck* opTypeCheck = (LIR_OpTypeCheck*)op; 820 821 if (opTypeCheck->_info_for_exception) do_info(opTypeCheck->_info_for_exception); 822 if (opTypeCheck->_info_for_patch) do_info(opTypeCheck->_info_for_patch); 823 if (opTypeCheck->_object->is_valid()) do_input(opTypeCheck->_object); 824 if (op->code() == lir_store_check && opTypeCheck->_object->is_valid()) { 825 do_temp(opTypeCheck->_object); 826 } 827 if (opTypeCheck->_array->is_valid()) do_input(opTypeCheck->_array); 828 if (opTypeCheck->_tmp1->is_valid()) do_temp(opTypeCheck->_tmp1); 829 if (opTypeCheck->_tmp2->is_valid()) do_temp(opTypeCheck->_tmp2); 830 if (opTypeCheck->_tmp3->is_valid()) do_temp(opTypeCheck->_tmp3); 831 if (opTypeCheck->_result->is_valid()) do_output(opTypeCheck->_result); 832 do_stub(opTypeCheck->_stub); 833 break; 834 } 835 836 // LIR_OpCompareAndSwap 837 case lir_cas_long: 838 case lir_cas_obj: 839 case lir_cas_int: { 840 assert(op->as_OpCompareAndSwap() != NULL, "must be"); 841 LIR_OpCompareAndSwap* opCompareAndSwap = (LIR_OpCompareAndSwap*)op; 842 843 assert(opCompareAndSwap->_addr->is_valid(), "used"); 844 assert(opCompareAndSwap->_cmp_value->is_valid(), "used"); 845 assert(opCompareAndSwap->_new_value->is_valid(), "used"); 846 if (opCompareAndSwap->_info) do_info(opCompareAndSwap->_info); 847 do_input(opCompareAndSwap->_addr); 848 do_temp(opCompareAndSwap->_addr); 849 do_input(opCompareAndSwap->_cmp_value); 850 do_temp(opCompareAndSwap->_cmp_value); 851 do_input(opCompareAndSwap->_new_value); 852 do_temp(opCompareAndSwap->_new_value); 853 if (opCompareAndSwap->_tmp1->is_valid()) do_temp(opCompareAndSwap->_tmp1); 854 if (opCompareAndSwap->_tmp2->is_valid()) do_temp(opCompareAndSwap->_tmp2); 855 if (opCompareAndSwap->_result->is_valid()) do_output(opCompareAndSwap->_result); 856 857 break; 858 } 859 860 861 // LIR_OpAllocArray; 862 case lir_alloc_array: { 863 assert(op->as_OpAllocArray() != NULL, "must be"); 864 LIR_OpAllocArray* opAllocArray = (LIR_OpAllocArray*)op; 865 866 if (opAllocArray->_info) do_info(opAllocArray->_info); 867 if (opAllocArray->_klass->is_valid()) do_input(opAllocArray->_klass); do_temp(opAllocArray->_klass); 868 if (opAllocArray->_len->is_valid()) do_input(opAllocArray->_len); do_temp(opAllocArray->_len); 869 if (opAllocArray->_tmp1->is_valid()) do_temp(opAllocArray->_tmp1); 870 if (opAllocArray->_tmp2->is_valid()) do_temp(opAllocArray->_tmp2); 871 if (opAllocArray->_tmp3->is_valid()) do_temp(opAllocArray->_tmp3); 872 if (opAllocArray->_tmp4->is_valid()) do_temp(opAllocArray->_tmp4); 873 if (opAllocArray->_result->is_valid()) do_output(opAllocArray->_result); 874 do_stub(opAllocArray->_stub); 875 break; 876 } 877 878 // LIR_OpProfileCall: 879 case lir_profile_call: { 880 assert(op->as_OpProfileCall() != NULL, "must be"); 881 LIR_OpProfileCall* opProfileCall = (LIR_OpProfileCall*)op; 882 883 if (opProfileCall->_recv->is_valid()) do_temp(opProfileCall->_recv); 884 assert(opProfileCall->_mdo->is_valid(), "used"); do_temp(opProfileCall->_mdo); 885 assert(opProfileCall->_tmp1->is_valid(), "used"); do_temp(opProfileCall->_tmp1); 886 break; 887 } 888 889 // LIR_OpProfileType: 890 case lir_profile_type: { 891 assert(op->as_OpProfileType() != NULL, "must be"); 892 LIR_OpProfileType* opProfileType = (LIR_OpProfileType*)op; 893 894 do_input(opProfileType->_mdp); do_temp(opProfileType->_mdp); 895 do_input(opProfileType->_obj); 896 do_temp(opProfileType->_tmp); 897 break; 898 } 899 default: 900 op->visit(this); 901 } 902 } 903 904 void LIR_Op::visit(LIR_OpVisitState* state) { 905 ShouldNotReachHere(); 906 } 907 908 void LIR_OpVisitState::do_stub(CodeStub* stub) { 909 if (stub != NULL) { 910 stub->visit(this); 911 } 912 } 913 914 XHandlers* LIR_OpVisitState::all_xhandler() { 915 XHandlers* result = NULL; 916 917 int i; 918 for (i = 0; i < info_count(); i++) { 919 if (info_at(i)->exception_handlers() != NULL) { 920 result = info_at(i)->exception_handlers(); 921 break; 922 } 923 } 924 925 #ifdef ASSERT 926 for (i = 0; i < info_count(); i++) { 927 assert(info_at(i)->exception_handlers() == NULL || 928 info_at(i)->exception_handlers() == result, 929 "only one xhandler list allowed per LIR-operation"); 930 } 931 #endif 932 933 if (result != NULL) { 934 return result; 935 } else { 936 return new XHandlers(); 937 } 938 939 return result; 940 } 941 942 943 #ifdef ASSERT 944 bool LIR_OpVisitState::no_operands(LIR_Op* op) { 945 visit(op); 946 947 return opr_count(inputMode) == 0 && 948 opr_count(outputMode) == 0 && 949 opr_count(tempMode) == 0 && 950 info_count() == 0 && 951 !has_call() && 952 !has_slow_case(); 953 } 954 #endif 955 956 //--------------------------------------------------- 957 958 959 void LIR_OpJavaCall::emit_code(LIR_Assembler* masm) { 960 masm->emit_call(this); 961 } 962 963 void LIR_OpRTCall::emit_code(LIR_Assembler* masm) { 964 masm->emit_rtcall(this); 965 } 966 967 void LIR_OpLabel::emit_code(LIR_Assembler* masm) { 968 masm->emit_opLabel(this); 969 } 970 971 void LIR_OpArrayCopy::emit_code(LIR_Assembler* masm) { 972 masm->emit_arraycopy(this); 973 masm->append_code_stub(stub()); 974 } 975 976 void LIR_OpUpdateCRC32::emit_code(LIR_Assembler* masm) { 977 masm->emit_updatecrc32(this); 978 } 979 980 void LIR_Op0::emit_code(LIR_Assembler* masm) { 981 masm->emit_op0(this); 982 } 983 984 void LIR_Op1::emit_code(LIR_Assembler* masm) { 985 masm->emit_op1(this); 986 } 987 988 void LIR_OpAllocObj::emit_code(LIR_Assembler* masm) { 989 masm->emit_alloc_obj(this); 990 masm->append_code_stub(stub()); 991 } 992 993 void LIR_OpBranch::emit_code(LIR_Assembler* masm) { 994 masm->emit_opBranch(this); 995 if (stub()) { 996 masm->append_code_stub(stub()); 997 } 998 } 999 1000 void LIR_OpConvert::emit_code(LIR_Assembler* masm) { 1001 masm->emit_opConvert(this); 1002 if (stub() != NULL) { 1003 masm->append_code_stub(stub()); 1004 } 1005 } 1006 1007 void LIR_Op2::emit_code(LIR_Assembler* masm) { 1008 masm->emit_op2(this); 1009 } 1010 1011 void LIR_OpAllocArray::emit_code(LIR_Assembler* masm) { 1012 masm->emit_alloc_array(this); 1013 masm->append_code_stub(stub()); 1014 } 1015 1016 void LIR_OpTypeCheck::emit_code(LIR_Assembler* masm) { 1017 masm->emit_opTypeCheck(this); 1018 if (stub()) { 1019 masm->append_code_stub(stub()); 1020 } 1021 } 1022 1023 void LIR_OpCompareAndSwap::emit_code(LIR_Assembler* masm) { 1024 masm->emit_compare_and_swap(this); 1025 } 1026 1027 void LIR_Op3::emit_code(LIR_Assembler* masm) { 1028 masm->emit_op3(this); 1029 } 1030 1031 void LIR_OpLock::emit_code(LIR_Assembler* masm) { 1032 masm->emit_lock(this); 1033 if (stub()) { 1034 masm->append_code_stub(stub()); 1035 } 1036 } 1037 1038 #ifdef ASSERT 1039 void LIR_OpAssert::emit_code(LIR_Assembler* masm) { 1040 masm->emit_assert(this); 1041 } 1042 #endif 1043 1044 void LIR_OpDelay::emit_code(LIR_Assembler* masm) { 1045 masm->emit_delay(this); 1046 } 1047 1048 void LIR_OpProfileCall::emit_code(LIR_Assembler* masm) { 1049 masm->emit_profile_call(this); 1050 } 1051 1052 void LIR_OpProfileType::emit_code(LIR_Assembler* masm) { 1053 masm->emit_profile_type(this); 1054 } 1055 1056 // LIR_List 1057 LIR_List::LIR_List(Compilation* compilation, BlockBegin* block) 1058 : _operations(8) 1059 , _compilation(compilation) 1060 #ifndef PRODUCT 1061 , _block(block) 1062 #endif 1063 #ifdef ASSERT 1064 , _file(NULL) 1065 , _line(0) 1066 #endif 1067 { } 1068 1069 1070 #ifdef ASSERT 1071 void LIR_List::set_file_and_line(const char * file, int line) { 1072 const char * f = strrchr(file, '/'); 1073 if (f == NULL) f = strrchr(file, '\\'); 1074 if (f == NULL) { 1075 f = file; 1076 } else { 1077 f++; 1078 } 1079 _file = f; 1080 _line = line; 1081 } 1082 #endif 1083 1084 1085 void LIR_List::append(LIR_InsertionBuffer* buffer) { 1086 assert(this == buffer->lir_list(), "wrong lir list"); 1087 const int n = _operations.length(); 1088 1089 if (buffer->number_of_ops() > 0) { 1090 // increase size of instructions list 1091 _operations.at_grow(n + buffer->number_of_ops() - 1, NULL); 1092 // insert ops from buffer into instructions list 1093 int op_index = buffer->number_of_ops() - 1; 1094 int ip_index = buffer->number_of_insertion_points() - 1; 1095 int from_index = n - 1; 1096 int to_index = _operations.length() - 1; 1097 for (; ip_index >= 0; ip_index --) { 1098 int index = buffer->index_at(ip_index); 1099 // make room after insertion point 1100 while (index < from_index) { 1101 _operations.at_put(to_index --, _operations.at(from_index --)); 1102 } 1103 // insert ops from buffer 1104 for (int i = buffer->count_at(ip_index); i > 0; i --) { 1105 _operations.at_put(to_index --, buffer->op_at(op_index --)); 1106 } 1107 } 1108 } 1109 1110 buffer->finish(); 1111 } 1112 1113 1114 void LIR_List::oop2reg_patch(jobject o, LIR_Opr reg, CodeEmitInfo* info) { 1115 assert(reg->type() == T_OBJECT, "bad reg"); 1116 append(new LIR_Op1(lir_move, LIR_OprFact::oopConst(o), reg, T_OBJECT, lir_patch_normal, info)); 1117 } 1118 1119 void LIR_List::klass2reg_patch(Metadata* o, LIR_Opr reg, CodeEmitInfo* info) { 1120 assert(reg->type() == T_METADATA, "bad reg"); 1121 append(new LIR_Op1(lir_move, LIR_OprFact::metadataConst(o), reg, T_METADATA, lir_patch_normal, info)); 1122 } 1123 1124 void LIR_List::load(LIR_Address* addr, LIR_Opr src, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1125 append(new LIR_Op1( 1126 lir_move, 1127 LIR_OprFact::address(addr), 1128 src, 1129 addr->type(), 1130 patch_code, 1131 info)); 1132 } 1133 1134 1135 void LIR_List::volatile_load_mem_reg(LIR_Address* address, LIR_Opr dst, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1136 append(new LIR_Op1( 1137 lir_move, 1138 LIR_OprFact::address(address), 1139 dst, 1140 address->type(), 1141 patch_code, 1142 info, lir_move_volatile)); 1143 } 1144 1145 void LIR_List::volatile_load_unsafe_reg(LIR_Opr base, LIR_Opr offset, LIR_Opr dst, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1146 append(new LIR_Op1( 1147 lir_move, 1148 LIR_OprFact::address(new LIR_Address(base, offset, type)), 1149 dst, 1150 type, 1151 patch_code, 1152 info, lir_move_volatile)); 1153 } 1154 1155 1156 void LIR_List::store_mem_int(jint v, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1157 append(new LIR_Op1( 1158 lir_move, 1159 LIR_OprFact::intConst(v), 1160 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), 1161 type, 1162 patch_code, 1163 info)); 1164 } 1165 1166 1167 void LIR_List::store_mem_oop(jobject o, LIR_Opr base, int offset_in_bytes, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1168 append(new LIR_Op1( 1169 lir_move, 1170 LIR_OprFact::oopConst(o), 1171 LIR_OprFact::address(new LIR_Address(base, offset_in_bytes, type)), 1172 type, 1173 patch_code, 1174 info)); 1175 } 1176 1177 1178 void LIR_List::store(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1179 append(new LIR_Op1( 1180 lir_move, 1181 src, 1182 LIR_OprFact::address(addr), 1183 addr->type(), 1184 patch_code, 1185 info)); 1186 } 1187 1188 1189 void LIR_List::volatile_store_mem_reg(LIR_Opr src, LIR_Address* addr, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1190 append(new LIR_Op1( 1191 lir_move, 1192 src, 1193 LIR_OprFact::address(addr), 1194 addr->type(), 1195 patch_code, 1196 info, 1197 lir_move_volatile)); 1198 } 1199 1200 void LIR_List::volatile_store_unsafe_reg(LIR_Opr src, LIR_Opr base, LIR_Opr offset, BasicType type, CodeEmitInfo* info, LIR_PatchCode patch_code) { 1201 append(new LIR_Op1( 1202 lir_move, 1203 src, 1204 LIR_OprFact::address(new LIR_Address(base, offset, type)), 1205 type, 1206 patch_code, 1207 info, lir_move_volatile)); 1208 } 1209 1210 1211 void LIR_List::idiv(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1212 append(new LIR_Op3( 1213 lir_idiv, 1214 left, 1215 right, 1216 tmp, 1217 res, 1218 info)); 1219 } 1220 1221 1222 void LIR_List::idiv(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1223 append(new LIR_Op3( 1224 lir_idiv, 1225 left, 1226 LIR_OprFact::intConst(right), 1227 tmp, 1228 res, 1229 info)); 1230 } 1231 1232 1233 void LIR_List::irem(LIR_Opr left, LIR_Opr right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1234 append(new LIR_Op3( 1235 lir_irem, 1236 left, 1237 right, 1238 tmp, 1239 res, 1240 info)); 1241 } 1242 1243 1244 void LIR_List::irem(LIR_Opr left, int right, LIR_Opr res, LIR_Opr tmp, CodeEmitInfo* info) { 1245 append(new LIR_Op3( 1246 lir_irem, 1247 left, 1248 LIR_OprFact::intConst(right), 1249 tmp, 1250 res, 1251 info)); 1252 } 1253 1254 1255 void LIR_List::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) { 1256 append(new LIR_Op2( 1257 lir_cmp, 1258 condition, 1259 LIR_OprFact::address(new LIR_Address(base, disp, T_INT)), 1260 LIR_OprFact::intConst(c), 1261 info)); 1262 } 1263 1264 1265 void LIR_List::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Address* addr, CodeEmitInfo* info) { 1266 append(new LIR_Op2( 1267 lir_cmp, 1268 condition, 1269 reg, 1270 LIR_OprFact::address(addr), 1271 info)); 1272 } 1273 1274 void LIR_List::allocate_object(LIR_Opr dst, LIR_Opr t1, LIR_Opr t2, LIR_Opr t3, LIR_Opr t4, 1275 int header_size, int object_size, LIR_Opr klass, bool init_check, CodeStub* stub) { 1276 append(new LIR_OpAllocObj( 1277 klass, 1278 dst, 1279 t1, 1280 t2, 1281 t3, 1282 t4, 1283 header_size, 1284 object_size, 1285 init_check, 1286 stub)); 1287 } 1288 1289 void LIR_List::allocate_array(LIR_Opr dst, LIR_Opr len, LIR_Opr t1,LIR_Opr t2, LIR_Opr t3,LIR_Opr t4, BasicType type, LIR_Opr klass, CodeStub* stub) { 1290 append(new LIR_OpAllocArray( 1291 klass, 1292 len, 1293 dst, 1294 t1, 1295 t2, 1296 t3, 1297 t4, 1298 type, 1299 stub)); 1300 } 1301 1302 void LIR_List::shift_left(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1303 append(new LIR_Op2( 1304 lir_shl, 1305 value, 1306 count, 1307 dst, 1308 tmp)); 1309 } 1310 1311 void LIR_List::shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1312 append(new LIR_Op2( 1313 lir_shr, 1314 value, 1315 count, 1316 dst, 1317 tmp)); 1318 } 1319 1320 1321 void LIR_List::unsigned_shift_right(LIR_Opr value, LIR_Opr count, LIR_Opr dst, LIR_Opr tmp) { 1322 append(new LIR_Op2( 1323 lir_ushr, 1324 value, 1325 count, 1326 dst, 1327 tmp)); 1328 } 1329 1330 void LIR_List::fcmp2int(LIR_Opr left, LIR_Opr right, LIR_Opr dst, bool is_unordered_less) { 1331 append(new LIR_Op2(is_unordered_less ? lir_ucmp_fd2i : lir_cmp_fd2i, 1332 left, 1333 right, 1334 dst)); 1335 } 1336 1337 void LIR_List::lock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub, CodeEmitInfo* info) { 1338 append(new LIR_OpLock( 1339 lir_lock, 1340 hdr, 1341 obj, 1342 lock, 1343 scratch, 1344 stub, 1345 info)); 1346 } 1347 1348 void LIR_List::unlock_object(LIR_Opr hdr, LIR_Opr obj, LIR_Opr lock, LIR_Opr scratch, CodeStub* stub) { 1349 append(new LIR_OpLock( 1350 lir_unlock, 1351 hdr, 1352 obj, 1353 lock, 1354 scratch, 1355 stub, 1356 NULL)); 1357 } 1358 1359 1360 void check_LIR() { 1361 // cannot do the proper checking as PRODUCT and other modes return different results 1362 // guarantee(sizeof(LIR_OprDesc) == wordSize, "may not have a v-table"); 1363 } 1364 1365 1366 1367 void LIR_List::checkcast (LIR_Opr result, LIR_Opr object, ciKlass* klass, 1368 LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, 1369 CodeEmitInfo* info_for_exception, CodeEmitInfo* info_for_patch, CodeStub* stub, 1370 ciMethod* profiled_method, int profiled_bci) { 1371 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_checkcast, result, object, klass, 1372 tmp1, tmp2, tmp3, fast_check, info_for_exception, info_for_patch, stub); 1373 if (profiled_method != NULL) { 1374 c->set_profiled_method(profiled_method); 1375 c->set_profiled_bci(profiled_bci); 1376 c->set_should_profile(true); 1377 } 1378 append(c); 1379 } 1380 1381 void LIR_List::instanceof(LIR_Opr result, LIR_Opr object, ciKlass* klass, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, bool fast_check, CodeEmitInfo* info_for_patch, ciMethod* profiled_method, int profiled_bci) { 1382 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_instanceof, result, object, klass, tmp1, tmp2, tmp3, fast_check, NULL, info_for_patch, NULL); 1383 if (profiled_method != NULL) { 1384 c->set_profiled_method(profiled_method); 1385 c->set_profiled_bci(profiled_bci); 1386 c->set_should_profile(true); 1387 } 1388 append(c); 1389 } 1390 1391 1392 void LIR_List::store_check(LIR_Opr object, LIR_Opr array, LIR_Opr tmp1, LIR_Opr tmp2, LIR_Opr tmp3, 1393 CodeEmitInfo* info_for_exception, ciMethod* profiled_method, int profiled_bci) { 1394 LIR_OpTypeCheck* c = new LIR_OpTypeCheck(lir_store_check, object, array, tmp1, tmp2, tmp3, info_for_exception); 1395 if (profiled_method != NULL) { 1396 c->set_profiled_method(profiled_method); 1397 c->set_profiled_bci(profiled_bci); 1398 c->set_should_profile(true); 1399 } 1400 append(c); 1401 } 1402 1403 void LIR_List::null_check(LIR_Opr opr, CodeEmitInfo* info, bool deoptimize_on_null) { 1404 if (deoptimize_on_null) { 1405 // Emit an explicit null check and deoptimize if opr is null 1406 CodeStub* deopt = new DeoptimizeStub(info, Deoptimization::Reason_null_check, Deoptimization::Action_none); 1407 cmp(lir_cond_equal, opr, LIR_OprFact::oopConst(NULL)); 1408 branch(lir_cond_equal, T_OBJECT, deopt); 1409 } else { 1410 // Emit an implicit null check 1411 append(new LIR_Op1(lir_null_check, opr, info)); 1412 } 1413 } 1414 1415 void LIR_List::cas_long(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1416 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { 1417 append(new LIR_OpCompareAndSwap(lir_cas_long, addr, cmp_value, new_value, t1, t2, result)); 1418 } 1419 1420 void LIR_List::cas_obj(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1421 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { 1422 append(new LIR_OpCompareAndSwap(lir_cas_obj, addr, cmp_value, new_value, t1, t2, result)); 1423 } 1424 1425 void LIR_List::cas_int(LIR_Opr addr, LIR_Opr cmp_value, LIR_Opr new_value, 1426 LIR_Opr t1, LIR_Opr t2, LIR_Opr result) { 1427 append(new LIR_OpCompareAndSwap(lir_cas_int, addr, cmp_value, new_value, t1, t2, result)); 1428 } 1429 1430 1431 #ifdef PRODUCT 1432 1433 void print_LIR(BlockList* blocks) { 1434 } 1435 1436 #else 1437 // LIR_OprDesc 1438 void LIR_OprDesc::print() const { 1439 print(tty); 1440 } 1441 1442 void LIR_OprDesc::print(outputStream* out) const { 1443 if (is_illegal()) { 1444 return; 1445 } 1446 1447 out->print("["); 1448 if (is_pointer()) { 1449 pointer()->print_value_on(out); 1450 } else if (is_single_stack()) { 1451 out->print("stack:%d", single_stack_ix()); 1452 } else if (is_double_stack()) { 1453 out->print("dbl_stack:%d",double_stack_ix()); 1454 } else if (is_virtual()) { 1455 out->print("R%d", vreg_number()); 1456 } else if (is_single_cpu()) { 1457 out->print("%s", as_register()->name()); 1458 } else if (is_double_cpu()) { 1459 out->print("%s", as_register_hi()->name()); 1460 out->print("%s", as_register_lo()->name()); 1461 #if defined(X86) 1462 } else if (is_single_xmm()) { 1463 out->print("%s", as_xmm_float_reg()->name()); 1464 } else if (is_double_xmm()) { 1465 out->print("%s", as_xmm_double_reg()->name()); 1466 } else if (is_single_fpu()) { 1467 out->print("fpu%d", fpu_regnr()); 1468 } else if (is_double_fpu()) { 1469 out->print("fpu%d", fpu_regnrLo()); 1470 #elif defined(AARCH64) 1471 } else if (is_single_fpu()) { 1472 out->print("fpu%d", fpu_regnr()); 1473 } else if (is_double_fpu()) { 1474 out->print("fpu%d", fpu_regnrLo()); 1475 #elif defined(ARM) 1476 } else if (is_single_fpu()) { 1477 out->print("s%d", fpu_regnr()); 1478 } else if (is_double_fpu()) { 1479 out->print("d%d", fpu_regnrLo() >> 1); 1480 #else 1481 } else if (is_single_fpu()) { 1482 out->print("%s", as_float_reg()->name()); 1483 } else if (is_double_fpu()) { 1484 out->print("%s", as_double_reg()->name()); 1485 #endif 1486 1487 } else if (is_illegal()) { 1488 out->print("-"); 1489 } else { 1490 out->print("Unknown Operand"); 1491 } 1492 if (!is_illegal()) { 1493 out->print("|%c", type_char()); 1494 } 1495 if (is_register() && is_last_use()) { 1496 out->print("(last_use)"); 1497 } 1498 out->print("]"); 1499 } 1500 1501 1502 // LIR_Address 1503 void LIR_Const::print_value_on(outputStream* out) const { 1504 switch (type()) { 1505 case T_ADDRESS:out->print("address:%d",as_jint()); break; 1506 case T_INT: out->print("int:%d", as_jint()); break; 1507 case T_LONG: out->print("lng:" JLONG_FORMAT, as_jlong()); break; 1508 case T_FLOAT: out->print("flt:%f", as_jfloat()); break; 1509 case T_DOUBLE: out->print("dbl:%f", as_jdouble()); break; 1510 case T_OBJECT: out->print("obj:" INTPTR_FORMAT, p2i(as_jobject())); break; 1511 case T_METADATA: out->print("metadata:" INTPTR_FORMAT, p2i(as_metadata()));break; 1512 default: out->print("%3d:0x" UINT64_FORMAT_X, type(), (uint64_t)as_jlong()); break; 1513 } 1514 } 1515 1516 // LIR_Address 1517 void LIR_Address::print_value_on(outputStream* out) const { 1518 out->print("Base:"); _base->print(out); 1519 if (!_index->is_illegal()) { 1520 out->print(" Index:"); _index->print(out); 1521 switch (scale()) { 1522 case times_1: break; 1523 case times_2: out->print(" * 2"); break; 1524 case times_4: out->print(" * 4"); break; 1525 case times_8: out->print(" * 8"); break; 1526 } 1527 } 1528 out->print(" Disp: " INTX_FORMAT, _disp); 1529 } 1530 1531 // debug output of block header without InstructionPrinter 1532 // (because phi functions are not necessary for LIR) 1533 static void print_block(BlockBegin* x) { 1534 // print block id 1535 BlockEnd* end = x->end(); 1536 tty->print("B%d ", x->block_id()); 1537 1538 // print flags 1539 if (x->is_set(BlockBegin::std_entry_flag)) tty->print("std "); 1540 if (x->is_set(BlockBegin::osr_entry_flag)) tty->print("osr "); 1541 if (x->is_set(BlockBegin::exception_entry_flag)) tty->print("ex "); 1542 if (x->is_set(BlockBegin::subroutine_entry_flag)) tty->print("jsr "); 1543 if (x->is_set(BlockBegin::backward_branch_target_flag)) tty->print("bb "); 1544 if (x->is_set(BlockBegin::linear_scan_loop_header_flag)) tty->print("lh "); 1545 if (x->is_set(BlockBegin::linear_scan_loop_end_flag)) tty->print("le "); 1546 1547 // print block bci range 1548 tty->print("[%d, %d] ", x->bci(), (end == NULL ? -1 : end->printable_bci())); 1549 1550 // print predecessors and successors 1551 if (x->number_of_preds() > 0) { 1552 tty->print("preds: "); 1553 for (int i = 0; i < x->number_of_preds(); i ++) { 1554 tty->print("B%d ", x->pred_at(i)->block_id()); 1555 } 1556 } 1557 1558 if (x->number_of_sux() > 0) { 1559 tty->print("sux: "); 1560 for (int i = 0; i < x->number_of_sux(); i ++) { 1561 tty->print("B%d ", x->sux_at(i)->block_id()); 1562 } 1563 } 1564 1565 // print exception handlers 1566 if (x->number_of_exception_handlers() > 0) { 1567 tty->print("xhandler: "); 1568 for (int i = 0; i < x->number_of_exception_handlers(); i++) { 1569 tty->print("B%d ", x->exception_handler_at(i)->block_id()); 1570 } 1571 } 1572 1573 tty->cr(); 1574 } 1575 1576 void print_LIR(BlockList* blocks) { 1577 tty->print_cr("LIR:"); 1578 int i; 1579 for (i = 0; i < blocks->length(); i++) { 1580 BlockBegin* bb = blocks->at(i); 1581 print_block(bb); 1582 tty->print("__id_Instruction___________________________________________"); tty->cr(); 1583 bb->lir()->print_instructions(); 1584 } 1585 } 1586 1587 void LIR_List::print_instructions() { 1588 for (int i = 0; i < _operations.length(); i++) { 1589 _operations.at(i)->print(); tty->cr(); 1590 } 1591 tty->cr(); 1592 } 1593 1594 // LIR_Ops printing routines 1595 // LIR_Op 1596 void LIR_Op::print_on(outputStream* out) const { 1597 if (id() != -1 || PrintCFGToFile) { 1598 out->print("%4d ", id()); 1599 } else { 1600 out->print(" "); 1601 } 1602 out->print("%s ", name()); 1603 print_instr(out); 1604 if (info() != NULL) out->print(" [bci:%d]", info()->stack()->bci()); 1605 #ifdef ASSERT 1606 if (Verbose && _file != NULL) { 1607 out->print(" (%s:%d)", _file, _line); 1608 } 1609 #endif 1610 } 1611 1612 const char * LIR_Op::name() const { 1613 const char* s = NULL; 1614 switch(code()) { 1615 // LIR_Op0 1616 case lir_membar: s = "membar"; break; 1617 case lir_membar_acquire: s = "membar_acquire"; break; 1618 case lir_membar_release: s = "membar_release"; break; 1619 case lir_membar_loadload: s = "membar_loadload"; break; 1620 case lir_membar_storestore: s = "membar_storestore"; break; 1621 case lir_membar_loadstore: s = "membar_loadstore"; break; 1622 case lir_membar_storeload: s = "membar_storeload"; break; 1623 case lir_label: s = "label"; break; 1624 case lir_nop: s = "nop"; break; 1625 case lir_on_spin_wait: s = "on_spin_wait"; break; 1626 case lir_backwardbranch_target: s = "backbranch"; break; 1627 case lir_std_entry: s = "std_entry"; break; 1628 case lir_osr_entry: s = "osr_entry"; break; 1629 case lir_fpop_raw: s = "fpop_raw"; break; 1630 case lir_breakpoint: s = "breakpoint"; break; 1631 case lir_get_thread: s = "get_thread"; break; 1632 // LIR_Op1 1633 case lir_fxch: s = "fxch"; break; 1634 case lir_fld: s = "fld"; break; 1635 case lir_push: s = "push"; break; 1636 case lir_pop: s = "pop"; break; 1637 case lir_null_check: s = "null_check"; break; 1638 case lir_return: s = "return"; break; 1639 case lir_safepoint: s = "safepoint"; break; 1640 case lir_leal: s = "leal"; break; 1641 case lir_branch: s = "branch"; break; 1642 case lir_cond_float_branch: s = "flt_cond_br"; break; 1643 case lir_move: s = "move"; break; 1644 case lir_roundfp: s = "roundfp"; break; 1645 case lir_rtcall: s = "rtcall"; break; 1646 case lir_throw: s = "throw"; break; 1647 case lir_unwind: s = "unwind"; break; 1648 case lir_convert: s = "convert"; break; 1649 case lir_alloc_object: s = "alloc_obj"; break; 1650 case lir_monaddr: s = "mon_addr"; break; 1651 case lir_pack64: s = "pack64"; break; 1652 case lir_unpack64: s = "unpack64"; break; 1653 // LIR_Op2 1654 case lir_cmp: s = "cmp"; break; 1655 case lir_cmp_l2i: s = "cmp_l2i"; break; 1656 case lir_ucmp_fd2i: s = "ucomp_fd2i"; break; 1657 case lir_cmp_fd2i: s = "comp_fd2i"; break; 1658 case lir_cmove: s = "cmove"; break; 1659 case lir_add: s = "add"; break; 1660 case lir_sub: s = "sub"; break; 1661 case lir_mul: s = "mul"; break; 1662 case lir_mul_strictfp: s = "mul_strictfp"; break; 1663 case lir_div: s = "div"; break; 1664 case lir_div_strictfp: s = "div_strictfp"; break; 1665 case lir_rem: s = "rem"; break; 1666 case lir_abs: s = "abs"; break; 1667 case lir_neg: s = "neg"; break; 1668 case lir_sqrt: s = "sqrt"; break; 1669 case lir_logic_and: s = "logic_and"; break; 1670 case lir_logic_or: s = "logic_or"; break; 1671 case lir_logic_xor: s = "logic_xor"; break; 1672 case lir_shl: s = "shift_left"; break; 1673 case lir_shr: s = "shift_right"; break; 1674 case lir_ushr: s = "ushift_right"; break; 1675 case lir_alloc_array: s = "alloc_array"; break; 1676 case lir_xadd: s = "xadd"; break; 1677 case lir_xchg: s = "xchg"; break; 1678 // LIR_Op3 1679 case lir_idiv: s = "idiv"; break; 1680 case lir_irem: s = "irem"; break; 1681 case lir_fmad: s = "fmad"; break; 1682 case lir_fmaf: s = "fmaf"; break; 1683 // LIR_OpJavaCall 1684 case lir_static_call: s = "static"; break; 1685 case lir_optvirtual_call: s = "optvirtual"; break; 1686 case lir_icvirtual_call: s = "icvirtual"; break; 1687 case lir_virtual_call: s = "virtual"; break; 1688 case lir_dynamic_call: s = "dynamic"; break; 1689 // LIR_OpArrayCopy 1690 case lir_arraycopy: s = "arraycopy"; break; 1691 // LIR_OpUpdateCRC32 1692 case lir_updatecrc32: s = "updatecrc32"; break; 1693 // LIR_OpLock 1694 case lir_lock: s = "lock"; break; 1695 case lir_unlock: s = "unlock"; break; 1696 // LIR_OpDelay 1697 case lir_delay_slot: s = "delay"; break; 1698 // LIR_OpTypeCheck 1699 case lir_instanceof: s = "instanceof"; break; 1700 case lir_checkcast: s = "checkcast"; break; 1701 case lir_store_check: s = "store_check"; break; 1702 // LIR_OpCompareAndSwap 1703 case lir_cas_long: s = "cas_long"; break; 1704 case lir_cas_obj: s = "cas_obj"; break; 1705 case lir_cas_int: s = "cas_int"; break; 1706 // LIR_OpProfileCall 1707 case lir_profile_call: s = "profile_call"; break; 1708 // LIR_OpProfileType 1709 case lir_profile_type: s = "profile_type"; break; 1710 // LIR_OpAssert 1711 #ifdef ASSERT 1712 case lir_assert: s = "assert"; break; 1713 #endif 1714 case lir_none: ShouldNotReachHere();break; 1715 default: s = "illegal_op"; break; 1716 } 1717 return s; 1718 } 1719 1720 // LIR_OpJavaCall 1721 void LIR_OpJavaCall::print_instr(outputStream* out) const { 1722 out->print("call: "); 1723 out->print("[addr: " INTPTR_FORMAT "]", p2i(address())); 1724 if (receiver()->is_valid()) { 1725 out->print(" [recv: "); receiver()->print(out); out->print("]"); 1726 } 1727 if (result_opr()->is_valid()) { 1728 out->print(" [result: "); result_opr()->print(out); out->print("]"); 1729 } 1730 } 1731 1732 // LIR_OpLabel 1733 void LIR_OpLabel::print_instr(outputStream* out) const { 1734 out->print("[label:" INTPTR_FORMAT "]", p2i(_label)); 1735 } 1736 1737 // LIR_OpArrayCopy 1738 void LIR_OpArrayCopy::print_instr(outputStream* out) const { 1739 src()->print(out); out->print(" "); 1740 src_pos()->print(out); out->print(" "); 1741 dst()->print(out); out->print(" "); 1742 dst_pos()->print(out); out->print(" "); 1743 length()->print(out); out->print(" "); 1744 tmp()->print(out); out->print(" "); 1745 } 1746 1747 // LIR_OpUpdateCRC32 1748 void LIR_OpUpdateCRC32::print_instr(outputStream* out) const { 1749 crc()->print(out); out->print(" "); 1750 val()->print(out); out->print(" "); 1751 result_opr()->print(out); out->print(" "); 1752 } 1753 1754 // LIR_OpCompareAndSwap 1755 void LIR_OpCompareAndSwap::print_instr(outputStream* out) const { 1756 addr()->print(out); out->print(" "); 1757 cmp_value()->print(out); out->print(" "); 1758 new_value()->print(out); out->print(" "); 1759 tmp1()->print(out); out->print(" "); 1760 tmp2()->print(out); out->print(" "); 1761 1762 } 1763 1764 // LIR_Op0 1765 void LIR_Op0::print_instr(outputStream* out) const { 1766 result_opr()->print(out); 1767 } 1768 1769 // LIR_Op1 1770 const char * LIR_Op1::name() const { 1771 if (code() == lir_move) { 1772 switch (move_kind()) { 1773 case lir_move_normal: 1774 return "move"; 1775 case lir_move_unaligned: 1776 return "unaligned move"; 1777 case lir_move_volatile: 1778 return "volatile_move"; 1779 case lir_move_wide: 1780 return "wide_move"; 1781 default: 1782 ShouldNotReachHere(); 1783 return "illegal_op"; 1784 } 1785 } else { 1786 return LIR_Op::name(); 1787 } 1788 } 1789 1790 1791 void LIR_Op1::print_instr(outputStream* out) const { 1792 _opr->print(out); out->print(" "); 1793 result_opr()->print(out); out->print(" "); 1794 print_patch_code(out, patch_code()); 1795 } 1796 1797 1798 // LIR_Op1 1799 void LIR_OpRTCall::print_instr(outputStream* out) const { 1800 intx a = (intx)addr(); 1801 out->print("%s", Runtime1::name_for_address(addr())); 1802 out->print(" "); 1803 tmp()->print(out); 1804 } 1805 1806 void LIR_Op1::print_patch_code(outputStream* out, LIR_PatchCode code) { 1807 switch(code) { 1808 case lir_patch_none: break; 1809 case lir_patch_low: out->print("[patch_low]"); break; 1810 case lir_patch_high: out->print("[patch_high]"); break; 1811 case lir_patch_normal: out->print("[patch_normal]"); break; 1812 default: ShouldNotReachHere(); 1813 } 1814 } 1815 1816 // LIR_OpBranch 1817 void LIR_OpBranch::print_instr(outputStream* out) const { 1818 print_condition(out, cond()); out->print(" "); 1819 if (block() != NULL) { 1820 out->print("[B%d] ", block()->block_id()); 1821 } else if (stub() != NULL) { 1822 out->print("["); 1823 stub()->print_name(out); 1824 out->print(": " INTPTR_FORMAT "]", p2i(stub())); 1825 if (stub()->info() != NULL) out->print(" [bci:%d]", stub()->info()->stack()->bci()); 1826 } else { 1827 out->print("[label:" INTPTR_FORMAT "] ", p2i(label())); 1828 } 1829 if (ublock() != NULL) { 1830 out->print("unordered: [B%d] ", ublock()->block_id()); 1831 } 1832 } 1833 1834 void LIR_Op::print_condition(outputStream* out, LIR_Condition cond) { 1835 switch(cond) { 1836 case lir_cond_equal: out->print("[EQ]"); break; 1837 case lir_cond_notEqual: out->print("[NE]"); break; 1838 case lir_cond_less: out->print("[LT]"); break; 1839 case lir_cond_lessEqual: out->print("[LE]"); break; 1840 case lir_cond_greaterEqual: out->print("[GE]"); break; 1841 case lir_cond_greater: out->print("[GT]"); break; 1842 case lir_cond_belowEqual: out->print("[BE]"); break; 1843 case lir_cond_aboveEqual: out->print("[AE]"); break; 1844 case lir_cond_always: out->print("[AL]"); break; 1845 default: out->print("[%d]",cond); break; 1846 } 1847 } 1848 1849 // LIR_OpConvert 1850 void LIR_OpConvert::print_instr(outputStream* out) const { 1851 print_bytecode(out, bytecode()); 1852 in_opr()->print(out); out->print(" "); 1853 result_opr()->print(out); out->print(" "); 1854 #ifdef PPC32 1855 if(tmp1()->is_valid()) { 1856 tmp1()->print(out); out->print(" "); 1857 tmp2()->print(out); out->print(" "); 1858 } 1859 #endif 1860 } 1861 1862 void LIR_OpConvert::print_bytecode(outputStream* out, Bytecodes::Code code) { 1863 switch(code) { 1864 case Bytecodes::_d2f: out->print("[d2f] "); break; 1865 case Bytecodes::_d2i: out->print("[d2i] "); break; 1866 case Bytecodes::_d2l: out->print("[d2l] "); break; 1867 case Bytecodes::_f2d: out->print("[f2d] "); break; 1868 case Bytecodes::_f2i: out->print("[f2i] "); break; 1869 case Bytecodes::_f2l: out->print("[f2l] "); break; 1870 case Bytecodes::_i2b: out->print("[i2b] "); break; 1871 case Bytecodes::_i2c: out->print("[i2c] "); break; 1872 case Bytecodes::_i2d: out->print("[i2d] "); break; 1873 case Bytecodes::_i2f: out->print("[i2f] "); break; 1874 case Bytecodes::_i2l: out->print("[i2l] "); break; 1875 case Bytecodes::_i2s: out->print("[i2s] "); break; 1876 case Bytecodes::_l2i: out->print("[l2i] "); break; 1877 case Bytecodes::_l2f: out->print("[l2f] "); break; 1878 case Bytecodes::_l2d: out->print("[l2d] "); break; 1879 default: 1880 out->print("[?%d]",code); 1881 break; 1882 } 1883 } 1884 1885 void LIR_OpAllocObj::print_instr(outputStream* out) const { 1886 klass()->print(out); out->print(" "); 1887 obj()->print(out); out->print(" "); 1888 tmp1()->print(out); out->print(" "); 1889 tmp2()->print(out); out->print(" "); 1890 tmp3()->print(out); out->print(" "); 1891 tmp4()->print(out); out->print(" "); 1892 out->print("[hdr:%d]", header_size()); out->print(" "); 1893 out->print("[obj:%d]", object_size()); out->print(" "); 1894 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry())); 1895 } 1896 1897 void LIR_OpRoundFP::print_instr(outputStream* out) const { 1898 _opr->print(out); out->print(" "); 1899 tmp()->print(out); out->print(" "); 1900 result_opr()->print(out); out->print(" "); 1901 } 1902 1903 // LIR_Op2 1904 void LIR_Op2::print_instr(outputStream* out) const { 1905 if (code() == lir_cmove || code() == lir_cmp) { 1906 print_condition(out, condition()); out->print(" "); 1907 } 1908 in_opr1()->print(out); out->print(" "); 1909 in_opr2()->print(out); out->print(" "); 1910 if (tmp1_opr()->is_valid()) { tmp1_opr()->print(out); out->print(" "); } 1911 if (tmp2_opr()->is_valid()) { tmp2_opr()->print(out); out->print(" "); } 1912 if (tmp3_opr()->is_valid()) { tmp3_opr()->print(out); out->print(" "); } 1913 if (tmp4_opr()->is_valid()) { tmp4_opr()->print(out); out->print(" "); } 1914 if (tmp5_opr()->is_valid()) { tmp5_opr()->print(out); out->print(" "); } 1915 result_opr()->print(out); 1916 } 1917 1918 void LIR_OpAllocArray::print_instr(outputStream* out) const { 1919 klass()->print(out); out->print(" "); 1920 len()->print(out); out->print(" "); 1921 obj()->print(out); out->print(" "); 1922 tmp1()->print(out); out->print(" "); 1923 tmp2()->print(out); out->print(" "); 1924 tmp3()->print(out); out->print(" "); 1925 tmp4()->print(out); out->print(" "); 1926 out->print("[type:0x%x]", type()); out->print(" "); 1927 out->print("[label:" INTPTR_FORMAT "]", p2i(stub()->entry())); 1928 } 1929 1930 1931 void LIR_OpTypeCheck::print_instr(outputStream* out) const { 1932 object()->print(out); out->print(" "); 1933 if (code() == lir_store_check) { 1934 array()->print(out); out->print(" "); 1935 } 1936 if (code() != lir_store_check) { 1937 klass()->print_name_on(out); out->print(" "); 1938 if (fast_check()) out->print("fast_check "); 1939 } 1940 tmp1()->print(out); out->print(" "); 1941 tmp2()->print(out); out->print(" "); 1942 tmp3()->print(out); out->print(" "); 1943 result_opr()->print(out); out->print(" "); 1944 if (info_for_exception() != NULL) out->print(" [bci:%d]", info_for_exception()->stack()->bci()); 1945 } 1946 1947 1948 // LIR_Op3 1949 void LIR_Op3::print_instr(outputStream* out) const { 1950 in_opr1()->print(out); out->print(" "); 1951 in_opr2()->print(out); out->print(" "); 1952 in_opr3()->print(out); out->print(" "); 1953 result_opr()->print(out); 1954 } 1955 1956 1957 void LIR_OpLock::print_instr(outputStream* out) const { 1958 hdr_opr()->print(out); out->print(" "); 1959 obj_opr()->print(out); out->print(" "); 1960 lock_opr()->print(out); out->print(" "); 1961 if (_scratch->is_valid()) { 1962 _scratch->print(out); out->print(" "); 1963 } 1964 out->print("[lbl:" INTPTR_FORMAT "]", p2i(stub()->entry())); 1965 } 1966 1967 #ifdef ASSERT 1968 void LIR_OpAssert::print_instr(outputStream* out) const { 1969 print_condition(out, condition()); out->print(" "); 1970 in_opr1()->print(out); out->print(" "); 1971 in_opr2()->print(out); out->print(", \""); 1972 out->print("%s", msg()); out->print("\""); 1973 } 1974 #endif 1975 1976 1977 void LIR_OpDelay::print_instr(outputStream* out) const { 1978 _op->print_on(out); 1979 } 1980 1981 1982 // LIR_OpProfileCall 1983 void LIR_OpProfileCall::print_instr(outputStream* out) const { 1984 profiled_method()->name()->print_symbol_on(out); 1985 out->print("."); 1986 profiled_method()->holder()->name()->print_symbol_on(out); 1987 out->print(" @ %d ", profiled_bci()); 1988 mdo()->print(out); out->print(" "); 1989 recv()->print(out); out->print(" "); 1990 tmp1()->print(out); out->print(" "); 1991 } 1992 1993 // LIR_OpProfileType 1994 void LIR_OpProfileType::print_instr(outputStream* out) const { 1995 out->print("exact = "); 1996 if (exact_klass() == NULL) { 1997 out->print("unknown"); 1998 } else { 1999 exact_klass()->print_name_on(out); 2000 } 2001 out->print(" current = "); ciTypeEntries::print_ciklass(out, current_klass()); 2002 out->print(" "); 2003 mdp()->print(out); out->print(" "); 2004 obj()->print(out); out->print(" "); 2005 tmp()->print(out); out->print(" "); 2006 } 2007 2008 #endif // PRODUCT 2009 2010 // Implementation of LIR_InsertionBuffer 2011 2012 void LIR_InsertionBuffer::append(int index, LIR_Op* op) { 2013 assert(_index_and_count.length() % 2 == 0, "must have a count for each index"); 2014 2015 int i = number_of_insertion_points() - 1; 2016 if (i < 0 || index_at(i) < index) { 2017 append_new(index, 1); 2018 } else { 2019 assert(index_at(i) == index, "can append LIR_Ops in ascending order only"); 2020 assert(count_at(i) > 0, "check"); 2021 set_count_at(i, count_at(i) + 1); 2022 } 2023 _ops.push(op); 2024 2025 DEBUG_ONLY(verify()); 2026 } 2027 2028 #ifdef ASSERT 2029 void LIR_InsertionBuffer::verify() { 2030 int sum = 0; 2031 int prev_idx = -1; 2032 2033 for (int i = 0; i < number_of_insertion_points(); i++) { 2034 assert(prev_idx < index_at(i), "index must be ordered ascending"); 2035 sum += count_at(i); 2036 } 2037 assert(sum == number_of_ops(), "wrong total sum"); 2038 } 2039 #endif