23 package jdk.vm.ci.code;
  24 
  25 import java.nio.ByteOrder;
  26 
  27 import jdk.vm.ci.code.Register.RegisterCategory;
  28 import jdk.vm.ci.meta.JavaKind;
  29 import jdk.vm.ci.meta.PlatformKind;
  30 
  31 /**
  32  * Represents a CPU architecture, including information such as its endianness, CPU registers, word
  33  * width, etc.
  34  */
  35 public abstract class Architecture {
  36 
  37     /**
  38      * The architecture specific type of a native word.
  39      */
  40     private final PlatformKind wordKind;
  41 
  42     /**
  43      * The name of this architecture (e.g. "AMD64", "SPARCv9").
  44      */
  45     private final String name;
  46 
  47     /**
  48      * List of all available registers on this architecture. The index of each register in this list
  49      * is equal to its {@linkplain Register#number number}.
  50      */
  51     private final RegisterArray registers;
  52 
  53     /**
  54      * The byte ordering can be either little or big endian.
  55      */
  56     private final ByteOrder byteOrder;
  57 
  58     /**
  59      * Whether the architecture supports unaligned memory accesses.
  60      */
  61     private final boolean unalignedMemoryAccess;
  62 
  63     /**

  23 package jdk.vm.ci.code;
  24 
  25 import java.nio.ByteOrder;
  26 
  27 import jdk.vm.ci.code.Register.RegisterCategory;
  28 import jdk.vm.ci.meta.JavaKind;
  29 import jdk.vm.ci.meta.PlatformKind;
  30 
  31 /**
  32  * Represents a CPU architecture, including information such as its endianness, CPU registers, word
  33  * width, etc.
  34  */
  35 public abstract class Architecture {
  36 
  37     /**
  38      * The architecture specific type of a native word.
  39      */
  40     private final PlatformKind wordKind;
  41 
  42     /**
  43      * The name of this architecture (e.g. "AMD64").
  44      */
  45     private final String name;
  46 
  47     /**
  48      * List of all available registers on this architecture. The index of each register in this list
  49      * is equal to its {@linkplain Register#number number}.
  50      */
  51     private final RegisterArray registers;
  52 
  53     /**
  54      * The byte ordering can be either little or big endian.
  55      */
  56     private final ByteOrder byteOrder;
  57 
  58     /**
  59      * Whether the architecture supports unaligned memory accesses.
  60      */
  61     private final boolean unalignedMemoryAccess;
  62 
  63     /**