77 _do_vector_loop(phase->C->do_vector_loop()), // whether to do vectorization/simd style
78 _do_reserve_copy(DoReserveCopyInSuperWord),
79 _num_work_vecs(0), // amount of vector work we have
80 _num_reductions(0), // amount of reduction work we have
81 _ii_first(-1), // first loop generation index - only if do_vector_loop()
82 _ii_last(-1), // last loop generation index - only if do_vector_loop()
83 _ii_order(arena(), 8, 0, 0)
84 {
85 #ifndef PRODUCT
86 _vector_loop_debug = 0;
87 if (_phase->C->method() != NULL) {
88 _vector_loop_debug = phase->C->directive()->VectorizeDebugOption;
89 }
90
91 #endif
92 }
93
94 //------------------------------transform_loop---------------------------
95 void SuperWord::transform_loop(IdealLoopTree* lpt, bool do_optimization) {
96 assert(UseSuperWord, "should be");
97 // Do vectors exist on this architecture?
98 if (Matcher::vector_width_in_bytes(T_BYTE) < 2) return;
99
100 assert(lpt->_head->is_CountedLoop(), "must be");
101 CountedLoopNode *cl = lpt->_head->as_CountedLoop();
102
103 if (!cl->is_valid_counted_loop()) return; // skip malformed counted loop
104
105 bool post_loop_allowed = (PostLoopMultiversioning && Matcher::has_predicated_vectors() && cl->is_post_loop());
106 if (post_loop_allowed) {
107 if (cl->is_reduction_loop()) return; // no predication mapping
108 Node *limit = cl->limit();
109 if (limit->is_Con()) return; // non constant limits only
110 // Now check the limit for expressions we do not handle
111 if (limit->is_Add()) {
112 Node *in2 = limit->in(2);
113 if (in2->is_Con()) {
114 int val = in2->get_int();
115 // should not try to program these cases
116 if (val < 0) return;
117 }
118 }
|
77 _do_vector_loop(phase->C->do_vector_loop()), // whether to do vectorization/simd style
78 _do_reserve_copy(DoReserveCopyInSuperWord),
79 _num_work_vecs(0), // amount of vector work we have
80 _num_reductions(0), // amount of reduction work we have
81 _ii_first(-1), // first loop generation index - only if do_vector_loop()
82 _ii_last(-1), // last loop generation index - only if do_vector_loop()
83 _ii_order(arena(), 8, 0, 0)
84 {
85 #ifndef PRODUCT
86 _vector_loop_debug = 0;
87 if (_phase->C->method() != NULL) {
88 _vector_loop_debug = phase->C->directive()->VectorizeDebugOption;
89 }
90
91 #endif
92 }
93
94 //------------------------------transform_loop---------------------------
95 void SuperWord::transform_loop(IdealLoopTree* lpt, bool do_optimization) {
96 assert(UseSuperWord, "should be");
97 // SuperWord only works with power of two vector sizes.
98 int vector_width = Matcher::vector_width_in_bytes(T_BYTE);
99 if (vector_width < 2 || !is_power_of_2(vector_width)) {
100 return;
101 }
102
103 assert(lpt->_head->is_CountedLoop(), "must be");
104 CountedLoopNode *cl = lpt->_head->as_CountedLoop();
105
106 if (!cl->is_valid_counted_loop()) return; // skip malformed counted loop
107
108 bool post_loop_allowed = (PostLoopMultiversioning && Matcher::has_predicated_vectors() && cl->is_post_loop());
109 if (post_loop_allowed) {
110 if (cl->is_reduction_loop()) return; // no predication mapping
111 Node *limit = cl->limit();
112 if (limit->is_Con()) return; // non constant limits only
113 // Now check the limit for expressions we do not handle
114 if (limit->is_Add()) {
115 Node *in2 = limit->in(2);
116 if (in2->is_Con()) {
117 int val = in2->get_int();
118 // should not try to program these cases
119 if (val < 0) return;
120 }
121 }
|