1 /*
 2  * Copyright (c) 2006, 2019, Oracle and/or its affiliates. All rights reserved.
 3  * Copyright (c) 2014, Red Hat Inc. All rights reserved.
 4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 5  *
 6  * This code is free software; you can redistribute it and/or modify it
 7  * under the terms of the GNU General Public License version 2 only, as
 8  * published by the Free Software Foundation.
 9  *
10  * This code is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
13  * version 2 for more details (a copy is included in the LICENSE file that
14  * accompanied this code).
15  *
16  * You should have received a copy of the GNU General Public License version
17  * 2 along with this work; if not, write to the Free Software Foundation,
18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19  *
20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21  * or visit www.oracle.com if you need additional information or have any
22  * questions.
23  *
24  */
25 
26 #ifndef CPU_AARCH64_VMREG_AARCH64_INLINE_HPP
27 #define CPU_AARCH64_VMREG_AARCH64_INLINE_HPP
28 
29 inline VMReg RegisterImpl::as_VMReg() {
30   if( this==noreg ) return VMRegImpl::Bad();
31   return VMRegImpl::as_VMReg(encoding() * RegisterImpl::max_slots_per_register);
32 }
33 
34 inline VMReg FloatRegisterImpl::as_VMReg() {
35   return VMRegImpl::as_VMReg((encoding() * FloatRegisterImpl::max_slots_per_register) +
36                              ConcreteRegisterImpl::max_gpr);
37 }
38 




39 #endif // CPU_AARCH64_VMREG_AARCH64_INLINE_HPP

 1 /*
 2  * Copyright (c) 2006, 2020, Oracle and/or its affiliates. All rights reserved.
 3  * Copyright (c) 2014, 2020, Red Hat Inc. All rights reserved.
 4  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
 5  *
 6  * This code is free software; you can redistribute it and/or modify it
 7  * under the terms of the GNU General Public License version 2 only, as
 8  * published by the Free Software Foundation.
 9  *
10  * This code is distributed in the hope that it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
13  * version 2 for more details (a copy is included in the LICENSE file that
14  * accompanied this code).
15  *
16  * You should have received a copy of the GNU General Public License version
17  * 2 along with this work; if not, write to the Free Software Foundation,
18  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
19  *
20  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
21  * or visit www.oracle.com if you need additional information or have any
22  * questions.
23  *
24  */
25 
26 #ifndef CPU_AARCH64_VMREG_AARCH64_INLINE_HPP
27 #define CPU_AARCH64_VMREG_AARCH64_INLINE_HPP
28 
29 inline VMReg RegisterImpl::as_VMReg() {
30   if( this==noreg ) return VMRegImpl::Bad();
31   return VMRegImpl::as_VMReg(encoding() * RegisterImpl::max_slots_per_register);
32 }
33 
34 inline VMReg FloatRegisterImpl::as_VMReg() {
35   return VMRegImpl::as_VMReg((encoding() * FloatRegisterImpl::max_slots_per_register) +
36                              ConcreteRegisterImpl::max_gpr);
37 }
38 
39 inline VMReg PRegisterImpl::as_VMReg() {
40   return VMRegImpl::as_VMReg(encoding() + ConcreteRegisterImpl::max_fpr);
41 }
42 
43 #endif // CPU_AARCH64_VMREG_AARCH64_INLINE_HPP