1 /*
  2  * Copyright (c) 1997, 2020, Oracle and/or its affiliates. All rights reserved.
  3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
  4  *
  5  * This code is free software; you can redistribute it and/or modify it
  6  * under the terms of the GNU General Public License version 2 only, as
  7  * published by the Free Software Foundation.
  8  *
  9  * This code is distributed in the hope that it will be useful, but WITHOUT
 10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 12  * version 2 for more details (a copy is included in the LICENSE file that
 13  * accompanied this code).
 14  *
 15  * You should have received a copy of the GNU General Public License version
 16  * 2 along with this work; if not, write to the Free Software Foundation,
 17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 18  *
 19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
 20  * or visit www.oracle.com if you need additional information or have any
 21  * questions.
 22  *
 23  */
 24 
 25 #include "precompiled.hpp"
 26 #include "opto/ad.hpp"
 27 #include "opto/chaitin.hpp"
 28 #include "opto/compile.hpp"
 29 #include "opto/matcher.hpp"
 30 #include "opto/node.hpp"
 31 #include "opto/regmask.hpp"
 32 #include "utilities/population_count.hpp"
 33 #include "utilities/powerOfTwo.hpp"
 34 
 35 #define RM_SIZE _RM_SIZE /* a constant private to the class RegMask */
 36 
 37 //------------------------------dump-------------------------------------------
 38 
 39 #ifndef PRODUCT
 40 void OptoReg::dump(int r, outputStream *st) {
 41   switch (r) {
 42   case Special: st->print("r---"); break;
 43   case Bad:     st->print("rBAD"); break;
 44   default:
 45     if (r < _last_Mach_Reg) st->print("%s", Matcher::regName[r]);
 46     else st->print("rS%d",r);
 47     break;
 48   }
 49 }
 50 #endif
 51 
 52 
 53 //=============================================================================
 54 const RegMask RegMask::Empty(
 55 # define BODY(I) 0,
 56   FORALL_BODY
 57 # undef BODY
 58   0
 59 );
 60 
 61 //=============================================================================
 62 bool RegMask::is_vector(uint ireg) {
 63   return (ireg == Op_VecA || ireg == Op_VecS || ireg == Op_VecD ||
 64           ireg == Op_VecX || ireg == Op_VecY || ireg == Op_VecZ );
 65 }
 66 
 67 int RegMask::num_registers(uint ireg) {
 68     switch(ireg) {
 69       case Op_VecZ:
 70         return SlotsPerVecZ;
 71       case Op_VecY:
 72         return SlotsPerVecY;
 73       case Op_VecX:
 74         return SlotsPerVecX;
 75       case Op_VecD:
 76         return SlotsPerVecD;
 77       case Op_RegD:
 78       case Op_RegL:
 79 #ifdef _LP64
 80       case Op_RegP:
 81 #endif
 82         return 2;
 83       case Op_VecA:
 84         assert(Matcher::supports_scalable_vector(), "does not support scalable vector");
 85         return SlotsPerVecA;
 86     }
 87     // Op_VecS and the rest ideal registers.
 88     return 1;
 89 }
 90 
 91 int RegMask::num_registers(uint ireg, LRG &lrg) {
 92   int n_regs = num_registers(ireg);
 93 
 94   // assigned is OptoReg which is selected by register allocator
 95   OptoReg::Name assigned = lrg.reg();
 96   assert(OptoReg::is_valid(assigned), "should be valid opto register");
 97 
 98   if (lrg._is_scalable && OptoReg::is_stack(assigned)) {
 99     if (lrg._is_vector) {
100       assert(ireg == Op_VecA, "scalable vector register");
101     }
102     n_regs = lrg.scalable_reg_slots();
103   }
104 
105   return n_regs;
106 }
107 
108 // Clear out partial bits; leave only bit pairs
109 void RegMask::clear_to_pairs() {
110   assert(valid_watermarks(), "sanity");
111   for (int i = _lwm; i <= _hwm; i++) {
112     int bits = _A[i];
113     bits &= ((bits & 0x55555555)<<1); // 1 hi-bit set for each pair
114     bits |= (bits>>1);          // Smear 1 hi-bit into a pair
115     _A[i] = bits;
116   }
117   assert(is_aligned_pairs(), "mask is not aligned, adjacent pairs");
118 }
119 
120 bool RegMask::is_misaligned_pair() const {
121   return Size() == 2 && !is_aligned_pairs();
122 }
123 
124 bool RegMask::is_aligned_pairs() const {
125   // Assert that the register mask contains only bit pairs.
126   assert(valid_watermarks(), "sanity");
127   for (int i = _lwm; i <= _hwm; i++) {
128     int bits = _A[i];
129     while (bits) {              // Check bits for pairing
130       int bit = bits & -bits;   // Extract low bit
131       // Low bit is not odd means its mis-aligned.
132       if ((bit & 0x55555555) == 0) return false;
133       bits -= bit;              // Remove bit from mask
134       // Check for aligned adjacent bit
135       if ((bits & (bit<<1)) == 0) return false;
136       bits -= (bit<<1);         // Remove other halve of pair
137     }
138   }
139   return true;
140 }
141 
142 // Return TRUE if the mask contains a single bit
143 bool RegMask::is_bound1() const {
144   if (is_AllStack()) return false;
145   return Size() == 1;
146 }
147 
148 // Return TRUE if the mask contains an adjacent pair of bits and no other bits.
149 bool RegMask::is_bound_pair() const {
150   if (is_AllStack()) return false;
151   int bit = -1;                 // Set to hold the one bit allowed
152   assert(valid_watermarks(), "sanity");
153   for (int i = _lwm; i <= _hwm; i++) {
154     if (_A[i]) {                   // Found some bits
155       if (bit != -1) return false; // Already had bits, so fail
156       bit = _A[i] & -(_A[i]);      // Extract 1 bit from mask
157       if ((bit << 1) != 0) {       // Bit pair stays in same word?
158         if ((bit | (bit<<1)) != _A[i])
159           return false;            // Require adjacent bit pair and no more bits
160       } else {                     // Else its a split-pair case
161         if(bit != _A[i]) return false; // Found many bits, so fail
162         i++;                       // Skip iteration forward
163         if (i > _hwm || _A[i] != 1)
164           return false; // Require 1 lo bit in next word
165       }
166     }
167   }
168   // True for both the empty mask and for a bit pair
169   return true;
170 }
171 
172 // Test for a single adjacent set of ideal register's size.
173 bool RegMask::is_bound(uint ireg) const {
174   if (is_vector(ireg)) {
175     if (is_bound_set(num_registers(ireg)))
176       return true;
177   } else if (is_bound1() || is_bound_pair()) {
178     return true;
179   }
180   return false;
181 }
182 // Check that whether given reg number with size is valid
183 // for current regmask, where reg is the highest number.
184 bool RegMask::is_valid_reg(OptoReg::Name reg, const int size) const {
185   for (int i = 0; i < size; i++) {
186     if (!Member(reg - i)) {
187       return false;
188     }
189   }
190   return true;
191 }
192 
193 // only indicies of power 2 are accessed, so index 3 is only filled in for storage.
194 static int low_bits[5] = { 0x55555555, 0x11111111, 0x01010101, 0x00000000, 0x00010001 };
195 
196 // Find the lowest-numbered register set in the mask.  Return the
197 // HIGHEST register number in the set, or BAD if no sets.
198 // Works also for size 1.
199 OptoReg::Name RegMask::find_first_set(LRG &lrg, const int size) const {
200   if (lrg._is_scalable && lrg._is_vector) {
201     // For scalable vector register, regmask is SlotsPerVecA bits aligned.
202     assert(is_aligned_sets(SlotsPerVecA), "mask is not aligned, adjacent sets");
203   } else {
204     assert(is_aligned_sets(size), "mask is not aligned, adjacent sets");
205   }
206   assert(valid_watermarks(), "sanity");
207   for (int i = _lwm; i <= _hwm; i++) {
208     if (_A[i]) {                // Found some bits
209       // Convert to bit number, return hi bit in pair
210       return OptoReg::Name((i<<_LogWordBits) + find_lowest_bit(_A[i]) + (size - 1));
211     }
212   }
213   return OptoReg::Bad;
214 }
215 
216 // Clear out partial bits; leave only aligned adjacent bit pairs
217 void RegMask::clear_to_sets(const int size) {
218   if (size == 1) return;
219   assert(2 <= size && size <= 16, "update low bits table");
220   assert(is_power_of_2(size), "sanity");
221   assert(valid_watermarks(), "sanity");
222   int low_bits_mask = low_bits[size>>2];
223   for (int i = _lwm; i <= _hwm; i++) {
224     int bits = _A[i];
225     int sets = (bits & low_bits_mask);
226     for (int j = 1; j < size; j++) {
227       sets = (bits & (sets<<1)); // filter bits which produce whole sets
228     }
229     sets |= (sets>>1);           // Smear 1 hi-bit into a set
230     if (size > 2) {
231       sets |= (sets>>2);         // Smear 2 hi-bits into a set
232       if (size > 4) {
233         sets |= (sets>>4);       // Smear 4 hi-bits into a set
234         if (size > 8) {
235           sets |= (sets>>8);     // Smear 8 hi-bits into a set
236         }
237       }
238     }
239     _A[i] = sets;
240   }
241   assert(is_aligned_sets(size), "mask is not aligned, adjacent sets");
242 }
243 
244 // Smear out partial bits to aligned adjacent bit sets
245 void RegMask::smear_to_sets(const int size) {
246   if (size == 1) return;
247   assert(2 <= size && size <= 16, "update low bits table");
248   assert(is_power_of_2(size), "sanity");
249   assert(valid_watermarks(), "sanity");
250   int low_bits_mask = low_bits[size>>2];
251   for (int i = _lwm; i <= _hwm; i++) {
252     int bits = _A[i];
253     int sets = 0;
254     for (int j = 0; j < size; j++) {
255       sets |= (bits & low_bits_mask);  // collect partial bits
256       bits  = bits>>1;
257     }
258     sets |= (sets<<1);           // Smear 1 lo-bit  into a set
259     if (size > 2) {
260       sets |= (sets<<2);         // Smear 2 lo-bits into a set
261       if (size > 4) {
262         sets |= (sets<<4);       // Smear 4 lo-bits into a set
263         if (size > 8) {
264           sets |= (sets<<8);     // Smear 8 lo-bits into a set
265         }
266       }
267     }
268     _A[i] = sets;
269   }
270   assert(is_aligned_sets(size), "mask is not aligned, adjacent sets");
271 }
272 
273 // Assert that the register mask contains only bit sets.
274 bool RegMask::is_aligned_sets(const int size) const {
275   if (size == 1) return true;
276   assert(2 <= size && size <= 16, "update low bits table");
277   assert(is_power_of_2(size), "sanity");
278   int low_bits_mask = low_bits[size>>2];
279   assert(valid_watermarks(), "sanity");
280   for (int i = _lwm; i <= _hwm; i++) {
281     int bits = _A[i];
282     while (bits) {              // Check bits for pairing
283       int bit = bits & -bits;   // Extract low bit
284       // Low bit is not odd means its mis-aligned.
285       if ((bit & low_bits_mask) == 0) {
286         return false;
287       }
288       // Do extra work since (bit << size) may overflow.
289       int hi_bit = bit << (size-1); // high bit
290       int set = hi_bit + ((hi_bit-1) & ~(bit-1));
291       // Check for aligned adjacent bits in this set
292       if ((bits & set) != set) {
293         return false;
294       }
295       bits -= set;  // Remove this set
296     }
297   }
298   return true;
299 }
300 
301 // Return TRUE if the mask contains one adjacent set of bits and no other bits.
302 // Works also for size 1.
303 int RegMask::is_bound_set(const int size) const {
304   if (is_AllStack()) return false;
305   assert(1 <= size && size <= 16, "update low bits table");
306   assert(valid_watermarks(), "sanity");
307   int bit = -1;                 // Set to hold the one bit allowed
308   for (int i = _lwm; i <= _hwm; i++) {
309     if (_A[i] ) {               // Found some bits
310       if (bit != -1)
311        return false;            // Already had bits, so fail
312       bit = _A[i] & -_A[i];     // Extract low bit from mask
313       int hi_bit = bit << (size-1); // high bit
314       if (hi_bit != 0) {        // Bit set stays in same word?
315         int set = hi_bit + ((hi_bit-1) & ~(bit-1));
316         if (set != _A[i])
317           return false;         // Require adjacent bit set and no more bits
318       } else {                  // Else its a split-set case
319         if (((-1) & ~(bit-1)) != _A[i])
320           return false;         // Found many bits, so fail
321         i++;                    // Skip iteration forward and check high part
322         // The lower (32-size) bits should be 0 since it is split case.
323         int clear_bit_size = 32-size;
324         int shift_back_size = 32-clear_bit_size;
325         int set = bit>>clear_bit_size;
326         set = set & -set; // Remove sign extension.
327         set = (((set << size) - 1) >> shift_back_size);
328         if (i > _hwm || _A[i] != set)
329           return false; // Require expected low bits in next word
330       }
331     }
332   }
333   // True for both the empty mask and for a bit set
334   return true;
335 }
336 
337 // UP means register only, Register plus stack, or stack only is DOWN
338 bool RegMask::is_UP() const {
339   // Quick common case check for DOWN (any stack slot is legal)
340   if (is_AllStack())
341     return false;
342   // Slower check for any stack bits set (also DOWN)
343   if (overlap(Matcher::STACK_ONLY_mask))
344     return false;
345   // Not DOWN, so must be UP
346   return true;
347 }
348 
349 // Compute size of register mask in bits
350 uint RegMask::Size() const {
351   uint sum = 0;
352   assert(valid_watermarks(), "sanity");
353   for (int i = _lwm; i <= _hwm; i++) {
354     sum += population_count((unsigned)_A[i]);
355   }
356   return sum;
357 }
358 
359 #ifndef PRODUCT
360 void RegMask::dump(outputStream *st) const {
361   st->print("[");
362   RegMask rm = *this;           // Structure copy into local temp
363 
364   OptoReg::Name start = rm.find_first_elem(); // Get a register
365   if (OptoReg::is_valid(start)) { // Check for empty mask
366     rm.Remove(start);           // Yank from mask
367     OptoReg::dump(start, st);   // Print register
368     OptoReg::Name last = start;
369 
370     // Now I have printed an initial register.
371     // Print adjacent registers as "rX-rZ" instead of "rX,rY,rZ".
372     // Begin looping over the remaining registers.
373     while (1) {                 //
374       OptoReg::Name reg = rm.find_first_elem(); // Get a register
375       if (!OptoReg::is_valid(reg))
376         break;                  // Empty mask, end loop
377       rm.Remove(reg);           // Yank from mask
378 
379       if (last+1 == reg) {      // See if they are adjacent
380         // Adjacent registers just collect into long runs, no printing.
381         last = reg;
382       } else {                  // Ending some kind of run
383         if (start == last) {    // 1-register run; no special printing
384         } else if (start+1 == last) {
385           st->print(",");       // 2-register run; print as "rX,rY"
386           OptoReg::dump(last, st);
387         } else {                // Multi-register run; print as "rX-rZ"
388           st->print("-");
389           OptoReg::dump(last, st);
390         }
391         st->print(",");         // Seperate start of new run
392         start = last = reg;     // Start a new register run
393         OptoReg::dump(start, st); // Print register
394       } // End of if ending a register run or not
395     } // End of while regmask not empty
396 
397     if (start == last) {        // 1-register run; no special printing
398     } else if (start+1 == last) {
399       st->print(",");           // 2-register run; print as "rX,rY"
400       OptoReg::dump(last, st);
401     } else {                    // Multi-register run; print as "rX-rZ"
402       st->print("-");
403       OptoReg::dump(last, st);
404     }
405     if (rm.is_AllStack()) st->print("...");
406   }
407   st->print("]");
408 }
409 #endif