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src/hotspot/cpu/aarch64/sharedRuntime_aarch64.cpp

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rev 60615 : 8231441: Initial SVE backend support
Reviewed-by: adinn, pli
Contributed-by: joshua.zhu@arm.com, yang.zhang@arm.com, ningsheng.jian@arm.com

*** 113,126 **** reg_save_size = return_off + RegisterImpl::max_slots_per_register}; }; OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) { #if COMPILER2_OR_JVMCI if (save_vectors) { // Save upper half of vector registers ! int vect_words = FloatRegisterImpl::number_of_registers * FloatRegisterImpl::extra_save_slots_per_register / VMRegImpl::slots_per_word; additional_frame_words += vect_words; } #else assert(!save_vectors, "vectors are generated only by C2 and JVMCI"); --- 113,143 ---- reg_save_size = return_off + RegisterImpl::max_slots_per_register}; }; OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words, int* total_frame_words, bool save_vectors) { + bool use_sve = false; + int sve_vector_size_in_bytes = 0; + int sve_vector_size_in_slots = 0; + + #ifdef COMPILER2 + use_sve = Matcher::supports_scalable_vector(); + sve_vector_size_in_bytes = Matcher::scalable_vector_reg_size(T_BYTE); + sve_vector_size_in_slots = Matcher::scalable_vector_reg_size(T_FLOAT); + #endif + #if COMPILER2_OR_JVMCI if (save_vectors) { + int vect_words = 0; + int extra_save_slots_per_register = 0; // Save upper half of vector registers ! if (use_sve) { ! extra_save_slots_per_register = sve_vector_size_in_slots - FloatRegisterImpl::save_slots_per_register; ! } else { ! extra_save_slots_per_register = FloatRegisterImpl::extra_save_slots_per_neon_register; ! } ! vect_words = FloatRegisterImpl::number_of_registers * extra_save_slots_per_register / VMRegImpl::slots_per_word; additional_frame_words += vect_words; } #else assert(!save_vectors, "vectors are generated only by C2 and JVMCI");
*** 136,146 **** int frame_size_in_words = frame_size_in_bytes / wordSize; *total_frame_words = frame_size_in_words; // Save Integer and Float registers. __ enter(); ! __ push_CPU_state(save_vectors); // Set an oopmap for the call site. This oopmap will map all // oop-registers and debug-info registers as callee-saved. This // will allow deoptimization at this safepoint to find all possible // debug-info recordings, as well as let GC find all oops. --- 153,163 ---- int frame_size_in_words = frame_size_in_bytes / wordSize; *total_frame_words = frame_size_in_words; // Save Integer and Float registers. __ enter(); ! __ push_CPU_state(save_vectors, use_sve, sve_vector_size_in_bytes); // Set an oopmap for the call site. This oopmap will map all // oop-registers and debug-info registers as callee-saved. This // will allow deoptimization at this safepoint to find all possible // debug-info recordings, as well as let GC find all oops.
*** 160,183 **** } } for (int i = 0; i < FloatRegisterImpl::number_of_registers; i++) { FloatRegister r = as_FloatRegister(i); ! int sp_offset = save_vectors ? (FloatRegisterImpl::max_slots_per_register * i) : ! (FloatRegisterImpl::save_slots_per_register * i); oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset), r->as_VMReg()); } return oop_map; } void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) { #if !COMPILER2_OR_JVMCI assert(!restore_vectors, "vectors are generated only by C2 and JVMCI"); - #endif __ pop_CPU_state(restore_vectors); __ leave(); } void RegisterSaver::restore_result_registers(MacroAssembler* masm) { --- 177,208 ---- } } for (int i = 0; i < FloatRegisterImpl::number_of_registers; i++) { FloatRegister r = as_FloatRegister(i); ! int sp_offset = 0; ! if (save_vectors) { ! sp_offset = use_sve ? (sve_vector_size_in_slots * i) : ! (FloatRegisterImpl::slots_per_neon_register * i); ! } else { ! sp_offset = FloatRegisterImpl::save_slots_per_register * i; ! } oop_map->set_callee_saved(VMRegImpl::stack2reg(sp_offset), r->as_VMReg()); } return oop_map; } void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) { #if !COMPILER2_OR_JVMCI assert(!restore_vectors, "vectors are generated only by C2 and JVMCI"); __ pop_CPU_state(restore_vectors); + #else + __ pop_CPU_state(restore_vectors, Matcher::supports_scalable_vector(), + Matcher::scalable_vector_reg_size(T_BYTE)); + #endif __ leave(); } void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
*** 1840,1849 **** --- 1865,1879 ---- __ strw(rscratch1, Address(rthread, JavaThread::thread_state_offset())); // Force this write out before the read below __ dmb(Assembler::ISH); + if (UseSVE > 0) { + // Make sure that jni code does not change SVE vector length. + __ verify_sve_vector_length(); + } + // check for safepoint operation in progress and/or pending suspend requests Label safepoint_in_progress, safepoint_in_progress_done; { __ safepoint_poll_acquire(safepoint_in_progress); __ ldrw(rscratch1, Address(rthread, JavaThread::suspend_flags_offset()));
*** 2772,2781 **** --- 2802,2817 ---- __ reset_last_Java_frame(false); __ maybe_isb(); __ membar(Assembler::LoadLoad | Assembler::LoadStore); + if (UseSVE > 0 && save_vectors) { + // Reinitialize the ptrue predicate register, in case the external runtime + // call clobbers ptrue reg, as we may return to SVE compiled code. + __ reinitialize_ptrue(); + } + __ ldr(rscratch1, Address(rthread, Thread::pending_exception_offset())); __ cbz(rscratch1, noException); // Exception pending
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