src/hotspot/cpu/aarch64/vm_version_aarch64.hpp

rev 60615 : 8231441: Initial SVE backend support
Reviewed-by: adinn, pli
Contributed-by: joshua.zhu@arm.com, yang.zhang@arm.com, ningsheng.jian@arm.com

@@ -39,10 +39,12 @@
   static int _model2;
   static int _variant;
   static int _revision;
   static int _stepping;
   static bool _dcpop;
+  static int _initial_sve_vector_length;
+
   struct PsrInfo {
     uint32_t dczid_el0;
     uint32_t ctr_el0;
   };
   static PsrInfo _psr_info;

@@ -104,10 +106,11 @@
   static int cpu_model()                      { return _model; }
   static int cpu_model2()                     { return _model2; }
   static int cpu_variant()                    { return _variant; }
   static int cpu_revision()                   { return _revision; }
   static bool supports_dcpop()                { return _dcpop; }
+  static int get_initial_sve_vector_length()  { return _initial_sve_vector_length; };
   static ByteSize dczid_el0_offset() { return byte_offset_of(PsrInfo, dczid_el0); }
   static ByteSize ctr_el0_offset()   { return byte_offset_of(PsrInfo, ctr_el0); }
   static bool is_zva_enabled() {
     // Check the DZP bit (bit 4) of dczid_el0 is zero
     // and block size (bit 0~3) is not zero.