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src/hotspot/cpu/x86/x86_64.ad

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rev 60615 : 8231441: Initial SVE backend support
Reviewed-by: adinn, pli
Contributed-by: joshua.zhu@arm.com, yang.zhang@arm.com, ningsheng.jian@arm.com


2817       0,
2818       0,
2819       RAX_num,  // Op_RegN
2820       RAX_num,  // Op_RegI
2821       RAX_num,  // Op_RegP
2822       XMM0_num, // Op_RegF
2823       XMM0_num, // Op_RegD
2824       RAX_num   // Op_RegL
2825     };
2826     static const int hi[Op_RegL + 1] = {
2827       0,
2828       0,
2829       OptoReg::Bad, // Op_RegN
2830       OptoReg::Bad, // Op_RegI
2831       RAX_H_num,    // Op_RegP
2832       OptoReg::Bad, // Op_RegF
2833       XMM0b_num,    // Op_RegD
2834       RAX_H_num     // Op_RegL
2835     };
2836     // Excluded flags and vector registers.
2837     assert(ARRAY_SIZE(hi) == _last_machine_leaf - 6, "missing type");
2838     return OptoRegPair(hi[ideal_reg], lo[ideal_reg]);
2839   %}
2840 %}
2841 
2842 //----------ATTRIBUTES---------------------------------------------------------
2843 //----------Operand Attributes-------------------------------------------------
2844 op_attrib op_cost(0);        // Required cost attribute
2845 
2846 //----------Instruction Attributes---------------------------------------------
2847 ins_attrib ins_cost(100);       // Required cost attribute
2848 ins_attrib ins_size(8);         // Required size attribute (in bits)
2849 ins_attrib ins_short_branch(0); // Required flag: is this instruction
2850                                 // a non-matching short branch variant
2851                                 // of some long branch?
2852 ins_attrib ins_alignment(1);    // Required alignment attribute (must
2853                                 // be a power of 2) specifies the
2854                                 // alignment that some part of the
2855                                 // instruction (not necessarily the
2856                                 // start) requires.  If > 1, a
2857                                 // compute_padding() function must be




2817       0,
2818       0,
2819       RAX_num,  // Op_RegN
2820       RAX_num,  // Op_RegI
2821       RAX_num,  // Op_RegP
2822       XMM0_num, // Op_RegF
2823       XMM0_num, // Op_RegD
2824       RAX_num   // Op_RegL
2825     };
2826     static const int hi[Op_RegL + 1] = {
2827       0,
2828       0,
2829       OptoReg::Bad, // Op_RegN
2830       OptoReg::Bad, // Op_RegI
2831       RAX_H_num,    // Op_RegP
2832       OptoReg::Bad, // Op_RegF
2833       XMM0b_num,    // Op_RegD
2834       RAX_H_num     // Op_RegL
2835     };
2836     // Excluded flags and vector registers.
2837     assert(ARRAY_SIZE(hi) == _last_machine_leaf - 8, "missing type");
2838     return OptoRegPair(hi[ideal_reg], lo[ideal_reg]);
2839   %}
2840 %}
2841 
2842 //----------ATTRIBUTES---------------------------------------------------------
2843 //----------Operand Attributes-------------------------------------------------
2844 op_attrib op_cost(0);        // Required cost attribute
2845 
2846 //----------Instruction Attributes---------------------------------------------
2847 ins_attrib ins_cost(100);       // Required cost attribute
2848 ins_attrib ins_size(8);         // Required size attribute (in bits)
2849 ins_attrib ins_short_branch(0); // Required flag: is this instruction
2850                                 // a non-matching short branch variant
2851                                 // of some long branch?
2852 ins_attrib ins_alignment(1);    // Required alignment attribute (must
2853                                 // be a power of 2) specifies the
2854                                 // alignment that some part of the
2855                                 // instruction (not necessarily the
2856                                 // start) requires.  If > 1, a
2857                                 // compute_padding() function must be


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