1 /*
2 * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
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23 */
24
25 #ifndef SHARE_OPTO_CHAITIN_HPP
26 #define SHARE_OPTO_CHAITIN_HPP
27
28 #include "code/vmreg.hpp"
29 #include "memory/resourceArea.hpp"
30 #include "opto/connode.hpp"
31 #include "opto/live.hpp"
32 #include "opto/machnode.hpp"
33 #include "opto/matcher.hpp"
34 #include "opto/phase.hpp"
35 #include "opto/regalloc.hpp"
36 #include "opto/regmask.hpp"
37
38 class Matcher;
39 class PhaseCFG;
40 class PhaseLive;
41 class PhaseRegAlloc;
42 class PhaseChaitin;
43
44 #define OPTO_DEBUG_SPLIT_FREQ BLOCK_FREQUENCY(0.001)
45 #define OPTO_LRG_HIGH_FREQ BLOCK_FREQUENCY(0.25)
46
47 //------------------------------LRG--------------------------------------------
48 // Live-RanGe structure.
49 class LRG : public ResourceObj {
50 friend class VMStructs;
51 public:
52 static const uint AllStack_size = 0xFFFFF; // This mask size is used to tell that the mask of this LRG supports stack positions
53 enum { SPILL_REG=29999 }; // Register number of a spilled LRG
54
55 double _cost; // 2 for loads/1 for stores times block freq
56 double _area; // Sum of all simultaneously live values
57 double score() const; // Compute score from cost and area
58 double _maxfreq; // Maximum frequency of any def or use
59
60 Node *_def; // Check for multi-def live ranges
61 #ifndef PRODUCT
62 GrowableArray<Node*>* _defs;
63 #endif
64
65 uint _risk_bias; // Index of LRG which we want to avoid color
66 uint _copy_bias; // Index of LRG which we want to share color
67
68 uint _next; // Index of next LRG in linked list
69 uint _prev; // Index of prev LRG in linked list
70 private:
71 uint _reg; // Chosen register; undefined if mask is plural
72 public:
73 // Return chosen register for this LRG. Error if the LRG is not bound to
74 // a single register.
75 OptoReg::Name reg() const { return OptoReg::Name(_reg); }
76 void set_reg( OptoReg::Name r ) { _reg = r; }
77
78 private:
79 uint _eff_degree; // Effective degree: Sum of neighbors _num_regs
80 public:
81 int degree() const { assert( _degree_valid , "" ); return _eff_degree; }
82 // Degree starts not valid and any change to the IFG neighbor
83 // set makes it not valid.
84 void set_degree( uint degree ) {
85 _eff_degree = degree;
86 debug_only(_degree_valid = 1;)
87 assert(!_mask.is_AllStack() || (_mask.is_AllStack() && lo_degree()), "_eff_degree can't be bigger than AllStack_size - _num_regs if the mask supports stack registers");
88 }
89 // Made a change that hammered degree
90 void invalid_degree() { debug_only(_degree_valid=0;) }
91 // Incrementally modify degree. If it was correct, it should remain correct
92 void inc_degree( uint mod ) {
93 _eff_degree += mod;
94 assert(!_mask.is_AllStack() || (_mask.is_AllStack() && lo_degree()), "_eff_degree can't be bigger than AllStack_size - _num_regs if the mask supports stack registers");
95 }
96 // Compute the degree between 2 live ranges
97 int compute_degree( LRG &l ) const;
98 bool mask_is_nonempty_and_up() const {
99 return mask().is_UP() && mask_size();
100 }
101 bool is_float_or_vector() const {
102 return _is_float || _is_vector;
103 }
104
105 private:
106 RegMask _mask; // Allowed registers for this LRG
107 uint _mask_size; // cache of _mask.Size();
108 public:
109 int compute_mask_size() const { return _mask.is_AllStack() ? AllStack_size : _mask.Size(); }
110 void set_mask_size( int size ) {
111 assert((size == (int)AllStack_size) || (size == (int)_mask.Size()), "");
112 _mask_size = size;
113 #ifdef ASSERT
114 _msize_valid=1;
115 if (_is_vector) {
116 assert(!_fat_proj, "sanity");
117 assert(_mask.is_aligned_sets(_num_regs), "mask is not aligned, adjacent sets");
118 } else if (_num_regs == 2 && !_fat_proj) {
119 assert(_mask.is_aligned_pairs(), "mask is not aligned, adjacent pairs");
120 }
121 #endif
122 }
123 void compute_set_mask_size() { set_mask_size(compute_mask_size()); }
124 int mask_size() const { assert( _msize_valid, "mask size not valid" );
125 return _mask_size; }
126 // Get the last mask size computed, even if it does not match the
127 // count of bits in the current mask.
128 int get_invalid_mask_size() const { return _mask_size; }
129 const RegMask &mask() const { return _mask; }
130 void set_mask( const RegMask &rm ) { _mask = rm; debug_only(_msize_valid=0;)}
131 void AND( const RegMask &rm ) { _mask.AND(rm); debug_only(_msize_valid=0;)}
132 void SUBTRACT( const RegMask &rm ) { _mask.SUBTRACT(rm); debug_only(_msize_valid=0;)}
133 void Clear() { _mask.Clear() ; debug_only(_msize_valid=1); _mask_size = 0; }
134 void Set_All() { _mask.Set_All(); debug_only(_msize_valid=1); _mask_size = RegMask::CHUNK_SIZE; }
135
136 void Insert( OptoReg::Name reg ) { _mask.Insert(reg); debug_only(_msize_valid=0;) }
137 void Remove( OptoReg::Name reg ) { _mask.Remove(reg); debug_only(_msize_valid=0;) }
138 void clear_to_sets() { _mask.clear_to_sets(_num_regs); debug_only(_msize_valid=0;) }
139
140 // Number of registers this live range uses when it colors
141 private:
142 uint16_t _num_regs; // 2 for Longs and Doubles, 1 for all else
143 // except _num_regs is kill count for fat_proj
144 public:
145 int num_regs() const { return _num_regs; }
146 void set_num_regs( int reg ) { assert( _num_regs == reg || !_num_regs, "" ); _num_regs = reg; }
147
148 private:
149 // Number of physical registers this live range uses when it colors
150 // Architecture and register-set dependent
151 uint16_t _reg_pressure;
152 public:
153 void set_reg_pressure(int i) { _reg_pressure = i; }
154 int reg_pressure() const { return _reg_pressure; }
155
156 // How much 'wiggle room' does this live range have?
157 // How many color choices can it make (scaled by _num_regs)?
158 int degrees_of_freedom() const { return mask_size() - _num_regs; }
159 // Bound LRGs have ZERO degrees of freedom. We also count
160 // must_spill as bound.
161 bool is_bound () const { return _is_bound; }
162 // Negative degrees-of-freedom; even with no neighbors this
163 // live range must spill.
164 bool not_free() const { return degrees_of_freedom() < 0; }
165 // Is this live range of "low-degree"? Trivially colorable?
166 bool lo_degree () const { return degree() <= degrees_of_freedom(); }
167 // Is this live range just barely "low-degree"? Trivially colorable?
168 bool just_lo_degree () const { return degree() == degrees_of_freedom(); }
169
170 uint _is_oop:1, // Live-range holds an oop
171 _is_float:1, // True if in float registers
172 _is_vector:1, // True if in vector registers
173 _was_spilled1:1, // True if prior spilling on def
174 _was_spilled2:1, // True if twice prior spilling on def
175 _is_bound:1, // live range starts life with no
176 // degrees of freedom.
177 _direct_conflict:1, // True if def and use registers in conflict
178 _must_spill:1, // live range has lost all degrees of freedom
179 // If _fat_proj is set, live range does NOT require aligned, adjacent
180 // registers and has NO interferences.
181 // If _fat_proj is clear, live range requires num_regs() to be a power of
182 // 2, and it requires registers to form an aligned, adjacent set.
183 _fat_proj:1, //
184 _was_lo:1, // Was lo-degree prior to coalesce
185 _msize_valid:1, // _mask_size cache valid
186 _degree_valid:1, // _degree cache valid
187 _has_copy:1, // Adjacent to some copy instruction
188 _at_risk:1; // Simplify says this guy is at risk to spill
189
190
191 // Alive if non-zero, dead if zero
192 bool alive() const { return _def != NULL; }
193 bool is_multidef() const { return _def == NodeSentinel; }
194 bool is_singledef() const { return _def != NodeSentinel; }
195
196 #ifndef PRODUCT
197 void dump( ) const;
198 #endif
199 };
200
201 //------------------------------IFG--------------------------------------------
202 // InterFerence Graph
203 // An undirected graph implementation. Created with a fixed number of
204 // vertices. Edges can be added & tested. Vertices can be removed, then
205 // added back later with all edges intact. Can add edges between one vertex
206 // and a list of other vertices. Can union vertices (and their edges)
207 // together. The IFG needs to be really really fast, and also fairly
208 // abstract! It needs abstraction so I can fiddle with the implementation to
209 // get even more speed.
210 class PhaseIFG : public Phase {
211 friend class VMStructs;
212 // Current implementation: a triangular adjacency list.
213
214 // Array of adjacency-lists, indexed by live-range number
215 IndexSet *_adjs;
216
217 // Assertion bit for proper use of Squaring
218 bool _is_square;
219
220 // Live range structure goes here
221 LRG *_lrgs; // Array of LRG structures
222
223 public:
224 // Largest live-range number
225 uint _maxlrg;
226
227 Arena *_arena;
228
229 // Keep track of inserted and deleted Nodes
230 VectorSet *_yanked;
231
232 PhaseIFG( Arena *arena );
233 void init( uint maxlrg );
234
235 // Add edge between a and b. Returns true if actually addded.
236 int add_edge( uint a, uint b );
237
238 // Test for edge existance
239 int test_edge( uint a, uint b ) const;
240
241 // Square-up matrix for faster Union
242 void SquareUp();
243
244 // Return number of LRG neighbors
245 uint neighbor_cnt( uint a ) const { return _adjs[a].count(); }
246 // Union edges of b into a on Squared-up matrix
247 void Union( uint a, uint b );
248 // Test for edge in Squared-up matrix
249 int test_edge_sq( uint a, uint b ) const;
250 // Yank a Node and all connected edges from the IFG. Be prepared to
251 // re-insert the yanked Node in reverse order of yanking. Return a
252 // list of neighbors (edges) yanked.
253 IndexSet *remove_node( uint a );
254 // Reinsert a yanked Node
255 void re_insert( uint a );
256 // Return set of neighbors
257 IndexSet *neighbors( uint a ) const { return &_adjs[a]; }
258
259 #ifndef PRODUCT
260 // Dump the IFG
261 void dump() const;
262 void stats() const;
263 void verify( const PhaseChaitin * ) const;
264 #endif
265
266 //--------------- Live Range Accessors
267 LRG &lrgs(uint idx) const { assert(idx < _maxlrg, "oob"); return _lrgs[idx]; }
268
269 // Compute and set effective degree. Might be folded into SquareUp().
270 void Compute_Effective_Degree();
271
272 // Compute effective degree as the sum of neighbors' _sizes.
273 int effective_degree( uint lidx ) const;
274 };
275
276 // The LiveRangeMap class is responsible for storing node to live range id mapping.
277 // Each node is mapped to a live range id (a virtual register). Nodes that are
278 // not considered for register allocation are given live range id 0.
279 class LiveRangeMap {
280
281 private:
282
283 uint _max_lrg_id;
284
285 // Union-find map. Declared as a short for speed.
286 // Indexed by live-range number, it returns the compacted live-range number
287 LRG_List _uf_map;
288
289 // Map from Nodes to live ranges
290 LRG_List _names;
291
292 // Straight out of Tarjan's union-find algorithm
293 uint find_compress(const Node *node) {
294 uint lrg_id = find_compress(_names.at(node->_idx));
295 _names.at_put(node->_idx, lrg_id);
296 return lrg_id;
297 }
298
299 uint find_compress(uint lrg);
300
301 public:
302
303 const LRG_List& names() {
304 return _names;
305 }
306
307 uint max_lrg_id() const {
308 return _max_lrg_id;
309 }
310
311 void set_max_lrg_id(uint max_lrg_id) {
312 _max_lrg_id = max_lrg_id;
313 }
314
315 uint size() const {
316 return _names.length();
317 }
318
319 uint live_range_id(uint idx) const {
320 return _names.at(idx);
321 }
322
323 uint live_range_id(const Node *node) const {
324 return _names.at(node->_idx);
325 }
326
327 uint uf_live_range_id(uint lrg_id) const {
328 return _uf_map.at(lrg_id);
329 }
330
331 void map(uint idx, uint lrg_id) {
332 _names.at_put(idx, lrg_id);
333 }
334
335 void uf_map(uint dst_lrg_id, uint src_lrg_id) {
336 _uf_map.at_put(dst_lrg_id, src_lrg_id);
337 }
338
339 void extend(uint idx, uint lrg_id) {
340 _names.at_put_grow(idx, lrg_id);
341 }
342
343 void uf_extend(uint dst_lrg_id, uint src_lrg_id) {
344 _uf_map.at_put_grow(dst_lrg_id, src_lrg_id);
345 }
346
347 LiveRangeMap(Arena* arena, uint unique)
348 : _max_lrg_id(0)
349 , _uf_map(arena, unique, unique, 0)
350 , _names(arena, unique, unique, 0) {}
351
352 uint find_id( const Node *n ) {
353 uint retval = live_range_id(n);
354 assert(retval == find(n),"Invalid node to lidx mapping");
355 return retval;
356 }
357
358 // Reset the Union-Find map to identity
359 void reset_uf_map(uint max_lrg_id);
360
361 // Make all Nodes map directly to their final live range; no need for
362 // the Union-Find mapping after this call.
363 void compress_uf_map_for_nodes();
364
365 uint find(uint lidx) {
366 uint uf_lidx = _uf_map.at(lidx);
367 return (uf_lidx == lidx) ? uf_lidx : find_compress(lidx);
368 }
369
370 // Convert a Node into a Live Range Index - a lidx
371 uint find(const Node *node) {
372 uint lidx = live_range_id(node);
373 uint uf_lidx = _uf_map.at(lidx);
374 return (uf_lidx == lidx) ? uf_lidx : find_compress(node);
375 }
376
377 // Like Find above, but no path compress, so bad asymptotic behavior
378 uint find_const(uint lrg) const;
379
380 // Like Find above, but no path compress, so bad asymptotic behavior
381 uint find_const(const Node *node) const {
382 if(node->_idx >= (uint)_names.length()) {
383 return 0; // not mapped, usual for debug dump
384 }
385 return find_const(_names.at(node->_idx));
386 }
387 };
388
389 //------------------------------Chaitin----------------------------------------
390 // Briggs-Chaitin style allocation, mostly.
391 class PhaseChaitin : public PhaseRegAlloc {
392 friend class VMStructs;
393
394 int _trip_cnt;
395 int _alternate;
396
397 PhaseLive *_live; // Liveness, used in the interference graph
398 PhaseIFG *_ifg; // Interference graph (for original chunk)
399 VectorSet _spilled_once; // Nodes that have been spilled
400 VectorSet _spilled_twice; // Nodes that have been spilled twice
401
402 // Combine the Live Range Indices for these 2 Nodes into a single live
403 // range. Future requests for any Node in either live range will
404 // return the live range index for the combined live range.
405 void Union( const Node *src, const Node *dst );
406
407 void new_lrg( const Node *x, uint lrg );
408
409 // Compact live ranges, removing unused ones. Return new maxlrg.
410 void compact();
411
412 uint _lo_degree; // Head of lo-degree LRGs list
413 uint _lo_stk_degree; // Head of lo-stk-degree LRGs list
414 uint _hi_degree; // Head of hi-degree LRGs list
415 uint _simplified; // Linked list head of simplified LRGs
416
417 // Helper functions for Split()
418 uint split_DEF(Node *def, Block *b, int loc, uint max, Node **Reachblock, Node **debug_defs, GrowableArray<uint> splits, int slidx );
419 uint split_USE(MachSpillCopyNode::SpillType spill_type, Node *def, Block *b, Node *use, uint useidx, uint max, bool def_down, bool cisc_sp, GrowableArray<uint> splits, int slidx );
420
421 //------------------------------clone_projs------------------------------------
422 // After cloning some rematerialized instruction, clone any MachProj's that
423 // follow it. Example: Intel zero is XOR, kills flags. Sparc FP constants
424 // use G3 as an address temp.
425 int clone_projs(Block* b, uint idx, Node* orig, Node* copy, uint& max_lrg_id);
426
427 int clone_projs(Block* b, uint idx, Node* orig, Node* copy, LiveRangeMap& lrg_map) {
428 uint max_lrg_id = lrg_map.max_lrg_id();
429 int found_projs = clone_projs(b, idx, orig, copy, max_lrg_id);
430 if (found_projs > 0) {
431 // max_lrg_id is updated during call above
432 lrg_map.set_max_lrg_id(max_lrg_id);
433 }
434 return found_projs;
435 }
436
437 Node *split_Rematerialize(Node *def, Block *b, uint insidx, uint &maxlrg, GrowableArray<uint> splits,
438 int slidx, uint *lrg2reach, Node **Reachblock, bool walkThru);
439 // True if lidx is used before any real register is def'd in the block
440 bool prompt_use( Block *b, uint lidx );
441 Node *get_spillcopy_wide(MachSpillCopyNode::SpillType spill_type, Node *def, Node *use, uint uidx );
442 // Insert the spill at chosen location. Skip over any intervening Proj's or
443 // Phis. Skip over a CatchNode and projs, inserting in the fall-through block
444 // instead. Update high-pressure indices. Create a new live range.
445 void insert_proj( Block *b, uint i, Node *spill, uint maxlrg );
446
447 bool is_high_pressure( Block *b, LRG *lrg, uint insidx );
448
449 uint _oldphi; // Node index which separates pre-allocation nodes
450
451 Block **_blks; // Array of blocks sorted by frequency for coalescing
452
453 float _high_frequency_lrg; // Frequency at which LRG will be spilled for debug info
454
455 #ifndef PRODUCT
456 bool _trace_spilling;
457 #endif
458
459 public:
460 PhaseChaitin(uint unique, PhaseCFG &cfg, Matcher &matcher, bool track_liveout_pressure);
461 ~PhaseChaitin() {}
462
463 LiveRangeMap _lrg_map;
464
465 LRG &lrgs(uint idx) const { return _ifg->lrgs(idx); }
466
467 // Do all the real work of allocate
468 void Register_Allocate();
469
470 float high_frequency_lrg() const { return _high_frequency_lrg; }
471
472 // Used when scheduling info generated, not in general register allocation
473 bool _scheduling_info_generated;
474
475 void set_ifg(PhaseIFG &ifg) { _ifg = &ifg; }
476 void set_live(PhaseLive &live) { _live = &live; }
477 PhaseLive* get_live() { return _live; }
478
479 // Populate the live range maps with ssa info for scheduling
480 void mark_ssa();
481
482 #ifndef PRODUCT
483 bool trace_spilling() const { return _trace_spilling; }
484 #endif
485
486 private:
487 // De-SSA the world. Assign registers to Nodes. Use the same register for
488 // all inputs to a PhiNode, effectively coalescing live ranges. Insert
489 // copies as needed.
490 void de_ssa();
491
492 // Add edge between reg and everything in the vector.
493 // Use the RegMask information to trim the set of interferences. Return the
494 // count of edges added.
495 void interfere_with_live(uint lid, IndexSet* liveout);
496 #ifdef ASSERT
497 // Count register pressure for asserts
498 uint count_int_pressure(IndexSet* liveout);
499 uint count_float_pressure(IndexSet* liveout);
500 #endif
501
502 // Build the interference graph using virtual registers only.
503 // Used for aggressive coalescing.
504 void build_ifg_virtual( );
505
506 // used when computing the register pressure for each block in the CFG. This
507 // is done during IFG creation.
508 class Pressure {
509 // keeps track of the register pressure at the current
510 // instruction (used when stepping backwards in the block)
511 uint _current_pressure;
512
513 // keeps track of the instruction index of the first low to high register pressure
514 // transition (starting from the top) in the block
515 // if high_pressure_index == 0 then the whole block is high pressure
516 // if high_pressure_index = b.end_idx() + 1 then the whole block is low pressure
517 uint _high_pressure_index;
518
519 // stores the highest pressure we find
520 uint _final_pressure;
521
522 // number of live ranges that constitute high register pressure
523 uint _high_pressure_limit;
524
525 // initial pressure observed
526 uint _start_pressure;
527
528 public:
529
530 // lower the register pressure and look for a low to high pressure
531 // transition
532 void lower(LRG& lrg, uint& location) {
533 _current_pressure -= lrg.reg_pressure();
534 if (_current_pressure == _high_pressure_limit) {
535 _high_pressure_index = location;
536 }
537 }
538
539 // raise the pressure and store the pressure if it's the biggest
540 // pressure so far
541 void raise(LRG &lrg) {
542 _current_pressure += lrg.reg_pressure();
543 if (_current_pressure > _final_pressure) {
544 _final_pressure = _current_pressure;
545 }
546 }
547
548 void init(int limit) {
549 _current_pressure = 0;
550 _high_pressure_index = 0;
551 _final_pressure = 0;
552 _high_pressure_limit = limit;
553 _start_pressure = 0;
554 }
555
556 uint high_pressure_index() const {
557 return _high_pressure_index;
558 }
559
560 uint final_pressure() const {
561 return _final_pressure;
562 }
563
564 uint start_pressure() const {
565 return _start_pressure;
566 }
567
568 uint current_pressure() const {
569 return _current_pressure;
570 }
571
572 uint high_pressure_limit() const {
573 return _high_pressure_limit;
574 }
575
576 void lower_high_pressure_index() {
577 _high_pressure_index--;
578 }
579
580 void set_high_pressure_index_to_block_start() {
581 _high_pressure_index = 0;
582 }
583
584 void set_start_pressure(int value) {
585 _start_pressure = value;
586 _final_pressure = value;
587 }
588
589 void set_current_pressure(int value) {
590 _current_pressure = value;
591 }
592
593 void check_pressure_at_fatproj(uint fatproj_location, RegMask& fatproj_mask) {
594 // this pressure is only valid at this instruction, i.e. we don't need to lower
595 // the register pressure since the fat proj was never live before (going backwards)
596 uint new_pressure = current_pressure() + fatproj_mask.Size();
597 if (new_pressure > final_pressure()) {
598 _final_pressure = new_pressure;
599 }
600
601 // if we were at a low pressure and now and the fat proj is at high pressure, record the fat proj location
602 // as coming from a low to high (to low again)
603 if (current_pressure() <= high_pressure_limit() && new_pressure > high_pressure_limit()) {
604 _high_pressure_index = fatproj_location;
605 }
606 }
607
608 Pressure(uint high_pressure_index, uint high_pressure_limit)
609 : _current_pressure(0)
610 , _high_pressure_index(high_pressure_index)
611 , _final_pressure(0)
612 , _high_pressure_limit(high_pressure_limit)
613 , _start_pressure(0) {}
614 };
615
616 void check_for_high_pressure_transition_at_fatproj(uint& block_reg_pressure, uint location, LRG& lrg, Pressure& pressure, const int op_regtype);
617 void add_input_to_liveout(Block* b, Node* n, IndexSet* liveout, double cost, Pressure& int_pressure, Pressure& float_pressure);
618 void compute_initial_block_pressure(Block* b, IndexSet* liveout, Pressure& int_pressure, Pressure& float_pressure, double cost);
619 bool remove_node_if_not_used(Block* b, uint location, Node* n, uint lid, IndexSet* liveout);
620 void assign_high_score_to_immediate_copies(Block* b, Node* n, LRG& lrg, uint next_inst, uint last_inst);
621 void remove_interference_from_copy(Block* b, uint location, uint lid_copy, IndexSet* liveout, double cost, Pressure& int_pressure, Pressure& float_pressure);
622 void remove_bound_register_from_interfering_live_ranges(LRG& lrg, IndexSet* liveout, uint& must_spill);
623 void check_for_high_pressure_block(Pressure& pressure);
624 void adjust_high_pressure_index(Block* b, uint& hrp_index, Pressure& pressure);
625
626 // Build the interference graph using physical registers when available.
627 // That is, if 2 live ranges are simultaneously alive but in their
628 // acceptable register sets do not overlap, then they do not interfere.
629 uint build_ifg_physical( ResourceArea *a );
630
631 public:
632 // Gather LiveRanGe information, including register masks and base pointer/
633 // derived pointer relationships.
634 void gather_lrg_masks( bool mod_cisc_masks );
635
636 // user visible pressure variables for scheduling
637 Pressure _sched_int_pressure;
638 Pressure _sched_float_pressure;
639 Pressure _scratch_int_pressure;
640 Pressure _scratch_float_pressure;
641
642 // Pressure functions for user context
643 void lower_pressure(Block* b, uint location, LRG& lrg, IndexSet* liveout, Pressure& int_pressure, Pressure& float_pressure);
644 void raise_pressure(Block* b, LRG& lrg, Pressure& int_pressure, Pressure& float_pressure);
645 void compute_entry_block_pressure(Block* b);
646 void compute_exit_block_pressure(Block* b);
647 void print_pressure_info(Pressure& pressure, const char *str);
648
649 private:
650 // Force the bases of derived pointers to be alive at GC points.
651 bool stretch_base_pointer_live_ranges( ResourceArea *a );
652 // Helper to stretch above; recursively discover the base Node for
653 // a given derived Node. Easy for AddP-related machine nodes, but
654 // needs to be recursive for derived Phis.
655 Node *find_base_for_derived( Node **derived_base_map, Node *derived, uint &maxlrg );
656
657 // Set the was-lo-degree bit. Conservative coalescing should not change the
658 // colorability of the graph. If any live range was of low-degree before
659 // coalescing, it should Simplify. This call sets the was-lo-degree bit.
660 void set_was_low();
661
662 // Init LRG caching of degree, numregs. Init lo_degree list.
663 void cache_lrg_info( );
664
665 // Simplify the IFG by removing LRGs of low degree
666 void Simplify();
667
668 // Select colors by re-inserting edges into the IFG.
669 // Return TRUE if any spills occurred.
670 uint Select( );
671 // Helper function for select which allows biased coloring
672 OptoReg::Name choose_color( LRG &lrg, int chunk );
673 // Helper function which implements biasing heuristic
674 OptoReg::Name bias_color( LRG &lrg, int chunk );
675
676 // Split uncolorable live ranges
677 // Return new number of live ranges
678 uint Split(uint maxlrg, ResourceArea* split_arena);
679
680 // Set the 'spilled_once' or 'spilled_twice' flag on a node.
681 void set_was_spilled( Node *n );
682
683 // Convert ideal spill-nodes into machine loads & stores
684 // Set C->failing when fixup spills could not complete, node limit exceeded.
685 void fixup_spills();
686
687 // Post-Allocation peephole copy removal
688 void post_allocate_copy_removal();
689 Node *skip_copies( Node *c );
690 // Replace the old node with the current live version of that value
691 // and yank the old value if it's dead.
692 int replace_and_yank_if_dead( Node *old, OptoReg::Name nreg,
693 Block *current_block, Node_List& value, Node_List& regnd ) {
694 Node* v = regnd[nreg];
695 assert(v->outcnt() != 0, "no dead values");
696 old->replace_by(v);
697 return yank_if_dead(old, current_block, &value, ®nd);
698 }
699
700 int yank_if_dead( Node *old, Block *current_block, Node_List *value, Node_List *regnd ) {
701 return yank_if_dead_recurse(old, old, current_block, value, regnd);
702 }
703 int yank_if_dead_recurse(Node *old, Node *orig_old, Block *current_block,
704 Node_List *value, Node_List *regnd);
705 int yank( Node *old, Block *current_block, Node_List *value, Node_List *regnd );
706 int elide_copy( Node *n, int k, Block *current_block, Node_List &value, Node_List ®nd, bool can_change_regs );
707 int use_prior_register( Node *copy, uint idx, Node *def, Block *current_block, Node_List &value, Node_List ®nd );
708 bool may_be_copy_of_callee( Node *def ) const;
709
710 // If nreg already contains the same constant as val then eliminate it
711 bool eliminate_copy_of_constant(Node* val, Node* n,
712 Block *current_block, Node_List& value, Node_List ®nd,
713 OptoReg::Name nreg, OptoReg::Name nreg2);
714 // Extend the node to LRG mapping
715 void add_reference( const Node *node, const Node *old_node);
716
717 // Record the first use of a def in the block for a register.
718 class RegDefUse {
719 Node* _def;
720 Node* _first_use;
721 public:
722 RegDefUse() : _def(NULL), _first_use(NULL) { }
723 Node* def() const { return _def; }
724 Node* first_use() const { return _first_use; }
725
726 void update(Node* def, Node* use) {
727 if (_def != def) {
728 _def = def;
729 _first_use = use;
730 }
731 }
732 void clear() {
733 _def = NULL;
734 _first_use = NULL;
735 }
736 };
737 typedef GrowableArray<RegDefUse> RegToDefUseMap;
738 int possibly_merge_multidef(Node *n, uint k, Block *block, RegToDefUseMap& reg2defuse);
739
740 // Merge nodes that are a part of a multidef lrg and produce the same value within a block.
741 void merge_multidefs();
742
743 private:
744
745 static int _final_loads, _final_stores, _final_copies, _final_memoves;
746 static double _final_load_cost, _final_store_cost, _final_copy_cost, _final_memove_cost;
747 static int _conserv_coalesce, _conserv_coalesce_pair;
748 static int _conserv_coalesce_trie, _conserv_coalesce_quad;
749 static int _post_alloc;
750 static int _lost_opp_pp_coalesce, _lost_opp_cflow_coalesce;
751 static int _used_cisc_instructions, _unused_cisc_instructions;
752 static int _allocator_attempts, _allocator_successes;
753
754 #ifdef ASSERT
755 // Verify that base pointers and derived pointers are still sane
756 void verify_base_ptrs(ResourceArea* a) const;
757 void verify(ResourceArea* a, bool verify_ifg = false) const;
758 #endif // ASSERT
759
760 #ifndef PRODUCT
761 static uint _high_pressure, _low_pressure;
762
763 void dump() const;
764 void dump(const Node* n) const;
765 void dump(const Block* b) const;
766 void dump_degree_lists() const;
767 void dump_simplified() const;
768 void dump_lrg(uint lidx, bool defs_only) const;
769 void dump_lrg(uint lidx) const {
770 // dump defs and uses by default
771 dump_lrg(lidx, false);
772 }
773 void dump_bb(uint pre_order) const;
774 void dump_for_spill_split_recycle() const;
775
776 public:
777 void dump_frame() const;
778 char *dump_register(const Node* n, char* buf) const;
779 private:
780 static void print_chaitin_statistics();
781 #endif // not PRODUCT
782 friend class PhaseCoalesce;
783 friend class PhaseAggressiveCoalesce;
784 friend class PhaseConservativeCoalesce;
785 };
786
787 #endif // SHARE_OPTO_CHAITIN_HPP