< prev index next >

src/hotspot/share/opto/chaitin.hpp

Print this page
rev 60615 : 8231441: Initial SVE backend support
Reviewed-by: adinn, pli
Contributed-by: joshua.zhu@arm.com, yang.zhang@arm.com, ningsheng.jian@arm.com
   1 /*
   2  * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *


  97   int compute_degree( LRG &l ) const;
  98   bool mask_is_nonempty_and_up() const {
  99     return mask().is_UP() && mask_size();
 100   }
 101   bool is_float_or_vector() const {
 102     return _is_float || _is_vector;
 103   }
 104 
 105 private:
 106   RegMask _mask;                // Allowed registers for this LRG
 107   uint _mask_size;              // cache of _mask.Size();
 108 public:
 109   int compute_mask_size() const { return _mask.is_AllStack() ? AllStack_size : _mask.Size(); }
 110   void set_mask_size( int size ) {
 111     assert((size == (int)AllStack_size) || (size == (int)_mask.Size()), "");
 112     _mask_size = size;
 113 #ifdef ASSERT
 114     _msize_valid=1;
 115     if (_is_vector) {
 116       assert(!_fat_proj, "sanity");

 117       assert(_mask.is_aligned_sets(_num_regs), "mask is not aligned, adjacent sets");

 118     } else if (_num_regs == 2 && !_fat_proj) {
 119       assert(_mask.is_aligned_pairs(), "mask is not aligned, adjacent pairs");
 120     }
 121 #endif
 122   }
 123   void compute_set_mask_size() { set_mask_size(compute_mask_size()); }
 124   int mask_size() const { assert( _msize_valid, "mask size not valid" );
 125                           return _mask_size; }
 126   // Get the last mask size computed, even if it does not match the
 127   // count of bits in the current mask.
 128   int get_invalid_mask_size() const { return _mask_size; }
 129   const RegMask &mask() const { return _mask; }
 130   void set_mask( const RegMask &rm ) { _mask = rm; debug_only(_msize_valid=0;)}
 131   void AND( const RegMask &rm ) { _mask.AND(rm); debug_only(_msize_valid=0;)}
 132   void SUBTRACT( const RegMask &rm ) { _mask.SUBTRACT(rm); debug_only(_msize_valid=0;)}
 133   void Clear()   { _mask.Clear()  ; debug_only(_msize_valid=1); _mask_size = 0; }
 134   void Set_All() { _mask.Set_All(); debug_only(_msize_valid=1); _mask_size = RegMask::CHUNK_SIZE; }
 135 
 136   void Insert( OptoReg::Name reg ) { _mask.Insert(reg);  debug_only(_msize_valid=0;) }
 137   void Remove( OptoReg::Name reg ) { _mask.Remove(reg);  debug_only(_msize_valid=0;) }
 138   void clear_to_sets()  { _mask.clear_to_sets(_num_regs); debug_only(_msize_valid=0;) }
 139 
 140   // Number of registers this live range uses when it colors
 141 private:

 142   uint16_t _num_regs;           // 2 for Longs and Doubles, 1 for all else
 143                                 // except _num_regs is kill count for fat_proj






 144 public:
 145   int num_regs() const { return _num_regs; }
 146   void set_num_regs( int reg ) { assert( _num_regs == reg || !_num_regs, "" ); _num_regs = reg; }
 147 

















 148 private:
 149   // Number of physical registers this live range uses when it colors
 150   // Architecture and register-set dependent
 151   uint16_t _reg_pressure;
 152 public:
 153   void set_reg_pressure(int i)  { _reg_pressure = i; }
 154   int      reg_pressure() const { return _reg_pressure; }
 155 
 156   // How much 'wiggle room' does this live range have?
 157   // How many color choices can it make (scaled by _num_regs)?
 158   int degrees_of_freedom() const { return mask_size() - _num_regs; }
 159   // Bound LRGs have ZERO degrees of freedom.  We also count
 160   // must_spill as bound.
 161   bool is_bound  () const { return _is_bound; }
 162   // Negative degrees-of-freedom; even with no neighbors this
 163   // live range must spill.
 164   bool not_free() const { return degrees_of_freedom() <  0; }
 165   // Is this live range of "low-degree"?  Trivially colorable?
 166   bool lo_degree () const { return degree() <= degrees_of_freedom(); }
 167   // Is this live range just barely "low-degree"?  Trivially colorable?
 168   bool just_lo_degree () const { return degree() == degrees_of_freedom(); }
 169 
 170   uint   _is_oop:1,             // Live-range holds an oop
 171          _is_float:1,           // True if in float registers
 172          _is_vector:1,          // True if in vector registers


 173          _was_spilled1:1,       // True if prior spilling on def
 174          _was_spilled2:1,       // True if twice prior spilling on def
 175          _is_bound:1,           // live range starts life with no
 176                                 // degrees of freedom.
 177          _direct_conflict:1,    // True if def and use registers in conflict
 178          _must_spill:1,         // live range has lost all degrees of freedom
 179     // If _fat_proj is set, live range does NOT require aligned, adjacent
 180     // registers and has NO interferences.
 181     // If _fat_proj is clear, live range requires num_regs() to be a power of
 182     // 2, and it requires registers to form an aligned, adjacent set.
 183          _fat_proj:1,           //
 184          _was_lo:1,             // Was lo-degree prior to coalesce
 185          _msize_valid:1,        // _mask_size cache valid
 186          _degree_valid:1,       // _degree cache valid
 187          _has_copy:1,           // Adjacent to some copy instruction
 188          _at_risk:1;            // Simplify says this guy is at risk to spill
 189 
 190 
 191   // Alive if non-zero, dead if zero
 192   bool alive() const { return _def != NULL; }


   1 /*
   2  * Copyright (c) 1997, 2020, Oracle and/or its affiliates. All rights reserved.
   3  * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   4  *
   5  * This code is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License version 2 only, as
   7  * published by the Free Software Foundation.
   8  *
   9  * This code is distributed in the hope that it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  12  * version 2 for more details (a copy is included in the LICENSE file that
  13  * accompanied this code).
  14  *
  15  * You should have received a copy of the GNU General Public License version
  16  * 2 along with this work; if not, write to the Free Software Foundation,
  17  * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
  18  *
  19  * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
  20  * or visit www.oracle.com if you need additional information or have any
  21  * questions.
  22  *


  97   int compute_degree( LRG &l ) const;
  98   bool mask_is_nonempty_and_up() const {
  99     return mask().is_UP() && mask_size();
 100   }
 101   bool is_float_or_vector() const {
 102     return _is_float || _is_vector;
 103   }
 104 
 105 private:
 106   RegMask _mask;                // Allowed registers for this LRG
 107   uint _mask_size;              // cache of _mask.Size();
 108 public:
 109   int compute_mask_size() const { return _mask.is_AllStack() ? AllStack_size : _mask.Size(); }
 110   void set_mask_size( int size ) {
 111     assert((size == (int)AllStack_size) || (size == (int)_mask.Size()), "");
 112     _mask_size = size;
 113 #ifdef ASSERT
 114     _msize_valid=1;
 115     if (_is_vector) {
 116       assert(!_fat_proj, "sanity");
 117       if (!(_is_scalable && OptoReg::is_stack(_reg))) {
 118         assert(_mask.is_aligned_sets(_num_regs), "mask is not aligned, adjacent sets");
 119       }
 120     } else if (_num_regs == 2 && !_fat_proj) {
 121       assert(_mask.is_aligned_pairs(), "mask is not aligned, adjacent pairs");
 122     }
 123 #endif
 124   }
 125   void compute_set_mask_size() { set_mask_size(compute_mask_size()); }
 126   int mask_size() const { assert( _msize_valid, "mask size not valid" );
 127                           return _mask_size; }
 128   // Get the last mask size computed, even if it does not match the
 129   // count of bits in the current mask.
 130   int get_invalid_mask_size() const { return _mask_size; }
 131   const RegMask &mask() const { return _mask; }
 132   void set_mask( const RegMask &rm ) { _mask = rm; debug_only(_msize_valid=0;)}
 133   void AND( const RegMask &rm ) { _mask.AND(rm); debug_only(_msize_valid=0;)}
 134   void SUBTRACT( const RegMask &rm ) { _mask.SUBTRACT(rm); debug_only(_msize_valid=0;)}
 135   void Clear()   { _mask.Clear()  ; debug_only(_msize_valid=1); _mask_size = 0; }
 136   void Set_All() { _mask.Set_All(); debug_only(_msize_valid=1); _mask_size = RegMask::CHUNK_SIZE; }
 137 
 138   void Insert( OptoReg::Name reg ) { _mask.Insert(reg);  debug_only(_msize_valid=0;) }
 139   void Remove( OptoReg::Name reg ) { _mask.Remove(reg);  debug_only(_msize_valid=0;) }
 140   void clear_to_sets()  { _mask.clear_to_sets(_num_regs); debug_only(_msize_valid=0;) }
 141 

 142 private:
 143   // Number of registers this live range uses when it colors
 144   uint16_t _num_regs;           // 2 for Longs and Doubles, 1 for all else
 145                                 // except _num_regs is kill count for fat_proj
 146 
 147   // For scalable register, num_regs may not be the actual physical register size.
 148   // We need to get the actual physical length of scalable register when scalable
 149   // register is spilled. The size of one slot is 32-bit.
 150   uint _scalable_reg_slots;     // Actual scalable register length of slots.
 151                                 // Meaningful only when _is_scalable is true.
 152 public:
 153   int num_regs() const { return _num_regs; }
 154   void set_num_regs( int reg ) { assert( _num_regs == reg || !_num_regs, "" ); _num_regs = reg; }
 155 
 156   uint scalable_reg_slots() { return _scalable_reg_slots; }
 157   void set_scalable_reg_slots(uint slots) {
 158     assert(_is_scalable, "scalable register");
 159     assert(slots > 0, "slots of scalable register is not valid");
 160     _scalable_reg_slots = slots;
 161   }
 162 
 163   bool is_scalable() {
 164 #ifdef ASSERT
 165     if (_is_scalable) {
 166       // Should only be a vector for now, but it could also be a RegVMask in future.
 167       assert(_is_vector && (_num_regs == RegMask::SlotsPerVecA), "unexpected scalable reg");
 168     }
 169 #endif
 170     return _is_scalable;
 171   }
 172 
 173 private:
 174   // Number of physical registers this live range uses when it colors
 175   // Architecture and register-set dependent
 176   uint16_t _reg_pressure;
 177 public:
 178   void set_reg_pressure(int i)  { _reg_pressure = i; }
 179   int      reg_pressure() const { return _reg_pressure; }
 180 
 181   // How much 'wiggle room' does this live range have?
 182   // How many color choices can it make (scaled by _num_regs)?
 183   int degrees_of_freedom() const { return mask_size() - _num_regs; }
 184   // Bound LRGs have ZERO degrees of freedom.  We also count
 185   // must_spill as bound.
 186   bool is_bound  () const { return _is_bound; }
 187   // Negative degrees-of-freedom; even with no neighbors this
 188   // live range must spill.
 189   bool not_free() const { return degrees_of_freedom() <  0; }
 190   // Is this live range of "low-degree"?  Trivially colorable?
 191   bool lo_degree () const { return degree() <= degrees_of_freedom(); }
 192   // Is this live range just barely "low-degree"?  Trivially colorable?
 193   bool just_lo_degree () const { return degree() == degrees_of_freedom(); }
 194 
 195   uint   _is_oop:1,             // Live-range holds an oop
 196          _is_float:1,           // True if in float registers
 197          _is_vector:1,          // True if in vector registers
 198          _is_scalable:1,        // True if register size is scalable
 199                                 //      e.g. Arm SVE vector/predicate registers.
 200          _was_spilled1:1,       // True if prior spilling on def
 201          _was_spilled2:1,       // True if twice prior spilling on def
 202          _is_bound:1,           // live range starts life with no
 203                                 // degrees of freedom.
 204          _direct_conflict:1,    // True if def and use registers in conflict
 205          _must_spill:1,         // live range has lost all degrees of freedom
 206     // If _fat_proj is set, live range does NOT require aligned, adjacent
 207     // registers and has NO interferences.
 208     // If _fat_proj is clear, live range requires num_regs() to be a power of
 209     // 2, and it requires registers to form an aligned, adjacent set.
 210          _fat_proj:1,           //
 211          _was_lo:1,             // Was lo-degree prior to coalesce
 212          _msize_valid:1,        // _mask_size cache valid
 213          _degree_valid:1,       // _degree cache valid
 214          _has_copy:1,           // Adjacent to some copy instruction
 215          _at_risk:1;            // Simplify says this guy is at risk to spill
 216 
 217 
 218   // Alive if non-zero, dead if zero
 219   bool alive() const { return _def != NULL; }


< prev index next >