src/hotspot/share/opto/regmask.hpp

rev 60615 : 8231441: Initial SVE backend support
Reviewed-by: adinn, pli
Contributed-by: joshua.zhu@arm.com, yang.zhang@arm.com, ningsheng.jian@arm.com

*** 1,7 ****
  /*
!  * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
   * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   *
   * This code is free software; you can redistribute it and/or modify it
   * under the terms of the GNU General Public License version 2 only, as
   * published by the Free Software Foundation.
--- 1,7 ----
  /*
!  * Copyright (c) 1997, 2020, Oracle and/or its affiliates. All rights reserved.
   * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
   *
   * This code is free software; you can redistribute it and/or modify it
   * under the terms of the GNU General Public License version 2 only, as
   * published by the Free Software Foundation.
*** 28,37 ****
--- 28,39 ----
  #include "code/vmreg.hpp"
  #include "opto/optoreg.hpp"
  #include "utilities/count_leading_zeros.hpp"
  #include "utilities/count_trailing_zeros.hpp"
  
+ class LRG;
+ 
  //-------------Non-zero bit search methods used by RegMask---------------------
  // Find lowest 1, undefined if empty/0
  static int find_lowest_bit(uint32_t mask) {
    return count_trailing_zeros(mask);
  }
*** 89,103 ****
    // If we ever go to quad-word allocations, SlotsPerQuad will become
    // the controlling alignment constraint.  Note that this alignment
    // requirement is internal to the allocator, and independent of any
    // particular platform.
    enum { SlotsPerLong = 2,
           SlotsPerVecS = 1,
           SlotsPerVecD = 2,
           SlotsPerVecX = 4,
           SlotsPerVecY = 8,
!          SlotsPerVecZ = 16 };
  
    // A constructor only used by the ADLC output.  All mask fields are filled
    // in directly.  Calls to this look something like RM(1,2,3,4);
    RegMask(
  #   define BODY(I) int a##I,
--- 91,107 ----
    // If we ever go to quad-word allocations, SlotsPerQuad will become
    // the controlling alignment constraint.  Note that this alignment
    // requirement is internal to the allocator, and independent of any
    // particular platform.
    enum { SlotsPerLong = 2,
+          SlotsPerVecA = 8,
           SlotsPerVecS = 1,
           SlotsPerVecD = 2,
           SlotsPerVecX = 4,
           SlotsPerVecY = 8,
!          SlotsPerVecZ = 16,
!          };
  
    // A constructor only used by the ADLC output.  All mask fields are filled
    // in directly.  Calls to this look something like RM(1,2,3,4);
    RegMask(
  #   define BODY(I) int a##I,
*** 217,230 ****
    // Test for a single adjacent pair
    bool is_bound_pair() const;
    // Test for a single adjacent set of ideal register's size.
    bool is_bound(uint ireg) const;
  
    // Find the lowest-numbered register set in the mask.  Return the
    // HIGHEST register number in the set, or BAD if no sets.
    // Assert that the mask contains only bit sets.
!   OptoReg::Name find_first_set(const int size) const;
  
    // Clear out partial bits; leave only aligned adjacent bit sets of size.
    void clear_to_sets(const int size);
    // Smear out partial bits to aligned adjacent bit sets.
    void smear_to_sets(const int size);
--- 221,238 ----
    // Test for a single adjacent pair
    bool is_bound_pair() const;
    // Test for a single adjacent set of ideal register's size.
    bool is_bound(uint ireg) const;
  
+   // Check that whether given reg number with size is valid
+   // for current regmask, where reg is the highest number.
+   bool is_valid_reg(OptoReg::Name reg, const int size) const;
+ 
    // Find the lowest-numbered register set in the mask.  Return the
    // HIGHEST register number in the set, or BAD if no sets.
    // Assert that the mask contains only bit sets.
!   OptoReg::Name find_first_set(LRG &lrg, const int size) const;
  
    // Clear out partial bits; leave only aligned adjacent bit sets of size.
    void clear_to_sets(const int size);
    // Smear out partial bits to aligned adjacent bit sets.
    void smear_to_sets(const int size);
*** 234,243 ****
--- 242,252 ----
    // Test for a single adjacent set
    int is_bound_set(const int size) const;
  
    static bool is_vector(uint ireg);
    static int num_registers(uint ireg);
+   static int num_registers(uint ireg, LRG &lrg);
  
    // Fast overlap test.  Non-zero if any registers in common.
    int overlap(const RegMask &rm) const {
      assert(valid_watermarks() && rm.valid_watermarks(), "sanity");
      int hwm = MIN2(_hwm, rm._hwm);