1 /*
2 * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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5 * This code is free software; you can redistribute it and/or modify it
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7 * published by the Free Software Foundation.
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11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
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24
25 #ifndef SHARE_OPTO_REGMASK_HPP
26 #define SHARE_OPTO_REGMASK_HPP
27
28 #include "code/vmreg.hpp"
29 #include "opto/optoreg.hpp"
30 #include "utilities/count_trailing_zeros.hpp"
31
32 // Some fun naming (textual) substitutions:
33 //
34 // RegMask::get_low_elem() ==> RegMask::find_first_elem()
35 // RegMask::Special ==> RegMask::Empty
36 // RegMask::_flags ==> RegMask::is_AllStack()
37 // RegMask::operator<<=() ==> RegMask::Insert()
38 // RegMask::operator>>=() ==> RegMask::Remove()
39 // RegMask::Union() ==> RegMask::OR
40 // RegMask::Inter() ==> RegMask::AND
41 //
42 // OptoRegister::RegName ==> OptoReg::Name
43 //
44 // OptoReg::stack0() ==> _last_Mach_Reg or ZERO in core version
45 //
46 // numregs in chaitin ==> proper degree in chaitin
47
48 //-------------Non-zero bit search methods used by RegMask---------------------
49 // Find lowest 1, undefined if empty/0
50 static int find_lowest_bit(uint32_t mask) {
51 return count_trailing_zeros(mask);
52 }
53 // Find highest 1, or return 32 if empty
54 int find_highest_bit( uint32_t mask );
55
56 //------------------------------RegMask----------------------------------------
57 // The ADL file describes how to print the machine-specific registers, as well
58 // as any notion of register classes. We provide a register mask, which is
59 // just a collection of Register numbers.
60
61 // The ADLC defines 2 macros, RM_SIZE and FORALL_BODY.
62 // RM_SIZE is the size of a register mask in words.
63 // FORALL_BODY replicates a BODY macro once per word in the register mask.
64 // The usage is somewhat clumsy and limited to the regmask.[h,c]pp files.
65 // However, it means the ADLC can redefine the unroll macro and all loops
66 // over register masks will be unrolled by the correct amount.
67
68 class RegMask {
69 union {
70 double _dummy_force_double_alignment[RM_SIZE>>1];
71 // Array of Register Mask bits. This array is large enough to cover
72 // all the machine registers and all parameters that need to be passed
73 // on the stack (stack registers) up to some interesting limit. Methods
74 // that need more parameters will NOT be compiled. On Intel, the limit
75 // is something like 90+ parameters.
76 int _A[RM_SIZE];
77 };
78
79 enum {
80 _WordBits = BitsPerInt,
81 _LogWordBits = LogBitsPerInt,
82 _RM_SIZE = RM_SIZE // local constant, imported, then hidden by #undef
83 };
84
85 public:
86 enum { CHUNK_SIZE = RM_SIZE*_WordBits };
87
88 // SlotsPerLong is 2, since slots are 32 bits and longs are 64 bits.
89 // Also, consider the maximum alignment size for a normally allocated
90 // value. Since we allocate register pairs but not register quads (at
91 // present), this alignment is SlotsPerLong (== 2). A normally
92 // aligned allocated register is either a single register, or a pair
93 // of adjacent registers, the lower-numbered being even.
94 // See also is_aligned_Pairs() below, and the padding added before
95 // Matcher::_new_SP to keep allocated pairs aligned properly.
96 // If we ever go to quad-word allocations, SlotsPerQuad will become
97 // the controlling alignment constraint. Note that this alignment
98 // requirement is internal to the allocator, and independent of any
99 // particular platform.
100 enum { SlotsPerLong = 2,
101 SlotsPerVecS = 1,
102 SlotsPerVecD = 2,
103 SlotsPerVecX = 4,
104 SlotsPerVecY = 8,
105 SlotsPerVecZ = 16 };
106
107 // A constructor only used by the ADLC output. All mask fields are filled
108 // in directly. Calls to this look something like RM(1,2,3,4);
109 RegMask(
110 # define BODY(I) int a##I,
111 FORALL_BODY
112 # undef BODY
113 int dummy = 0 ) {
114 # define BODY(I) _A[I] = a##I;
115 FORALL_BODY
116 # undef BODY
117 }
118
119 // Handy copying constructor
120 RegMask( RegMask *rm ) {
121 # define BODY(I) _A[I] = rm->_A[I];
122 FORALL_BODY
123 # undef BODY
124 }
125
126 // Construct an empty mask
127 RegMask( ) { Clear(); }
128
129 // Construct a mask with a single bit
130 RegMask( OptoReg::Name reg ) { Clear(); Insert(reg); }
131
132 // Check for register being in mask
133 int Member( OptoReg::Name reg ) const {
134 assert( reg < CHUNK_SIZE, "" );
135 return _A[reg>>_LogWordBits] & (1<<(reg&(_WordBits-1)));
136 }
137
138 // The last bit in the register mask indicates that the mask should repeat
139 // indefinitely with ONE bits. Returns TRUE if mask is infinite or
140 // unbounded in size. Returns FALSE if mask is finite size.
141 int is_AllStack() const { return _A[RM_SIZE-1] >> (_WordBits-1); }
142
143 // Work around an -xO3 optimization problme in WS6U1. The old way:
144 // void set_AllStack() { _A[RM_SIZE-1] |= (1<<(_WordBits-1)); }
145 // will cause _A[RM_SIZE-1] to be clobbered, not updated when set_AllStack()
146 // follows an Insert() loop, like the one found in init_spill_mask(). Using
147 // Insert() instead works because the index into _A in computed instead of
148 // constant. See bug 4665841.
149 void set_AllStack() { Insert(OptoReg::Name(CHUNK_SIZE-1)); }
150
151 // Test for being a not-empty mask.
152 int is_NotEmpty( ) const {
153 int tmp = 0;
154 # define BODY(I) tmp |= _A[I];
155 FORALL_BODY
156 # undef BODY
157 return tmp;
158 }
159
160 // Find lowest-numbered register from mask, or BAD if mask is empty.
161 OptoReg::Name find_first_elem() const {
162 int base, bits;
163 # define BODY(I) if( (bits = _A[I]) != 0 ) base = I<<_LogWordBits; else
164 FORALL_BODY
165 # undef BODY
166 { base = OptoReg::Bad; bits = 1<<0; }
167 return OptoReg::Name(base + find_lowest_bit(bits));
168 }
169 // Get highest-numbered register from mask, or BAD if mask is empty.
170 OptoReg::Name find_last_elem() const {
171 int base, bits;
172 # define BODY(I) if( (bits = _A[RM_SIZE-1-I]) != 0 ) base = (RM_SIZE-1-I)<<_LogWordBits; else
173 FORALL_BODY
174 # undef BODY
175 { base = OptoReg::Bad; bits = 1<<0; }
176 return OptoReg::Name(base + find_highest_bit(bits));
177 }
178
179 // Clear out partial bits; leave only aligned adjacent bit pairs.
180 void clear_to_pairs();
181 // Verify that the mask contains only aligned adjacent bit pairs
182 void verify_pairs() const { assert( is_aligned_pairs(), "mask is not aligned, adjacent pairs" ); }
183 // Test that the mask contains only aligned adjacent bit pairs
184 bool is_aligned_pairs() const;
185
186 // mask is a pair of misaligned registers
187 bool is_misaligned_pair() const { return Size()==2 && !is_aligned_pairs(); }
188 // Test for single register
189 int is_bound1() const;
190 // Test for a single adjacent pair
191 int is_bound_pair() const;
192 // Test for a single adjacent set of ideal register's size.
193 int is_bound(uint ireg) const {
194 if (is_vector(ireg)) {
195 if (is_bound_set(num_registers(ireg)))
196 return true;
197 } else if (is_bound1() || is_bound_pair()) {
198 return true;
199 }
200 return false;
201 }
202
203 // Find the lowest-numbered register set in the mask. Return the
204 // HIGHEST register number in the set, or BAD if no sets.
205 // Assert that the mask contains only bit sets.
206 OptoReg::Name find_first_set(const int size) const;
207
208 // Clear out partial bits; leave only aligned adjacent bit sets of size.
209 void clear_to_sets(const int size);
210 // Smear out partial bits to aligned adjacent bit sets.
211 void smear_to_sets(const int size);
212 // Verify that the mask contains only aligned adjacent bit sets
213 void verify_sets(int size) const { assert(is_aligned_sets(size), "mask is not aligned, adjacent sets"); }
214 // Test that the mask contains only aligned adjacent bit sets
215 bool is_aligned_sets(const int size) const;
216
217 // Test for a single adjacent set
218 int is_bound_set(const int size) const;
219
220 static bool is_vector(uint ireg);
221 static int num_registers(uint ireg);
222
223 // Fast overlap test. Non-zero if any registers in common.
224 int overlap( const RegMask &rm ) const {
225 return
226 # define BODY(I) (_A[I] & rm._A[I]) |
227 FORALL_BODY
228 # undef BODY
229 0 ;
230 }
231
232 // Special test for register pressure based splitting
233 // UP means register only, Register plus stack, or stack only is DOWN
234 bool is_UP() const;
235
236 // Clear a register mask
237 void Clear( ) {
238 # define BODY(I) _A[I] = 0;
239 FORALL_BODY
240 # undef BODY
241 }
242
243 // Fill a register mask with 1's
244 void Set_All( ) {
245 # define BODY(I) _A[I] = -1;
246 FORALL_BODY
247 # undef BODY
248 }
249
250 // Insert register into mask
251 void Insert( OptoReg::Name reg ) {
252 assert( reg < CHUNK_SIZE, "" );
253 _A[reg>>_LogWordBits] |= (1<<(reg&(_WordBits-1)));
254 }
255
256 // Remove register from mask
257 void Remove( OptoReg::Name reg ) {
258 assert( reg < CHUNK_SIZE, "" );
259 _A[reg>>_LogWordBits] &= ~(1<<(reg&(_WordBits-1)));
260 }
261
262 // OR 'rm' into 'this'
263 void OR( const RegMask &rm ) {
264 # define BODY(I) this->_A[I] |= rm._A[I];
265 FORALL_BODY
266 # undef BODY
267 }
268
269 // AND 'rm' into 'this'
270 void AND( const RegMask &rm ) {
271 # define BODY(I) this->_A[I] &= rm._A[I];
272 FORALL_BODY
273 # undef BODY
274 }
275
276 // Subtract 'rm' from 'this'
277 void SUBTRACT( const RegMask &rm ) {
278 # define BODY(I) _A[I] &= ~rm._A[I];
279 FORALL_BODY
280 # undef BODY
281 }
282
283 // Compute size of register mask: number of bits
284 uint Size() const;
285
286 #ifndef PRODUCT
287 void print() const { dump(); }
288 void dump(outputStream *st = tty) const; // Print a mask
289 #endif
290
291 static const RegMask Empty; // Common empty mask
292
293 static bool can_represent(OptoReg::Name reg) {
294 // NOTE: -1 in computation reflects the usage of the last
295 // bit of the regmask as an infinite stack flag and
296 // -7 is to keep mask aligned for largest value (VecZ).
297 return (int)reg < (int)(CHUNK_SIZE-1);
298 }
299 static bool can_represent_arg(OptoReg::Name reg) {
300 // NOTE: -SlotsPerVecZ in computation reflects the need
301 // to keep mask aligned for largest value (VecZ).
302 return (int)reg < (int)(CHUNK_SIZE-SlotsPerVecZ);
303 }
304 };
305
306 // Do not use this constant directly in client code!
307 #undef RM_SIZE
308
309 #endif // SHARE_OPTO_REGMASK_HPP