1 /* 2 * Copyright (c) 1997, 2019, Oracle and/or its affiliates. All rights reserved. 3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. 4 * 5 * This code is free software; you can redistribute it and/or modify it 6 * under the terms of the GNU General Public License version 2 only, as 7 * published by the Free Software Foundation. 8 * 9 * This code is distributed in the hope that it will be useful, but WITHOUT 10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License 12 * version 2 for more details (a copy is included in the LICENSE file that 13 * accompanied this code). 14 * 15 * You should have received a copy of the GNU General Public License version 16 * 2 along with this work; if not, write to the Free Software Foundation, 17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA. 18 * 19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA 20 * or visit www.oracle.com if you need additional information or have any 21 * questions. 22 * 23 */ 24 25 #ifndef SHARE_OPTO_REGMASK_HPP 26 #define SHARE_OPTO_REGMASK_HPP 27 28 #include "code/vmreg.hpp" 29 #include "opto/optoreg.hpp" 30 #include "utilities/count_leading_zeros.hpp" 31 #include "utilities/count_trailing_zeros.hpp" 32 33 // Some fun naming (textual) substitutions: 34 // 35 // RegMask::get_low_elem() ==> RegMask::find_first_elem() 36 // RegMask::Special ==> RegMask::Empty 37 // RegMask::_flags ==> RegMask::is_AllStack() 38 // RegMask::operator<<=() ==> RegMask::Insert() 39 // RegMask::operator>>=() ==> RegMask::Remove() 40 // RegMask::Union() ==> RegMask::OR 41 // RegMask::Inter() ==> RegMask::AND 42 // 43 // OptoRegister::RegName ==> OptoReg::Name 44 // 45 // OptoReg::stack0() ==> _last_Mach_Reg or ZERO in core version 46 // 47 // numregs in chaitin ==> proper degree in chaitin 48 49 //-------------Non-zero bit search methods used by RegMask--------------------- 50 // Find lowest 1, undefined if empty/0 51 static int find_lowest_bit(uint32_t mask) { 52 return count_trailing_zeros(mask); 53 } 54 // Find highest 1, undefined if empty/0 55 static int find_highest_bit(uint32_t mask) { 56 return count_leading_zeros(mask) ^ 31; 57 } 58 59 //------------------------------RegMask---------------------------------------- 60 // The ADL file describes how to print the machine-specific registers, as well 61 // as any notion of register classes. We provide a register mask, which is 62 // just a collection of Register numbers. 63 64 // The ADLC defines 2 macros, RM_SIZE and FORALL_BODY. 65 // RM_SIZE is the size of a register mask in words. 66 // FORALL_BODY replicates a BODY macro once per word in the register mask. 67 // The usage is somewhat clumsy and limited to the regmask.[h,c]pp files. 68 // However, it means the ADLC can redefine the unroll macro and all loops 69 // over register masks will be unrolled by the correct amount. 70 71 class RegMask { 72 union { 73 double _dummy_force_double_alignment[RM_SIZE>>1]; 74 // Array of Register Mask bits. This array is large enough to cover 75 // all the machine registers and all parameters that need to be passed 76 // on the stack (stack registers) up to some interesting limit. Methods 77 // that need more parameters will NOT be compiled. On Intel, the limit 78 // is something like 90+ parameters. 79 int _A[RM_SIZE]; 80 }; 81 82 enum { 83 _WordBits = BitsPerInt, 84 _LogWordBits = LogBitsPerInt, 85 _RM_SIZE = RM_SIZE // local constant, imported, then hidden by #undef 86 }; 87 88 public: 89 enum { CHUNK_SIZE = RM_SIZE*_WordBits }; 90 91 // SlotsPerLong is 2, since slots are 32 bits and longs are 64 bits. 92 // Also, consider the maximum alignment size for a normally allocated 93 // value. Since we allocate register pairs but not register quads (at 94 // present), this alignment is SlotsPerLong (== 2). A normally 95 // aligned allocated register is either a single register, or a pair 96 // of adjacent registers, the lower-numbered being even. 97 // See also is_aligned_Pairs() below, and the padding added before 98 // Matcher::_new_SP to keep allocated pairs aligned properly. 99 // If we ever go to quad-word allocations, SlotsPerQuad will become 100 // the controlling alignment constraint. Note that this alignment 101 // requirement is internal to the allocator, and independent of any 102 // particular platform. 103 enum { SlotsPerLong = 2, 104 SlotsPerVecS = 1, 105 SlotsPerVecD = 2, 106 SlotsPerVecX = 4, 107 SlotsPerVecY = 8, 108 SlotsPerVecZ = 16 }; 109 110 // A constructor only used by the ADLC output. All mask fields are filled 111 // in directly. Calls to this look something like RM(1,2,3,4); 112 RegMask( 113 # define BODY(I) int a##I, 114 FORALL_BODY 115 # undef BODY 116 int dummy = 0 ) { 117 # define BODY(I) _A[I] = a##I; 118 FORALL_BODY 119 # undef BODY 120 } 121 122 // Handy copying constructor 123 RegMask( RegMask *rm ) { 124 # define BODY(I) _A[I] = rm->_A[I]; 125 FORALL_BODY 126 # undef BODY 127 } 128 129 // Construct an empty mask 130 RegMask( ) { Clear(); } 131 132 // Construct a mask with a single bit 133 RegMask( OptoReg::Name reg ) { Clear(); Insert(reg); } 134 135 // Check for register being in mask 136 int Member( OptoReg::Name reg ) const { 137 assert( reg < CHUNK_SIZE, "" ); 138 return _A[reg>>_LogWordBits] & (1<<(reg&(_WordBits-1))); 139 } 140 141 // The last bit in the register mask indicates that the mask should repeat 142 // indefinitely with ONE bits. Returns TRUE if mask is infinite or 143 // unbounded in size. Returns FALSE if mask is finite size. 144 int is_AllStack() const { return _A[RM_SIZE-1] >> (_WordBits-1); } 145 146 // Work around an -xO3 optimization problme in WS6U1. The old way: 147 // void set_AllStack() { _A[RM_SIZE-1] |= (1<<(_WordBits-1)); } 148 // will cause _A[RM_SIZE-1] to be clobbered, not updated when set_AllStack() 149 // follows an Insert() loop, like the one found in init_spill_mask(). Using 150 // Insert() instead works because the index into _A in computed instead of 151 // constant. See bug 4665841. 152 void set_AllStack() { Insert(OptoReg::Name(CHUNK_SIZE-1)); } 153 154 // Test for being a not-empty mask. 155 int is_NotEmpty( ) const { 156 int tmp = 0; 157 # define BODY(I) tmp |= _A[I]; 158 FORALL_BODY 159 # undef BODY 160 return tmp; 161 } 162 163 // Find lowest-numbered register from mask, or BAD if mask is empty. 164 OptoReg::Name find_first_elem() const { 165 int base, bits; 166 # define BODY(I) if( (bits = _A[I]) != 0 ) base = I<<_LogWordBits; else 167 FORALL_BODY 168 # undef BODY 169 { base = OptoReg::Bad; bits = 1<<0; } 170 return OptoReg::Name(base + find_lowest_bit(bits)); 171 } 172 // Get highest-numbered register from mask, or BAD if mask is empty. 173 OptoReg::Name find_last_elem() const { 174 int base, bits; 175 # define BODY(I) if( (bits = _A[RM_SIZE-1-I]) != 0 ) base = (RM_SIZE-1-I)<<_LogWordBits; else 176 FORALL_BODY 177 # undef BODY 178 { base = OptoReg::Bad; bits = 1<<0; } 179 return OptoReg::Name(base + find_highest_bit(bits)); 180 } 181 182 // Clear out partial bits; leave only aligned adjacent bit pairs. 183 void clear_to_pairs(); 184 // Verify that the mask contains only aligned adjacent bit pairs 185 void verify_pairs() const { assert( is_aligned_pairs(), "mask is not aligned, adjacent pairs" ); } 186 // Test that the mask contains only aligned adjacent bit pairs 187 bool is_aligned_pairs() const; 188 189 // mask is a pair of misaligned registers 190 bool is_misaligned_pair() const { return Size()==2 && !is_aligned_pairs(); } 191 // Test for single register 192 int is_bound1() const; 193 // Test for a single adjacent pair 194 int is_bound_pair() const; 195 // Test for a single adjacent set of ideal register's size. 196 int is_bound(uint ireg) const { 197 if (is_vector(ireg)) { 198 if (is_bound_set(num_registers(ireg))) 199 return true; 200 } else if (is_bound1() || is_bound_pair()) { 201 return true; 202 } 203 return false; 204 } 205 206 // Find the lowest-numbered register set in the mask. Return the 207 // HIGHEST register number in the set, or BAD if no sets. 208 // Assert that the mask contains only bit sets. 209 OptoReg::Name find_first_set(const int size) const; 210 211 // Clear out partial bits; leave only aligned adjacent bit sets of size. 212 void clear_to_sets(const int size); 213 // Smear out partial bits to aligned adjacent bit sets. 214 void smear_to_sets(const int size); 215 // Verify that the mask contains only aligned adjacent bit sets 216 void verify_sets(int size) const { assert(is_aligned_sets(size), "mask is not aligned, adjacent sets"); } 217 // Test that the mask contains only aligned adjacent bit sets 218 bool is_aligned_sets(const int size) const; 219 220 // Test for a single adjacent set 221 int is_bound_set(const int size) const; 222 223 static bool is_vector(uint ireg); 224 static int num_registers(uint ireg); 225 226 // Fast overlap test. Non-zero if any registers in common. 227 int overlap( const RegMask &rm ) const { 228 return 229 # define BODY(I) (_A[I] & rm._A[I]) | 230 FORALL_BODY 231 # undef BODY 232 0 ; 233 } 234 235 // Special test for register pressure based splitting 236 // UP means register only, Register plus stack, or stack only is DOWN 237 bool is_UP() const; 238 239 // Clear a register mask 240 void Clear( ) { 241 # define BODY(I) _A[I] = 0; 242 FORALL_BODY 243 # undef BODY 244 } 245 246 // Fill a register mask with 1's 247 void Set_All( ) { 248 # define BODY(I) _A[I] = -1; 249 FORALL_BODY 250 # undef BODY 251 } 252 253 // Insert register into mask 254 void Insert( OptoReg::Name reg ) { 255 assert( reg < CHUNK_SIZE, "" ); 256 _A[reg>>_LogWordBits] |= (1<<(reg&(_WordBits-1))); 257 } 258 259 // Remove register from mask 260 void Remove( OptoReg::Name reg ) { 261 assert( reg < CHUNK_SIZE, "" ); 262 _A[reg>>_LogWordBits] &= ~(1<<(reg&(_WordBits-1))); 263 } 264 265 // OR 'rm' into 'this' 266 void OR( const RegMask &rm ) { 267 # define BODY(I) this->_A[I] |= rm._A[I]; 268 FORALL_BODY 269 # undef BODY 270 } 271 272 // AND 'rm' into 'this' 273 void AND( const RegMask &rm ) { 274 # define BODY(I) this->_A[I] &= rm._A[I]; 275 FORALL_BODY 276 # undef BODY 277 } 278 279 // Subtract 'rm' from 'this' 280 void SUBTRACT( const RegMask &rm ) { 281 # define BODY(I) _A[I] &= ~rm._A[I]; 282 FORALL_BODY 283 # undef BODY 284 } 285 286 // Compute size of register mask: number of bits 287 uint Size() const; 288 289 #ifndef PRODUCT 290 void print() const { dump(); } 291 void dump(outputStream *st = tty) const; // Print a mask 292 #endif 293 294 static const RegMask Empty; // Common empty mask 295 296 static bool can_represent(OptoReg::Name reg) { 297 // NOTE: -1 in computation reflects the usage of the last 298 // bit of the regmask as an infinite stack flag and 299 // -7 is to keep mask aligned for largest value (VecZ). 300 return (int)reg < (int)(CHUNK_SIZE-1); 301 } 302 static bool can_represent_arg(OptoReg::Name reg) { 303 // NOTE: -SlotsPerVecZ in computation reflects the need 304 // to keep mask aligned for largest value (VecZ). 305 return (int)reg < (int)(CHUNK_SIZE-SlotsPerVecZ); 306 } 307 }; 308 309 // Do not use this constant directly in client code! 310 #undef RM_SIZE 311 312 #endif // SHARE_OPTO_REGMASK_HPP