1 /*
2 * Copyright (c) 2005, 2018, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "c1/c1_Compilation.hpp"
27 #include "c1/c1_FrameMap.hpp"
28 #include "c1/c1_Instruction.hpp"
29 #include "c1/c1_LIRAssembler.hpp"
30 #include "c1/c1_LIRGenerator.hpp"
31 #include "c1/c1_Runtime1.hpp"
32 #include "c1/c1_ValueStack.hpp"
33 #include "ci/ciArray.hpp"
34 #include "ci/ciObjArrayKlass.hpp"
35 #include "ci/ciTypeArrayKlass.hpp"
36 #include "gc/shared/c1/barrierSetC1.hpp"
37 #include "runtime/sharedRuntime.hpp"
38 #include "runtime/stubRoutines.hpp"
39 #include "utilities/macros.hpp"
40 #include "vmreg_x86.inline.hpp"
41
42 #ifdef ASSERT
43 #define __ gen()->lir(__FILE__, __LINE__)->
44 #else
45 #define __ gen()->lir()->
46 #endif
47
48 // Item will be loaded into a byte register; Intel only
49 void LIRItem::load_byte_item() {
50 load_item();
51 LIR_Opr res = result();
52
53 if (!res->is_virtual() || !_gen->is_vreg_flag_set(res, LIRGenerator::byte_reg)) {
54 // make sure that it is a byte register
55 assert(!value()->type()->is_float() && !value()->type()->is_double(),
56 "can't load floats in byte register");
57 LIR_Opr reg = _gen->rlock_byte(T_BYTE);
58 __ move(res, reg);
59
60 _result = reg;
61 }
62 }
63
64
65 void LIRItem::load_nonconstant() {
66 LIR_Opr r = value()->operand();
67 if (r->is_constant()) {
68 _result = r;
69 } else {
70 load_item();
71 }
72 }
73
74 //--------------------------------------------------------------
75 // LIRGenerator
76 //--------------------------------------------------------------
77
78
79 LIR_Opr LIRGenerator::exceptionOopOpr() { return FrameMap::rax_oop_opr; }
80 LIR_Opr LIRGenerator::exceptionPcOpr() { return FrameMap::rdx_opr; }
81 LIR_Opr LIRGenerator::divInOpr() { return FrameMap::rax_opr; }
82 LIR_Opr LIRGenerator::divOutOpr() { return FrameMap::rax_opr; }
83 LIR_Opr LIRGenerator::remOutOpr() { return FrameMap::rdx_opr; }
84 LIR_Opr LIRGenerator::shiftCountOpr() { return FrameMap::rcx_opr; }
85 LIR_Opr LIRGenerator::syncLockOpr() { return new_register(T_INT); }
86 LIR_Opr LIRGenerator::syncTempOpr() { return FrameMap::rax_opr; }
87 LIR_Opr LIRGenerator::getThreadTemp() { return LIR_OprFact::illegalOpr; }
88
89
90 LIR_Opr LIRGenerator::result_register_for(ValueType* type, bool callee) {
91 LIR_Opr opr;
92 switch (type->tag()) {
93 case intTag: opr = FrameMap::rax_opr; break;
94 case objectTag: opr = FrameMap::rax_oop_opr; break;
95 case longTag: opr = FrameMap::long0_opr; break;
96 case floatTag: opr = UseSSE >= 1 ? FrameMap::xmm0_float_opr : FrameMap::fpu0_float_opr; break;
97 case doubleTag: opr = UseSSE >= 2 ? FrameMap::xmm0_double_opr : FrameMap::fpu0_double_opr; break;
98
99 case addressTag:
100 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
101 }
102
103 assert(opr->type_field() == as_OprType(as_BasicType(type)), "type mismatch");
104 return opr;
105 }
106
107
108 LIR_Opr LIRGenerator::rlock_byte(BasicType type) {
109 LIR_Opr reg = new_register(T_INT);
110 set_vreg_flag(reg, LIRGenerator::byte_reg);
111 return reg;
112 }
113
114
115 //--------- loading items into registers --------------------------------
116
117
118 // i486 instructions can inline constants
119 bool LIRGenerator::can_store_as_constant(Value v, BasicType type) const {
120 if (type == T_SHORT || type == T_CHAR) {
121 // there is no immediate move of word values in asembler_i486.?pp
122 return false;
123 }
124 Constant* c = v->as_Constant();
125 if (c && c->state_before() == NULL) {
126 // constants of any type can be stored directly, except for
127 // unloaded object constants.
128 return true;
129 }
130 return false;
131 }
132
133
134 bool LIRGenerator::can_inline_as_constant(Value v) const {
135 if (v->type()->tag() == longTag) return false;
136 return v->type()->tag() != objectTag ||
137 (v->type()->is_constant() && v->type()->as_ObjectType()->constant_value()->is_null_object());
138 }
139
140
141 bool LIRGenerator::can_inline_as_constant(LIR_Const* c) const {
142 if (c->type() == T_LONG) return false;
143 return c->type() != T_OBJECT || c->as_jobject() == NULL;
144 }
145
146
147 LIR_Opr LIRGenerator::safepoint_poll_register() {
148 NOT_LP64( if (SafepointMechanism::uses_thread_local_poll()) { return new_register(T_ADDRESS); } )
149 return LIR_OprFact::illegalOpr;
150 }
151
152
153 LIR_Address* LIRGenerator::generate_address(LIR_Opr base, LIR_Opr index,
154 int shift, int disp, BasicType type) {
155 assert(base->is_register(), "must be");
156 if (index->is_constant()) {
157 LIR_Const *constant = index->as_constant_ptr();
158 #ifdef _LP64
159 jlong c;
160 if (constant->type() == T_INT) {
161 c = (jlong(index->as_jint()) << shift) + disp;
162 } else {
163 assert(constant->type() == T_LONG, "should be");
164 c = (index->as_jlong() << shift) + disp;
165 }
166 if ((jlong)((jint)c) == c) {
167 return new LIR_Address(base, (jint)c, type);
168 } else {
169 LIR_Opr tmp = new_register(T_LONG);
170 __ move(index, tmp);
171 return new LIR_Address(base, tmp, type);
172 }
173 #else
174 return new LIR_Address(base,
175 ((intx)(constant->as_jint()) << shift) + disp,
176 type);
177 #endif
178 } else {
179 return new LIR_Address(base, index, (LIR_Address::Scale)shift, disp, type);
180 }
181 }
182
183
184 LIR_Address* LIRGenerator::emit_array_address(LIR_Opr array_opr, LIR_Opr index_opr,
185 BasicType type) {
186 int offset_in_bytes = arrayOopDesc::base_offset_in_bytes(type);
187
188 LIR_Address* addr;
189 if (index_opr->is_constant()) {
190 int elem_size = type2aelembytes(type);
191 addr = new LIR_Address(array_opr,
192 offset_in_bytes + (intx)(index_opr->as_jint()) * elem_size, type);
193 } else {
194 #ifdef _LP64
195 if (index_opr->type() == T_INT) {
196 LIR_Opr tmp = new_register(T_LONG);
197 __ convert(Bytecodes::_i2l, index_opr, tmp);
198 index_opr = tmp;
199 }
200 #endif // _LP64
201 addr = new LIR_Address(array_opr,
202 index_opr,
203 LIR_Address::scale(type),
204 offset_in_bytes, type);
205 }
206 return addr;
207 }
208
209
210 LIR_Opr LIRGenerator::load_immediate(int x, BasicType type) {
211 LIR_Opr r = NULL;
212 if (type == T_LONG) {
213 r = LIR_OprFact::longConst(x);
214 } else if (type == T_INT) {
215 r = LIR_OprFact::intConst(x);
216 } else {
217 ShouldNotReachHere();
218 }
219 return r;
220 }
221
222 void LIRGenerator::increment_counter(address counter, BasicType type, int step) {
223 LIR_Opr pointer = new_pointer_register();
224 __ move(LIR_OprFact::intptrConst(counter), pointer);
225 LIR_Address* addr = new LIR_Address(pointer, type);
226 increment_counter(addr, step);
227 }
228
229
230 void LIRGenerator::increment_counter(LIR_Address* addr, int step) {
231 __ add((LIR_Opr)addr, LIR_OprFact::intConst(step), (LIR_Opr)addr);
232 }
233
234 void LIRGenerator::cmp_mem_int(LIR_Condition condition, LIR_Opr base, int disp, int c, CodeEmitInfo* info) {
235 __ cmp_mem_int(condition, base, disp, c, info);
236 }
237
238
239 void LIRGenerator::cmp_reg_mem(LIR_Condition condition, LIR_Opr reg, LIR_Opr base, int disp, BasicType type, CodeEmitInfo* info) {
240 __ cmp_reg_mem(condition, reg, new LIR_Address(base, disp, type), info);
241 }
242
243
244 bool LIRGenerator::strength_reduce_multiply(LIR_Opr left, jint c, LIR_Opr result, LIR_Opr tmp) {
245 if (tmp->is_valid() && c > 0 && c < max_jint) {
246 if (is_power_of_2(c + 1)) {
247 __ move(left, tmp);
248 __ shift_left(left, log2_jint(c + 1), left);
249 __ sub(left, tmp, result);
250 return true;
251 } else if (is_power_of_2(c - 1)) {
252 __ move(left, tmp);
253 __ shift_left(left, log2_jint(c - 1), left);
254 __ add(left, tmp, result);
255 return true;
256 }
257 }
258 return false;
259 }
260
261
262 void LIRGenerator::store_stack_parameter (LIR_Opr item, ByteSize offset_from_sp) {
263 BasicType type = item->type();
264 __ store(item, new LIR_Address(FrameMap::rsp_opr, in_bytes(offset_from_sp), type));
265 }
266
267 void LIRGenerator::array_store_check(LIR_Opr value, LIR_Opr array, CodeEmitInfo* store_check_info, ciMethod* profiled_method, int profiled_bci) {
268 LIR_Opr tmp1 = new_register(objectType);
269 LIR_Opr tmp2 = new_register(objectType);
270 LIR_Opr tmp3 = new_register(objectType);
271 __ store_check(value, array, tmp1, tmp2, tmp3, store_check_info, profiled_method, profiled_bci);
272 }
273
274 //----------------------------------------------------------------------
275 // visitor functions
276 //----------------------------------------------------------------------
277
278 void LIRGenerator::do_MonitorEnter(MonitorEnter* x) {
279 assert(x->is_pinned(),"");
280 LIRItem obj(x->obj(), this);
281 obj.load_item();
282
283 set_no_result(x);
284
285 // "lock" stores the address of the monitor stack slot, so this is not an oop
286 LIR_Opr lock = new_register(T_INT);
287 // Need a scratch register for biased locking on x86
288 LIR_Opr scratch = LIR_OprFact::illegalOpr;
289 if (UseBiasedLocking) {
290 scratch = new_register(T_INT);
291 }
292
293 CodeEmitInfo* info_for_exception = NULL;
294 if (x->needs_null_check()) {
295 info_for_exception = state_for(x);
296 }
297 // this CodeEmitInfo must not have the xhandlers because here the
298 // object is already locked (xhandlers expect object to be unlocked)
299 CodeEmitInfo* info = state_for(x, x->state(), true);
300 monitor_enter(obj.result(), lock, syncTempOpr(), scratch,
301 x->monitor_no(), info_for_exception, info);
302 }
303
304
305 void LIRGenerator::do_MonitorExit(MonitorExit* x) {
306 assert(x->is_pinned(),"");
307
308 LIRItem obj(x->obj(), this);
309 obj.dont_load_item();
310
311 LIR_Opr lock = new_register(T_INT);
312 LIR_Opr obj_temp = new_register(T_INT);
313 set_no_result(x);
314 monitor_exit(obj_temp, lock, syncTempOpr(), LIR_OprFact::illegalOpr, x->monitor_no());
315 }
316
317
318 // _ineg, _lneg, _fneg, _dneg
319 void LIRGenerator::do_NegateOp(NegateOp* x) {
320 LIRItem value(x->x(), this);
321 value.set_destroys_register();
322 value.load_item();
323 LIR_Opr reg = rlock(x);
324
325 LIR_Opr tmp = LIR_OprFact::illegalOpr;
326 #ifdef _LP64
327 if (UseAVX > 2 && !VM_Version::supports_avx512vl()) {
328 if (x->type()->tag() == doubleTag) {
329 tmp = new_register(T_DOUBLE);
330 __ move(LIR_OprFact::doubleConst(-0.0), tmp);
331 }
332 else if (x->type()->tag() == floatTag) {
333 tmp = new_register(T_FLOAT);
334 __ move(LIR_OprFact::floatConst(-0.0), tmp);
335 }
336 }
337 #endif
338 __ negate(value.result(), reg, tmp);
339
340 set_result(x, round_item(reg));
341 }
342
343
344 // for _fadd, _fmul, _fsub, _fdiv, _frem
345 // _dadd, _dmul, _dsub, _ddiv, _drem
346 void LIRGenerator::do_ArithmeticOp_FPU(ArithmeticOp* x) {
347 LIRItem left(x->x(), this);
348 LIRItem right(x->y(), this);
349 LIRItem* left_arg = &left;
350 LIRItem* right_arg = &right;
351 assert(!left.is_stack() || !right.is_stack(), "can't both be memory operands");
352 bool must_load_both = (x->op() == Bytecodes::_frem || x->op() == Bytecodes::_drem);
353 if (left.is_register() || x->x()->type()->is_constant() || must_load_both) {
354 left.load_item();
355 } else {
356 left.dont_load_item();
357 }
358
359 // do not load right operand if it is a constant. only 0 and 1 are
360 // loaded because there are special instructions for loading them
361 // without memory access (not needed for SSE2 instructions)
362 bool must_load_right = false;
363 if (right.is_constant()) {
364 LIR_Const* c = right.result()->as_constant_ptr();
365 assert(c != NULL, "invalid constant");
366 assert(c->type() == T_FLOAT || c->type() == T_DOUBLE, "invalid type");
367
368 if (c->type() == T_FLOAT) {
369 must_load_right = UseSSE < 1 && (c->is_one_float() || c->is_zero_float());
370 } else {
371 must_load_right = UseSSE < 2 && (c->is_one_double() || c->is_zero_double());
372 }
373 }
374
375 if (must_load_both) {
376 // frem and drem destroy also right operand, so move it to a new register
377 right.set_destroys_register();
378 right.load_item();
379 } else if (right.is_register() || must_load_right) {
380 right.load_item();
381 } else {
382 right.dont_load_item();
383 }
384 LIR_Opr reg = rlock(x);
385 LIR_Opr tmp = LIR_OprFact::illegalOpr;
386 if (x->is_strictfp() && (x->op() == Bytecodes::_dmul || x->op() == Bytecodes::_ddiv)) {
387 tmp = new_register(T_DOUBLE);
388 }
389
390 if ((UseSSE >= 1 && x->op() == Bytecodes::_frem) || (UseSSE >= 2 && x->op() == Bytecodes::_drem)) {
391 // special handling for frem and drem: no SSE instruction, so must use FPU with temporary fpu stack slots
392 LIR_Opr fpu0, fpu1;
393 if (x->op() == Bytecodes::_frem) {
394 fpu0 = LIR_OprFact::single_fpu(0);
395 fpu1 = LIR_OprFact::single_fpu(1);
396 } else {
397 fpu0 = LIR_OprFact::double_fpu(0);
398 fpu1 = LIR_OprFact::double_fpu(1);
399 }
400 __ move(right.result(), fpu1); // order of left and right operand is important!
401 __ move(left.result(), fpu0);
402 __ rem (fpu0, fpu1, fpu0);
403 __ move(fpu0, reg);
404
405 } else {
406 arithmetic_op_fpu(x->op(), reg, left.result(), right.result(), x->is_strictfp(), tmp);
407 }
408
409 set_result(x, round_item(reg));
410 }
411
412
413 // for _ladd, _lmul, _lsub, _ldiv, _lrem
414 void LIRGenerator::do_ArithmeticOp_Long(ArithmeticOp* x) {
415 if (x->op() == Bytecodes::_ldiv || x->op() == Bytecodes::_lrem ) {
416 // long division is implemented as a direct call into the runtime
417 LIRItem left(x->x(), this);
418 LIRItem right(x->y(), this);
419
420 // the check for division by zero destroys the right operand
421 right.set_destroys_register();
422
423 BasicTypeList signature(2);
424 signature.append(T_LONG);
425 signature.append(T_LONG);
426 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
427
428 // check for division by zero (destroys registers of right operand!)
429 CodeEmitInfo* info = state_for(x);
430
431 const LIR_Opr result_reg = result_register_for(x->type());
432 left.load_item_force(cc->at(1));
433 right.load_item();
434
435 __ move(right.result(), cc->at(0));
436
437 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::longConst(0));
438 __ branch(lir_cond_equal, T_LONG, new DivByZeroStub(info));
439
440 address entry = NULL;
441 switch (x->op()) {
442 case Bytecodes::_lrem:
443 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lrem);
444 break; // check if dividend is 0 is done elsewhere
445 case Bytecodes::_ldiv:
446 entry = CAST_FROM_FN_PTR(address, SharedRuntime::ldiv);
447 break; // check if dividend is 0 is done elsewhere
448 case Bytecodes::_lmul:
449 entry = CAST_FROM_FN_PTR(address, SharedRuntime::lmul);
450 break;
451 default:
452 ShouldNotReachHere();
453 }
454
455 LIR_Opr result = rlock_result(x);
456 __ call_runtime_leaf(entry, getThreadTemp(), result_reg, cc->args());
457 __ move(result_reg, result);
458 } else if (x->op() == Bytecodes::_lmul) {
459 // missing test if instr is commutative and if we should swap
460 LIRItem left(x->x(), this);
461 LIRItem right(x->y(), this);
462
463 // right register is destroyed by the long mul, so it must be
464 // copied to a new register.
465 right.set_destroys_register();
466
467 left.load_item();
468 right.load_item();
469
470 LIR_Opr reg = FrameMap::long0_opr;
471 arithmetic_op_long(x->op(), reg, left.result(), right.result(), NULL);
472 LIR_Opr result = rlock_result(x);
473 __ move(reg, result);
474 } else {
475 // missing test if instr is commutative and if we should swap
476 LIRItem left(x->x(), this);
477 LIRItem right(x->y(), this);
478
479 left.load_item();
480 // don't load constants to save register
481 right.load_nonconstant();
482 rlock_result(x);
483 arithmetic_op_long(x->op(), x->operand(), left.result(), right.result(), NULL);
484 }
485 }
486
487
488
489 // for: _iadd, _imul, _isub, _idiv, _irem
490 void LIRGenerator::do_ArithmeticOp_Int(ArithmeticOp* x) {
491 if (x->op() == Bytecodes::_idiv || x->op() == Bytecodes::_irem) {
492 // The requirements for division and modulo
493 // input : rax,: dividend min_int
494 // reg: divisor (may not be rax,/rdx) -1
495 //
496 // output: rax,: quotient (= rax, idiv reg) min_int
497 // rdx: remainder (= rax, irem reg) 0
498
499 // rax, and rdx will be destroyed
500
501 // Note: does this invalidate the spec ???
502 LIRItem right(x->y(), this);
503 LIRItem left(x->x() , this); // visit left second, so that the is_register test is valid
504
505 // call state_for before load_item_force because state_for may
506 // force the evaluation of other instructions that are needed for
507 // correct debug info. Otherwise the live range of the fix
508 // register might be too long.
509 CodeEmitInfo* info = state_for(x);
510
511 left.load_item_force(divInOpr());
512
513 right.load_item();
514
515 LIR_Opr result = rlock_result(x);
516 LIR_Opr result_reg;
517 if (x->op() == Bytecodes::_idiv) {
518 result_reg = divOutOpr();
519 } else {
520 result_reg = remOutOpr();
521 }
522
523 if (!ImplicitDiv0Checks) {
524 __ cmp(lir_cond_equal, right.result(), LIR_OprFact::intConst(0));
525 __ branch(lir_cond_equal, T_INT, new DivByZeroStub(info));
526 // Idiv/irem cannot trap (passing info would generate an assertion).
527 info = NULL;
528 }
529 LIR_Opr tmp = FrameMap::rdx_opr; // idiv and irem use rdx in their implementation
530 if (x->op() == Bytecodes::_irem) {
531 __ irem(left.result(), right.result(), result_reg, tmp, info);
532 } else if (x->op() == Bytecodes::_idiv) {
533 __ idiv(left.result(), right.result(), result_reg, tmp, info);
534 } else {
535 ShouldNotReachHere();
536 }
537
538 __ move(result_reg, result);
539 } else {
540 // missing test if instr is commutative and if we should swap
541 LIRItem left(x->x(), this);
542 LIRItem right(x->y(), this);
543 LIRItem* left_arg = &left;
544 LIRItem* right_arg = &right;
545 if (x->is_commutative() && left.is_stack() && right.is_register()) {
546 // swap them if left is real stack (or cached) and right is real register(not cached)
547 left_arg = &right;
548 right_arg = &left;
549 }
550
551 left_arg->load_item();
552
553 // do not need to load right, as we can handle stack and constants
554 if (x->op() == Bytecodes::_imul ) {
555 // check if we can use shift instead
556 bool use_constant = false;
557 bool use_tmp = false;
558 if (right_arg->is_constant()) {
559 jint iconst = right_arg->get_jint_constant();
560 if (iconst > 0 && iconst < max_jint) {
561 if (is_power_of_2(iconst)) {
562 use_constant = true;
563 } else if (is_power_of_2(iconst - 1) || is_power_of_2(iconst + 1)) {
564 use_constant = true;
565 use_tmp = true;
566 }
567 }
568 }
569 if (use_constant) {
570 right_arg->dont_load_item();
571 } else {
572 right_arg->load_item();
573 }
574 LIR_Opr tmp = LIR_OprFact::illegalOpr;
575 if (use_tmp) {
576 tmp = new_register(T_INT);
577 }
578 rlock_result(x);
579
580 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
581 } else {
582 right_arg->dont_load_item();
583 rlock_result(x);
584 LIR_Opr tmp = LIR_OprFact::illegalOpr;
585 arithmetic_op_int(x->op(), x->operand(), left_arg->result(), right_arg->result(), tmp);
586 }
587 }
588 }
589
590
591 void LIRGenerator::do_ArithmeticOp(ArithmeticOp* x) {
592 // when an operand with use count 1 is the left operand, then it is
593 // likely that no move for 2-operand-LIR-form is necessary
594 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
595 x->swap_operands();
596 }
597
598 ValueTag tag = x->type()->tag();
599 assert(x->x()->type()->tag() == tag && x->y()->type()->tag() == tag, "wrong parameters");
600 switch (tag) {
601 case floatTag:
602 case doubleTag: do_ArithmeticOp_FPU(x); return;
603 case longTag: do_ArithmeticOp_Long(x); return;
604 case intTag: do_ArithmeticOp_Int(x); return;
605 default: ShouldNotReachHere(); return;
606 }
607 }
608
609
610 // _ishl, _lshl, _ishr, _lshr, _iushr, _lushr
611 void LIRGenerator::do_ShiftOp(ShiftOp* x) {
612 // count must always be in rcx
613 LIRItem value(x->x(), this);
614 LIRItem count(x->y(), this);
615
616 ValueTag elemType = x->type()->tag();
617 bool must_load_count = !count.is_constant() || elemType == longTag;
618 if (must_load_count) {
619 // count for long must be in register
620 count.load_item_force(shiftCountOpr());
621 } else {
622 count.dont_load_item();
623 }
624 value.load_item();
625 LIR_Opr reg = rlock_result(x);
626
627 shift_op(x->op(), reg, value.result(), count.result(), LIR_OprFact::illegalOpr);
628 }
629
630
631 // _iand, _land, _ior, _lor, _ixor, _lxor
632 void LIRGenerator::do_LogicOp(LogicOp* x) {
633 // when an operand with use count 1 is the left operand, then it is
634 // likely that no move for 2-operand-LIR-form is necessary
635 if (x->is_commutative() && x->y()->as_Constant() == NULL && x->x()->use_count() > x->y()->use_count()) {
636 x->swap_operands();
637 }
638
639 LIRItem left(x->x(), this);
640 LIRItem right(x->y(), this);
641
642 left.load_item();
643 right.load_nonconstant();
644 LIR_Opr reg = rlock_result(x);
645
646 logic_op(x->op(), reg, left.result(), right.result());
647 }
648
649
650
651 // _lcmp, _fcmpl, _fcmpg, _dcmpl, _dcmpg
652 void LIRGenerator::do_CompareOp(CompareOp* x) {
653 LIRItem left(x->x(), this);
654 LIRItem right(x->y(), this);
655 ValueTag tag = x->x()->type()->tag();
656 if (tag == longTag) {
657 left.set_destroys_register();
658 }
659 left.load_item();
660 right.load_item();
661 LIR_Opr reg = rlock_result(x);
662
663 if (x->x()->type()->is_float_kind()) {
664 Bytecodes::Code code = x->op();
665 __ fcmp2int(left.result(), right.result(), reg, (code == Bytecodes::_fcmpl || code == Bytecodes::_dcmpl));
666 } else if (x->x()->type()->tag() == longTag) {
667 __ lcmp2int(left.result(), right.result(), reg);
668 } else {
669 Unimplemented();
670 }
671 }
672
673 LIR_Opr LIRGenerator::atomic_cmpxchg(BasicType type, LIR_Opr addr, LIRItem& cmp_value, LIRItem& new_value) {
674 LIR_Opr ill = LIR_OprFact::illegalOpr; // for convenience
675 if (type == T_OBJECT || type == T_ARRAY) {
676 cmp_value.load_item_force(FrameMap::rax_oop_opr);
677 new_value.load_item();
678 #if INCLUDE_SHENANDOAHGC
679 if (UseShenandoahGC) {
680 __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), new_register(T_OBJECT), new_register(T_OBJECT));
681 } else
682 #endif
683 __ cas_obj(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
684 } else if (type == T_INT) {
685 cmp_value.load_item_force(FrameMap::rax_opr);
686 new_value.load_item();
687 __ cas_int(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
688 } else if (type == T_LONG) {
689 cmp_value.load_item_force(FrameMap::long0_opr);
690 new_value.load_item_force(FrameMap::long1_opr);
691 __ cas_long(addr->as_address_ptr()->base(), cmp_value.result(), new_value.result(), ill, ill);
692 } else {
693 Unimplemented();
694 }
695 LIR_Opr result = new_register(T_INT);
696 __ cmove(lir_cond_equal, LIR_OprFact::intConst(1), LIR_OprFact::intConst(0),
697 result, type);
698 return result;
699 }
700
701 LIR_Opr LIRGenerator::atomic_xchg(BasicType type, LIR_Opr addr, LIRItem& value) {
702 bool is_oop = type == T_OBJECT || type == T_ARRAY;
703 LIR_Opr result = new_register(type);
704 value.load_item();
705 // Because we want a 2-arg form of xchg and xadd
706 __ move(value.result(), result);
707 assert(type == T_INT || is_oop LP64_ONLY( || type == T_LONG ), "unexpected type");
708 #if INCLUDE_SHENANDOAHGC
709 if (UseShenandoahGC) {
710 LIR_Opr tmp = is_oop ? new_register(type) : LIR_OprFact::illegalOpr;
711 __ xchg(addr, result, result, tmp);
712 } else
713 #endif
714 __ xchg(addr, result, result, LIR_OprFact::illegalOpr);
715 return result;
716 }
717
718 LIR_Opr LIRGenerator::atomic_add(BasicType type, LIR_Opr addr, LIRItem& value) {
719 LIR_Opr result = new_register(type);
720 value.load_item();
721 // Because we want a 2-arg form of xchg and xadd
722 __ move(value.result(), result);
723 assert(type == T_INT LP64_ONLY( || type == T_LONG ), "unexpected type");
724 __ xadd(addr, result, result, LIR_OprFact::illegalOpr);
725 return result;
726 }
727
728 void LIRGenerator::do_FmaIntrinsic(Intrinsic* x) {
729 assert(x->number_of_arguments() == 3, "wrong type");
730 assert(UseFMA, "Needs FMA instructions support.");
731 LIRItem value(x->argument_at(0), this);
732 LIRItem value1(x->argument_at(1), this);
733 LIRItem value2(x->argument_at(2), this);
734
735 value2.set_destroys_register();
736
737 value.load_item();
738 value1.load_item();
739 value2.load_item();
740
741 LIR_Opr calc_input = value.result();
742 LIR_Opr calc_input1 = value1.result();
743 LIR_Opr calc_input2 = value2.result();
744 LIR_Opr calc_result = rlock_result(x);
745
746 switch (x->id()) {
747 case vmIntrinsics::_fmaD: __ fmad(calc_input, calc_input1, calc_input2, calc_result); break;
748 case vmIntrinsics::_fmaF: __ fmaf(calc_input, calc_input1, calc_input2, calc_result); break;
749 default: ShouldNotReachHere();
750 }
751
752 }
753
754
755 void LIRGenerator::do_MathIntrinsic(Intrinsic* x) {
756 assert(x->number_of_arguments() == 1 || (x->number_of_arguments() == 2 && x->id() == vmIntrinsics::_dpow), "wrong type");
757
758 if (x->id() == vmIntrinsics::_dexp || x->id() == vmIntrinsics::_dlog ||
759 x->id() == vmIntrinsics::_dpow || x->id() == vmIntrinsics::_dcos ||
760 x->id() == vmIntrinsics::_dsin || x->id() == vmIntrinsics::_dtan ||
761 x->id() == vmIntrinsics::_dlog10) {
762 do_LibmIntrinsic(x);
763 return;
764 }
765
766 LIRItem value(x->argument_at(0), this);
767
768 bool use_fpu = false;
769 if (UseSSE < 2) {
770 value.set_destroys_register();
771 }
772 value.load_item();
773
774 LIR_Opr calc_input = value.result();
775 LIR_Opr calc_result = rlock_result(x);
776
777 LIR_Opr tmp = LIR_OprFact::illegalOpr;
778 #ifdef _LP64
779 if (UseAVX > 2 && (!VM_Version::supports_avx512vl()) &&
780 (x->id() == vmIntrinsics::_dabs)) {
781 tmp = new_register(T_DOUBLE);
782 __ move(LIR_OprFact::doubleConst(-0.0), tmp);
783 }
784 #endif
785
786 switch(x->id()) {
787 case vmIntrinsics::_dabs: __ abs (calc_input, calc_result, tmp); break;
788 case vmIntrinsics::_dsqrt: __ sqrt (calc_input, calc_result, LIR_OprFact::illegalOpr); break;
789 default: ShouldNotReachHere();
790 }
791
792 if (use_fpu) {
793 __ move(calc_result, x->operand());
794 }
795 }
796
797 void LIRGenerator::do_LibmIntrinsic(Intrinsic* x) {
798 LIRItem value(x->argument_at(0), this);
799 value.set_destroys_register();
800
801 LIR_Opr calc_result = rlock_result(x);
802 LIR_Opr result_reg = result_register_for(x->type());
803
804 CallingConvention* cc = NULL;
805
806 if (x->id() == vmIntrinsics::_dpow) {
807 LIRItem value1(x->argument_at(1), this);
808
809 value1.set_destroys_register();
810
811 BasicTypeList signature(2);
812 signature.append(T_DOUBLE);
813 signature.append(T_DOUBLE);
814 cc = frame_map()->c_calling_convention(&signature);
815 value.load_item_force(cc->at(0));
816 value1.load_item_force(cc->at(1));
817 } else {
818 BasicTypeList signature(1);
819 signature.append(T_DOUBLE);
820 cc = frame_map()->c_calling_convention(&signature);
821 value.load_item_force(cc->at(0));
822 }
823
824 #ifndef _LP64
825 LIR_Opr tmp = FrameMap::fpu0_double_opr;
826 result_reg = tmp;
827 switch(x->id()) {
828 case vmIntrinsics::_dexp:
829 if (StubRoutines::dexp() != NULL) {
830 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
831 } else {
832 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
833 }
834 break;
835 case vmIntrinsics::_dlog:
836 if (StubRoutines::dlog() != NULL) {
837 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
838 } else {
839 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
840 }
841 break;
842 case vmIntrinsics::_dlog10:
843 if (StubRoutines::dlog10() != NULL) {
844 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
845 } else {
846 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
847 }
848 break;
849 case vmIntrinsics::_dpow:
850 if (StubRoutines::dpow() != NULL) {
851 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
852 } else {
853 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
854 }
855 break;
856 case vmIntrinsics::_dsin:
857 if (VM_Version::supports_sse2() && StubRoutines::dsin() != NULL) {
858 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
859 } else {
860 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
861 }
862 break;
863 case vmIntrinsics::_dcos:
864 if (VM_Version::supports_sse2() && StubRoutines::dcos() != NULL) {
865 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
866 } else {
867 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
868 }
869 break;
870 case vmIntrinsics::_dtan:
871 if (StubRoutines::dtan() != NULL) {
872 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
873 } else {
874 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
875 }
876 break;
877 default: ShouldNotReachHere();
878 }
879 #else
880 switch (x->id()) {
881 case vmIntrinsics::_dexp:
882 if (StubRoutines::dexp() != NULL) {
883 __ call_runtime_leaf(StubRoutines::dexp(), getThreadTemp(), result_reg, cc->args());
884 } else {
885 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dexp), getThreadTemp(), result_reg, cc->args());
886 }
887 break;
888 case vmIntrinsics::_dlog:
889 if (StubRoutines::dlog() != NULL) {
890 __ call_runtime_leaf(StubRoutines::dlog(), getThreadTemp(), result_reg, cc->args());
891 } else {
892 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog), getThreadTemp(), result_reg, cc->args());
893 }
894 break;
895 case vmIntrinsics::_dlog10:
896 if (StubRoutines::dlog10() != NULL) {
897 __ call_runtime_leaf(StubRoutines::dlog10(), getThreadTemp(), result_reg, cc->args());
898 } else {
899 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dlog10), getThreadTemp(), result_reg, cc->args());
900 }
901 break;
902 case vmIntrinsics::_dpow:
903 if (StubRoutines::dpow() != NULL) {
904 __ call_runtime_leaf(StubRoutines::dpow(), getThreadTemp(), result_reg, cc->args());
905 } else {
906 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dpow), getThreadTemp(), result_reg, cc->args());
907 }
908 break;
909 case vmIntrinsics::_dsin:
910 if (StubRoutines::dsin() != NULL) {
911 __ call_runtime_leaf(StubRoutines::dsin(), getThreadTemp(), result_reg, cc->args());
912 } else {
913 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dsin), getThreadTemp(), result_reg, cc->args());
914 }
915 break;
916 case vmIntrinsics::_dcos:
917 if (StubRoutines::dcos() != NULL) {
918 __ call_runtime_leaf(StubRoutines::dcos(), getThreadTemp(), result_reg, cc->args());
919 } else {
920 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dcos), getThreadTemp(), result_reg, cc->args());
921 }
922 break;
923 case vmIntrinsics::_dtan:
924 if (StubRoutines::dtan() != NULL) {
925 __ call_runtime_leaf(StubRoutines::dtan(), getThreadTemp(), result_reg, cc->args());
926 } else {
927 __ call_runtime_leaf(CAST_FROM_FN_PTR(address, SharedRuntime::dtan), getThreadTemp(), result_reg, cc->args());
928 }
929 break;
930 default: ShouldNotReachHere();
931 }
932 #endif // _LP64
933 __ move(result_reg, calc_result);
934 }
935
936 void LIRGenerator::do_ArrayCopy(Intrinsic* x) {
937 assert(x->number_of_arguments() == 5, "wrong type");
938
939 // Make all state_for calls early since they can emit code
940 CodeEmitInfo* info = state_for(x, x->state());
941
942 LIRItem src(x->argument_at(0), this);
943 LIRItem src_pos(x->argument_at(1), this);
944 LIRItem dst(x->argument_at(2), this);
945 LIRItem dst_pos(x->argument_at(3), this);
946 LIRItem length(x->argument_at(4), this);
947
948 // operands for arraycopy must use fixed registers, otherwise
949 // LinearScan will fail allocation (because arraycopy always needs a
950 // call)
951
952 #ifndef _LP64
953 src.load_item_force (FrameMap::rcx_oop_opr);
954 src_pos.load_item_force (FrameMap::rdx_opr);
955 dst.load_item_force (FrameMap::rax_oop_opr);
956 dst_pos.load_item_force (FrameMap::rbx_opr);
957 length.load_item_force (FrameMap::rdi_opr);
958 LIR_Opr tmp = (FrameMap::rsi_opr);
959 #else
960
961 // The java calling convention will give us enough registers
962 // so that on the stub side the args will be perfect already.
963 // On the other slow/special case side we call C and the arg
964 // positions are not similar enough to pick one as the best.
965 // Also because the java calling convention is a "shifted" version
966 // of the C convention we can process the java args trivially into C
967 // args without worry of overwriting during the xfer
968
969 src.load_item_force (FrameMap::as_oop_opr(j_rarg0));
970 src_pos.load_item_force (FrameMap::as_opr(j_rarg1));
971 dst.load_item_force (FrameMap::as_oop_opr(j_rarg2));
972 dst_pos.load_item_force (FrameMap::as_opr(j_rarg3));
973 length.load_item_force (FrameMap::as_opr(j_rarg4));
974
975 LIR_Opr tmp = FrameMap::as_opr(j_rarg5);
976 #endif // LP64
977
978 set_no_result(x);
979
980 int flags;
981 ciArrayKlass* expected_type;
982 arraycopy_helper(x, &flags, &expected_type);
983
984 __ arraycopy(src.result(), src_pos.result(), dst.result(), dst_pos.result(), length.result(), tmp, expected_type, flags, info); // does add_safepoint
985 }
986
987 void LIRGenerator::do_update_CRC32(Intrinsic* x) {
988 assert(UseCRC32Intrinsics, "need AVX and LCMUL instructions support");
989 // Make all state_for calls early since they can emit code
990 LIR_Opr result = rlock_result(x);
991 int flags = 0;
992 switch (x->id()) {
993 case vmIntrinsics::_updateCRC32: {
994 LIRItem crc(x->argument_at(0), this);
995 LIRItem val(x->argument_at(1), this);
996 // val is destroyed by update_crc32
997 val.set_destroys_register();
998 crc.load_item();
999 val.load_item();
1000 __ update_crc32(crc.result(), val.result(), result);
1001 break;
1002 }
1003 case vmIntrinsics::_updateBytesCRC32:
1004 case vmIntrinsics::_updateByteBufferCRC32: {
1005 bool is_updateBytes = (x->id() == vmIntrinsics::_updateBytesCRC32);
1006
1007 LIRItem crc(x->argument_at(0), this);
1008 LIRItem buf(x->argument_at(1), this);
1009 LIRItem off(x->argument_at(2), this);
1010 LIRItem len(x->argument_at(3), this);
1011 buf.load_item();
1012 off.load_nonconstant();
1013
1014 LIR_Opr index = off.result();
1015 int offset = is_updateBytes ? arrayOopDesc::base_offset_in_bytes(T_BYTE) : 0;
1016 if(off.result()->is_constant()) {
1017 index = LIR_OprFact::illegalOpr;
1018 offset += off.result()->as_jint();
1019 }
1020 LIR_Opr base_op = buf.result();
1021
1022 #ifndef _LP64
1023 if (!is_updateBytes) { // long b raw address
1024 base_op = new_register(T_INT);
1025 __ convert(Bytecodes::_l2i, buf.result(), base_op);
1026 }
1027 #else
1028 if (index->is_valid()) {
1029 LIR_Opr tmp = new_register(T_LONG);
1030 __ convert(Bytecodes::_i2l, index, tmp);
1031 index = tmp;
1032 }
1033 #endif
1034
1035 LIR_Address* a = new LIR_Address(base_op,
1036 index,
1037 offset,
1038 T_BYTE);
1039 BasicTypeList signature(3);
1040 signature.append(T_INT);
1041 signature.append(T_ADDRESS);
1042 signature.append(T_INT);
1043 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1044 const LIR_Opr result_reg = result_register_for(x->type());
1045
1046 LIR_Opr addr = new_pointer_register();
1047 __ leal(LIR_OprFact::address(a), addr);
1048
1049 crc.load_item_force(cc->at(0));
1050 __ move(addr, cc->at(1));
1051 len.load_item_force(cc->at(2));
1052
1053 __ call_runtime_leaf(StubRoutines::updateBytesCRC32(), getThreadTemp(), result_reg, cc->args());
1054 __ move(result_reg, result);
1055
1056 break;
1057 }
1058 default: {
1059 ShouldNotReachHere();
1060 }
1061 }
1062 }
1063
1064 void LIRGenerator::do_update_CRC32C(Intrinsic* x) {
1065 Unimplemented();
1066 }
1067
1068 void LIRGenerator::do_vectorizedMismatch(Intrinsic* x) {
1069 assert(UseVectorizedMismatchIntrinsic, "need AVX instruction support");
1070
1071 // Make all state_for calls early since they can emit code
1072 LIR_Opr result = rlock_result(x);
1073
1074 LIRItem a(x->argument_at(0), this); // Object
1075 LIRItem aOffset(x->argument_at(1), this); // long
1076 LIRItem b(x->argument_at(2), this); // Object
1077 LIRItem bOffset(x->argument_at(3), this); // long
1078 LIRItem length(x->argument_at(4), this); // int
1079 LIRItem log2ArrayIndexScale(x->argument_at(5), this); // int
1080
1081 a.load_item();
1082 aOffset.load_nonconstant();
1083 b.load_item();
1084 bOffset.load_nonconstant();
1085
1086 long constant_aOffset = 0;
1087 LIR_Opr result_aOffset = aOffset.result();
1088 if (result_aOffset->is_constant()) {
1089 constant_aOffset = result_aOffset->as_jlong();
1090 result_aOffset = LIR_OprFact::illegalOpr;
1091 }
1092 LIR_Opr result_a = a.result();
1093
1094 long constant_bOffset = 0;
1095 LIR_Opr result_bOffset = bOffset.result();
1096 if (result_bOffset->is_constant()) {
1097 constant_bOffset = result_bOffset->as_jlong();
1098 result_bOffset = LIR_OprFact::illegalOpr;
1099 }
1100 LIR_Opr result_b = b.result();
1101
1102 #ifndef _LP64
1103 result_a = new_register(T_INT);
1104 __ convert(Bytecodes::_l2i, a.result(), result_a);
1105 result_b = new_register(T_INT);
1106 __ convert(Bytecodes::_l2i, b.result(), result_b);
1107 #endif
1108
1109
1110 LIR_Address* addr_a = new LIR_Address(result_a,
1111 result_aOffset,
1112 constant_aOffset,
1113 T_BYTE);
1114
1115 LIR_Address* addr_b = new LIR_Address(result_b,
1116 result_bOffset,
1117 constant_bOffset,
1118 T_BYTE);
1119
1120 BasicTypeList signature(4);
1121 signature.append(T_ADDRESS);
1122 signature.append(T_ADDRESS);
1123 signature.append(T_INT);
1124 signature.append(T_INT);
1125 CallingConvention* cc = frame_map()->c_calling_convention(&signature);
1126 const LIR_Opr result_reg = result_register_for(x->type());
1127
1128 LIR_Opr ptr_addr_a = new_pointer_register();
1129 __ leal(LIR_OprFact::address(addr_a), ptr_addr_a);
1130
1131 LIR_Opr ptr_addr_b = new_pointer_register();
1132 __ leal(LIR_OprFact::address(addr_b), ptr_addr_b);
1133
1134 __ move(ptr_addr_a, cc->at(0));
1135 __ move(ptr_addr_b, cc->at(1));
1136 length.load_item_force(cc->at(2));
1137 log2ArrayIndexScale.load_item_force(cc->at(3));
1138
1139 __ call_runtime_leaf(StubRoutines::vectorizedMismatch(), getThreadTemp(), result_reg, cc->args());
1140 __ move(result_reg, result);
1141 }
1142
1143 // _i2l, _i2f, _i2d, _l2i, _l2f, _l2d, _f2i, _f2l, _f2d, _d2i, _d2l, _d2f
1144 // _i2b, _i2c, _i2s
1145 LIR_Opr fixed_register_for(BasicType type) {
1146 switch (type) {
1147 case T_FLOAT: return FrameMap::fpu0_float_opr;
1148 case T_DOUBLE: return FrameMap::fpu0_double_opr;
1149 case T_INT: return FrameMap::rax_opr;
1150 case T_LONG: return FrameMap::long0_opr;
1151 default: ShouldNotReachHere(); return LIR_OprFact::illegalOpr;
1152 }
1153 }
1154
1155 void LIRGenerator::do_Convert(Convert* x) {
1156 // flags that vary for the different operations and different SSE-settings
1157 bool fixed_input = false, fixed_result = false, round_result = false, needs_stub = false;
1158
1159 switch (x->op()) {
1160 case Bytecodes::_i2l: // fall through
1161 case Bytecodes::_l2i: // fall through
1162 case Bytecodes::_i2b: // fall through
1163 case Bytecodes::_i2c: // fall through
1164 case Bytecodes::_i2s: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1165
1166 case Bytecodes::_f2d: fixed_input = UseSSE == 1; fixed_result = false; round_result = false; needs_stub = false; break;
1167 case Bytecodes::_d2f: fixed_input = false; fixed_result = UseSSE == 1; round_result = UseSSE < 1; needs_stub = false; break;
1168 case Bytecodes::_i2f: fixed_input = false; fixed_result = false; round_result = UseSSE < 1; needs_stub = false; break;
1169 case Bytecodes::_i2d: fixed_input = false; fixed_result = false; round_result = false; needs_stub = false; break;
1170 case Bytecodes::_f2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1171 case Bytecodes::_d2i: fixed_input = false; fixed_result = false; round_result = false; needs_stub = true; break;
1172 case Bytecodes::_l2f: fixed_input = false; fixed_result = UseSSE >= 1; round_result = UseSSE < 1; needs_stub = false; break;
1173 case Bytecodes::_l2d: fixed_input = false; fixed_result = UseSSE >= 2; round_result = UseSSE < 2; needs_stub = false; break;
1174 case Bytecodes::_f2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1175 case Bytecodes::_d2l: fixed_input = true; fixed_result = true; round_result = false; needs_stub = false; break;
1176 default: ShouldNotReachHere();
1177 }
1178
1179 LIRItem value(x->value(), this);
1180 value.load_item();
1181 LIR_Opr input = value.result();
1182 LIR_Opr result = rlock(x);
1183
1184 // arguments of lir_convert
1185 LIR_Opr conv_input = input;
1186 LIR_Opr conv_result = result;
1187 ConversionStub* stub = NULL;
1188
1189 if (fixed_input) {
1190 conv_input = fixed_register_for(input->type());
1191 __ move(input, conv_input);
1192 }
1193
1194 assert(fixed_result == false || round_result == false, "cannot set both");
1195 if (fixed_result) {
1196 conv_result = fixed_register_for(result->type());
1197 } else if (round_result) {
1198 result = new_register(result->type());
1199 set_vreg_flag(result, must_start_in_memory);
1200 }
1201
1202 if (needs_stub) {
1203 stub = new ConversionStub(x->op(), conv_input, conv_result);
1204 }
1205
1206 __ convert(x->op(), conv_input, conv_result, stub);
1207
1208 if (result != conv_result) {
1209 __ move(conv_result, result);
1210 }
1211
1212 assert(result->is_virtual(), "result must be virtual register");
1213 set_result(x, result);
1214 }
1215
1216
1217 void LIRGenerator::do_NewInstance(NewInstance* x) {
1218 print_if_not_loaded(x);
1219
1220 CodeEmitInfo* info = state_for(x, x->state());
1221 LIR_Opr reg = result_register_for(x->type());
1222 new_instance(reg, x->klass(), x->is_unresolved(),
1223 FrameMap::rcx_oop_opr,
1224 FrameMap::rdi_oop_opr,
1225 FrameMap::rsi_oop_opr,
1226 LIR_OprFact::illegalOpr,
1227 FrameMap::rdx_metadata_opr, info);
1228 LIR_Opr result = rlock_result(x);
1229 __ move(reg, result);
1230 }
1231
1232
1233 void LIRGenerator::do_NewTypeArray(NewTypeArray* x) {
1234 CodeEmitInfo* info = state_for(x, x->state());
1235
1236 LIRItem length(x->length(), this);
1237 length.load_item_force(FrameMap::rbx_opr);
1238
1239 LIR_Opr reg = result_register_for(x->type());
1240 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1241 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1242 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1243 LIR_Opr tmp4 = reg;
1244 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1245 LIR_Opr len = length.result();
1246 BasicType elem_type = x->elt_type();
1247
1248 __ metadata2reg(ciTypeArrayKlass::make(elem_type)->constant_encoding(), klass_reg);
1249
1250 CodeStub* slow_path = new NewTypeArrayStub(klass_reg, len, reg, info);
1251 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, elem_type, klass_reg, slow_path);
1252
1253 LIR_Opr result = rlock_result(x);
1254 __ move(reg, result);
1255 }
1256
1257
1258 void LIRGenerator::do_NewObjectArray(NewObjectArray* x) {
1259 LIRItem length(x->length(), this);
1260 // in case of patching (i.e., object class is not yet loaded), we need to reexecute the instruction
1261 // and therefore provide the state before the parameters have been consumed
1262 CodeEmitInfo* patching_info = NULL;
1263 if (!x->klass()->is_loaded() || PatchALot) {
1264 patching_info = state_for(x, x->state_before());
1265 }
1266
1267 CodeEmitInfo* info = state_for(x, x->state());
1268
1269 const LIR_Opr reg = result_register_for(x->type());
1270 LIR_Opr tmp1 = FrameMap::rcx_oop_opr;
1271 LIR_Opr tmp2 = FrameMap::rsi_oop_opr;
1272 LIR_Opr tmp3 = FrameMap::rdi_oop_opr;
1273 LIR_Opr tmp4 = reg;
1274 LIR_Opr klass_reg = FrameMap::rdx_metadata_opr;
1275
1276 length.load_item_force(FrameMap::rbx_opr);
1277 LIR_Opr len = length.result();
1278
1279 CodeStub* slow_path = new NewObjectArrayStub(klass_reg, len, reg, info);
1280 ciKlass* obj = (ciKlass*) ciObjArrayKlass::make(x->klass());
1281 if (obj == ciEnv::unloaded_ciobjarrayklass()) {
1282 BAILOUT("encountered unloaded_ciobjarrayklass due to out of memory error");
1283 }
1284 klass2reg_with_patching(klass_reg, obj, patching_info);
1285 __ allocate_array(reg, len, tmp1, tmp2, tmp3, tmp4, T_OBJECT, klass_reg, slow_path);
1286
1287 LIR_Opr result = rlock_result(x);
1288 __ move(reg, result);
1289 }
1290
1291
1292 void LIRGenerator::do_NewMultiArray(NewMultiArray* x) {
1293 Values* dims = x->dims();
1294 int i = dims->length();
1295 LIRItemList* items = new LIRItemList(i, i, NULL);
1296 while (i-- > 0) {
1297 LIRItem* size = new LIRItem(dims->at(i), this);
1298 items->at_put(i, size);
1299 }
1300
1301 // Evaluate state_for early since it may emit code.
1302 CodeEmitInfo* patching_info = NULL;
1303 if (!x->klass()->is_loaded() || PatchALot) {
1304 patching_info = state_for(x, x->state_before());
1305
1306 // Cannot re-use same xhandlers for multiple CodeEmitInfos, so
1307 // clone all handlers (NOTE: Usually this is handled transparently
1308 // by the CodeEmitInfo cloning logic in CodeStub constructors but
1309 // is done explicitly here because a stub isn't being used).
1310 x->set_exception_handlers(new XHandlers(x->exception_handlers()));
1311 }
1312 CodeEmitInfo* info = state_for(x, x->state());
1313
1314 i = dims->length();
1315 while (i-- > 0) {
1316 LIRItem* size = items->at(i);
1317 size->load_nonconstant();
1318
1319 store_stack_parameter(size->result(), in_ByteSize(i*4));
1320 }
1321
1322 LIR_Opr klass_reg = FrameMap::rax_metadata_opr;
1323 klass2reg_with_patching(klass_reg, x->klass(), patching_info);
1324
1325 LIR_Opr rank = FrameMap::rbx_opr;
1326 __ move(LIR_OprFact::intConst(x->rank()), rank);
1327 LIR_Opr varargs = FrameMap::rcx_opr;
1328 __ move(FrameMap::rsp_opr, varargs);
1329 LIR_OprList* args = new LIR_OprList(3);
1330 args->append(klass_reg);
1331 args->append(rank);
1332 args->append(varargs);
1333 LIR_Opr reg = result_register_for(x->type());
1334 __ call_runtime(Runtime1::entry_for(Runtime1::new_multi_array_id),
1335 LIR_OprFact::illegalOpr,
1336 reg, args, info);
1337
1338 LIR_Opr result = rlock_result(x);
1339 __ move(reg, result);
1340 }
1341
1342
1343 void LIRGenerator::do_BlockBegin(BlockBegin* x) {
1344 // nothing to do for now
1345 }
1346
1347
1348 void LIRGenerator::do_CheckCast(CheckCast* x) {
1349 LIRItem obj(x->obj(), this);
1350
1351 CodeEmitInfo* patching_info = NULL;
1352 if (!x->klass()->is_loaded() || (PatchALot && !x->is_incompatible_class_change_check() && !x->is_invokespecial_receiver_check())) {
1353 // must do this before locking the destination register as an oop register,
1354 // and before the obj is loaded (the latter is for deoptimization)
1355 patching_info = state_for(x, x->state_before());
1356 }
1357 obj.load_item();
1358
1359 // info for exceptions
1360 CodeEmitInfo* info_for_exception =
1361 (x->needs_exception_state() ? state_for(x) :
1362 state_for(x, x->state_before(), true /*ignore_xhandler*/));
1363
1364 CodeStub* stub;
1365 if (x->is_incompatible_class_change_check()) {
1366 assert(patching_info == NULL, "can't patch this");
1367 stub = new SimpleExceptionStub(Runtime1::throw_incompatible_class_change_error_id, LIR_OprFact::illegalOpr, info_for_exception);
1368 } else if (x->is_invokespecial_receiver_check()) {
1369 assert(patching_info == NULL, "can't patch this");
1370 stub = new DeoptimizeStub(info_for_exception, Deoptimization::Reason_class_check, Deoptimization::Action_none);
1371 } else {
1372 stub = new SimpleExceptionStub(Runtime1::throw_class_cast_exception_id, obj.result(), info_for_exception);
1373 }
1374 LIR_Opr reg = rlock_result(x);
1375 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1376 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1377 tmp3 = new_register(objectType);
1378 }
1379 __ checkcast(reg, obj.result(), x->klass(),
1380 new_register(objectType), new_register(objectType), tmp3,
1381 x->direct_compare(), info_for_exception, patching_info, stub,
1382 x->profiled_method(), x->profiled_bci());
1383 }
1384
1385
1386 void LIRGenerator::do_InstanceOf(InstanceOf* x) {
1387 LIRItem obj(x->obj(), this);
1388
1389 // result and test object may not be in same register
1390 LIR_Opr reg = rlock_result(x);
1391 CodeEmitInfo* patching_info = NULL;
1392 if ((!x->klass()->is_loaded() || PatchALot)) {
1393 // must do this before locking the destination register as an oop register
1394 patching_info = state_for(x, x->state_before());
1395 }
1396 obj.load_item();
1397 LIR_Opr tmp3 = LIR_OprFact::illegalOpr;
1398 if (!x->klass()->is_loaded() || UseCompressedClassPointers) {
1399 tmp3 = new_register(objectType);
1400 }
1401 __ instanceof(reg, obj.result(), x->klass(),
1402 new_register(objectType), new_register(objectType), tmp3,
1403 x->direct_compare(), patching_info, x->profiled_method(), x->profiled_bci());
1404 }
1405
1406
1407 void LIRGenerator::do_If(If* x) {
1408 assert(x->number_of_sux() == 2, "inconsistency");
1409 ValueTag tag = x->x()->type()->tag();
1410 bool is_safepoint = x->is_safepoint();
1411
1412 If::Condition cond = x->cond();
1413
1414 LIRItem xitem(x->x(), this);
1415 LIRItem yitem(x->y(), this);
1416 LIRItem* xin = &xitem;
1417 LIRItem* yin = &yitem;
1418
1419 if (tag == longTag) {
1420 // for longs, only conditions "eql", "neq", "lss", "geq" are valid;
1421 // mirror for other conditions
1422 if (cond == If::gtr || cond == If::leq) {
1423 cond = Instruction::mirror(cond);
1424 xin = &yitem;
1425 yin = &xitem;
1426 }
1427 xin->set_destroys_register();
1428 }
1429 xin->load_item();
1430 if (tag == longTag && yin->is_constant() && yin->get_jlong_constant() == 0 && (cond == If::eql || cond == If::neq)) {
1431 // inline long zero
1432 yin->dont_load_item();
1433 } else if (tag == longTag || tag == floatTag || tag == doubleTag) {
1434 // longs cannot handle constants at right side
1435 yin->load_item();
1436 } else {
1437 yin->dont_load_item();
1438 }
1439
1440 LIR_Opr left = xin->result();
1441 LIR_Opr right = yin->result();
1442
1443 set_no_result(x);
1444
1445 // add safepoint before generating condition code so it can be recomputed
1446 if (x->is_safepoint()) {
1447 // increment backedge counter if needed
1448 increment_backedge_counter_conditionally(lir_cond(cond), left, right, state_for(x, x->state_before()),
1449 x->tsux()->bci(), x->fsux()->bci(), x->profiled_bci());
1450 __ safepoint(safepoint_poll_register(), state_for(x, x->state_before()));
1451 }
1452
1453 __ cmp(lir_cond(cond), left, right);
1454 // Generate branch profiling. Profiling code doesn't kill flags.
1455 profile_branch(x, cond);
1456 move_to_phi(x->state());
1457 if (x->x()->type()->is_float_kind()) {
1458 __ branch(lir_cond(cond), right->type(), x->tsux(), x->usux());
1459 } else {
1460 __ branch(lir_cond(cond), right->type(), x->tsux());
1461 }
1462 assert(x->default_sux() == x->fsux(), "wrong destination above");
1463 __ jump(x->default_sux());
1464 }
1465
1466
1467 LIR_Opr LIRGenerator::getThreadPointer() {
1468 #ifdef _LP64
1469 return FrameMap::as_pointer_opr(r15_thread);
1470 #else
1471 LIR_Opr result = new_register(T_INT);
1472 __ get_thread(result);
1473 return result;
1474 #endif //
1475 }
1476
1477 void LIRGenerator::trace_block_entry(BlockBegin* block) {
1478 store_stack_parameter(LIR_OprFact::intConst(block->block_id()), in_ByteSize(0));
1479 LIR_OprList* args = new LIR_OprList();
1480 address func = CAST_FROM_FN_PTR(address, Runtime1::trace_block_entry);
1481 __ call_runtime_leaf(func, LIR_OprFact::illegalOpr, LIR_OprFact::illegalOpr, args);
1482 }
1483
1484
1485 void LIRGenerator::volatile_field_store(LIR_Opr value, LIR_Address* address,
1486 CodeEmitInfo* info) {
1487 if (address->type() == T_LONG) {
1488 address = new LIR_Address(address->base(),
1489 address->index(), address->scale(),
1490 address->disp(), T_DOUBLE);
1491 // Transfer the value atomically by using FP moves. This means
1492 // the value has to be moved between CPU and FPU registers. It
1493 // always has to be moved through spill slot since there's no
1494 // quick way to pack the value into an SSE register.
1495 LIR_Opr temp_double = new_register(T_DOUBLE);
1496 LIR_Opr spill = new_register(T_LONG);
1497 set_vreg_flag(spill, must_start_in_memory);
1498 __ move(value, spill);
1499 __ volatile_move(spill, temp_double, T_LONG);
1500 __ volatile_move(temp_double, LIR_OprFact::address(address), T_LONG, info);
1501 } else {
1502 __ store(value, address, info);
1503 }
1504 }
1505
1506 void LIRGenerator::volatile_field_load(LIR_Address* address, LIR_Opr result,
1507 CodeEmitInfo* info) {
1508 if (address->type() == T_LONG) {
1509 address = new LIR_Address(address->base(),
1510 address->index(), address->scale(),
1511 address->disp(), T_DOUBLE);
1512 // Transfer the value atomically by using FP moves. This means
1513 // the value has to be moved between CPU and FPU registers. In
1514 // SSE0 and SSE1 mode it has to be moved through spill slot but in
1515 // SSE2+ mode it can be moved directly.
1516 LIR_Opr temp_double = new_register(T_DOUBLE);
1517 __ volatile_move(LIR_OprFact::address(address), temp_double, T_LONG, info);
1518 __ volatile_move(temp_double, result, T_LONG);
1519 if (UseSSE < 2) {
1520 // no spill slot needed in SSE2 mode because xmm->cpu register move is possible
1521 set_vreg_flag(result, must_start_in_memory);
1522 }
1523 } else {
1524 __ load(address, result, info);
1525 }
1526 }