1 /*
2 * Copyright (c) 1997, 2018, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "memory/allocation.inline.hpp"
27 #include "opto/addnode.hpp"
28 #include "opto/connode.hpp"
29 #include "opto/convertnode.hpp"
30 #include "opto/memnode.hpp"
31 #include "opto/mulnode.hpp"
32 #include "opto/phaseX.hpp"
33 #include "opto/subnode.hpp"
34 #include "utilities/macros.hpp"
35 #if INCLUDE_SHENANDOAHGC
36 #include "gc/shenandoah/c2/shenandoahBarrierSetC2.hpp"
37 #endif
38
39 // Portions of code courtesy of Clifford Click
40
41
42 //=============================================================================
43 //------------------------------hash-------------------------------------------
44 // Hash function over MulNodes. Needs to be commutative; i.e., I swap
45 // (commute) inputs to MulNodes willy-nilly so the hash function must return
46 // the same value in the presence of edge swapping.
47 uint MulNode::hash() const {
48 return (uintptr_t)in(1) + (uintptr_t)in(2) + Opcode();
49 }
50
51 //------------------------------Identity---------------------------------------
52 // Multiplying a one preserves the other argument
53 Node* MulNode::Identity(PhaseGVN* phase) {
54 register const Type *one = mul_id(); // The multiplicative identity
55 if( phase->type( in(1) )->higher_equal( one ) ) return in(2);
56 if( phase->type( in(2) )->higher_equal( one ) ) return in(1);
57
58 return this;
59 }
60
61 //------------------------------Ideal------------------------------------------
62 // We also canonicalize the Node, moving constants to the right input,
63 // and flatten expressions (so that 1+x+2 becomes x+3).
64 Node *MulNode::Ideal(PhaseGVN *phase, bool can_reshape) {
65 const Type *t1 = phase->type( in(1) );
66 const Type *t2 = phase->type( in(2) );
67 Node *progress = NULL; // Progress flag
68 // We are OK if right is a constant, or right is a load and
69 // left is a non-constant.
70 if( !(t2->singleton() ||
71 (in(2)->is_Load() && !(t1->singleton() || in(1)->is_Load())) ) ) {
72 if( t1->singleton() || // Left input is a constant?
73 // Otherwise, sort inputs (commutativity) to help value numbering.
74 (in(1)->_idx > in(2)->_idx) ) {
75 swap_edges(1, 2);
76 const Type *t = t1;
77 t1 = t2;
78 t2 = t;
79 progress = this; // Made progress
80 }
81 }
82
83 // If the right input is a constant, and the left input is a product of a
84 // constant, flatten the expression tree.
85 uint op = Opcode();
86 if( t2->singleton() && // Right input is a constant?
87 op != Op_MulF && // Float & double cannot reassociate
88 op != Op_MulD ) {
89 if( t2 == Type::TOP ) return NULL;
90 Node *mul1 = in(1);
91 #ifdef ASSERT
92 // Check for dead loop
93 int op1 = mul1->Opcode();
94 if( phase->eqv( mul1, this ) || phase->eqv( in(2), this ) ||
95 ( ( op1 == mul_opcode() || op1 == add_opcode() ) &&
96 ( phase->eqv( mul1->in(1), this ) || phase->eqv( mul1->in(2), this ) ||
97 phase->eqv( mul1->in(1), mul1 ) || phase->eqv( mul1->in(2), mul1 ) ) ) )
98 assert(false, "dead loop in MulNode::Ideal");
99 #endif
100
101 if( mul1->Opcode() == mul_opcode() ) { // Left input is a multiply?
102 // Mul of a constant?
103 const Type *t12 = phase->type( mul1->in(2) );
104 if( t12->singleton() && t12 != Type::TOP) { // Left input is an add of a constant?
105 // Compute new constant; check for overflow
106 const Type *tcon01 = ((MulNode*)mul1)->mul_ring(t2,t12);
107 if( tcon01->singleton() ) {
108 // The Mul of the flattened expression
109 set_req(1, mul1->in(1));
110 set_req(2, phase->makecon( tcon01 ));
111 t2 = tcon01;
112 progress = this; // Made progress
113 }
114 }
115 }
116 // If the right input is a constant, and the left input is an add of a
117 // constant, flatten the tree: (X+con1)*con0 ==> X*con0 + con1*con0
118 const Node *add1 = in(1);
119 if( add1->Opcode() == add_opcode() ) { // Left input is an add?
120 // Add of a constant?
121 const Type *t12 = phase->type( add1->in(2) );
122 if( t12->singleton() && t12 != Type::TOP ) { // Left input is an add of a constant?
123 assert( add1->in(1) != add1, "dead loop in MulNode::Ideal" );
124 // Compute new constant; check for overflow
125 const Type *tcon01 = mul_ring(t2,t12);
126 if( tcon01->singleton() ) {
127
128 // Convert (X+con1)*con0 into X*con0
129 Node *mul = clone(); // mul = ()*con0
130 mul->set_req(1,add1->in(1)); // mul = X*con0
131 mul = phase->transform(mul);
132
133 Node *add2 = add1->clone();
134 add2->set_req(1, mul); // X*con0 + con0*con1
135 add2->set_req(2, phase->makecon(tcon01) );
136 progress = add2;
137 }
138 }
139 } // End of is left input an add
140 } // End of is right input a Mul
141
142 return progress;
143 }
144
145 //------------------------------Value-----------------------------------------
146 const Type* MulNode::Value(PhaseGVN* phase) const {
147 const Type *t1 = phase->type( in(1) );
148 const Type *t2 = phase->type( in(2) );
149 // Either input is TOP ==> the result is TOP
150 if( t1 == Type::TOP ) return Type::TOP;
151 if( t2 == Type::TOP ) return Type::TOP;
152
153 // Either input is ZERO ==> the result is ZERO.
154 // Not valid for floats or doubles since +0.0 * -0.0 --> +0.0
155 int op = Opcode();
156 if( op == Op_MulI || op == Op_AndI || op == Op_MulL || op == Op_AndL ) {
157 const Type *zero = add_id(); // The multiplicative zero
158 if( t1->higher_equal( zero ) ) return zero;
159 if( t2->higher_equal( zero ) ) return zero;
160 }
161
162 // Either input is BOTTOM ==> the result is the local BOTTOM
163 if( t1 == Type::BOTTOM || t2 == Type::BOTTOM )
164 return bottom_type();
165
166 #if defined(IA32)
167 // Can't trust native compilers to properly fold strict double
168 // multiplication with round-to-zero on this platform.
169 if (op == Op_MulD && phase->C->method()->is_strict()) {
170 return TypeD::DOUBLE;
171 }
172 #endif
173
174 return mul_ring(t1,t2); // Local flavor of type multiplication
175 }
176
177 //=============================================================================
178 //------------------------------Ideal------------------------------------------
179 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
180 Node *MulINode::Ideal(PhaseGVN *phase, bool can_reshape) {
181 // Swap constant to right
182 jint con;
183 if ((con = in(1)->find_int_con(0)) != 0) {
184 swap_edges(1, 2);
185 // Finish rest of method to use info in 'con'
186 } else if ((con = in(2)->find_int_con(0)) == 0) {
187 return MulNode::Ideal(phase, can_reshape);
188 }
189
190 // Now we have a constant Node on the right and the constant in con
191 if (con == 0) return NULL; // By zero is handled by Value call
192 if (con == 1) return NULL; // By one is handled by Identity call
193
194 // Check for negative constant; if so negate the final result
195 bool sign_flip = false;
196
197 unsigned int abs_con = uabs(con);
198 if (abs_con != (unsigned int)con) {
199 sign_flip = true;
200 }
201
202 // Get low bit; check for being the only bit
203 Node *res = NULL;
204 unsigned int bit1 = abs_con & (0-abs_con); // Extract low bit
205 if (bit1 == abs_con) { // Found a power of 2?
206 res = new LShiftINode(in(1), phase->intcon(log2_uint(bit1)));
207 } else {
208
209 // Check for constant with 2 bits set
210 unsigned int bit2 = abs_con-bit1;
211 bit2 = bit2 & (0-bit2); // Extract 2nd bit
212 if (bit2 + bit1 == abs_con) { // Found all bits in con?
213 Node *n1 = phase->transform( new LShiftINode(in(1), phase->intcon(log2_uint(bit1))));
214 Node *n2 = phase->transform( new LShiftINode(in(1), phase->intcon(log2_uint(bit2))));
215 res = new AddINode(n2, n1);
216
217 } else if (is_power_of_2(abs_con+1)) {
218 // Sleezy: power-of-2 -1. Next time be generic.
219 unsigned int temp = abs_con + 1;
220 Node *n1 = phase->transform(new LShiftINode(in(1), phase->intcon(log2_uint(temp))));
221 res = new SubINode(n1, in(1));
222 } else {
223 return MulNode::Ideal(phase, can_reshape);
224 }
225 }
226
227 if (sign_flip) { // Need to negate result?
228 res = phase->transform(res);// Transform, before making the zero con
229 res = new SubINode(phase->intcon(0),res);
230 }
231
232 return res; // Return final result
233 }
234
235 //------------------------------mul_ring---------------------------------------
236 // Compute the product type of two integer ranges into this node.
237 const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const {
238 const TypeInt *r0 = t0->is_int(); // Handy access
239 const TypeInt *r1 = t1->is_int();
240
241 // Fetch endpoints of all ranges
242 jint lo0 = r0->_lo;
243 double a = (double)lo0;
244 jint hi0 = r0->_hi;
245 double b = (double)hi0;
246 jint lo1 = r1->_lo;
247 double c = (double)lo1;
248 jint hi1 = r1->_hi;
249 double d = (double)hi1;
250
251 // Compute all endpoints & check for overflow
252 int32_t A = java_multiply(lo0, lo1);
253 if( (double)A != a*c ) return TypeInt::INT; // Overflow?
254 int32_t B = java_multiply(lo0, hi1);
255 if( (double)B != a*d ) return TypeInt::INT; // Overflow?
256 int32_t C = java_multiply(hi0, lo1);
257 if( (double)C != b*c ) return TypeInt::INT; // Overflow?
258 int32_t D = java_multiply(hi0, hi1);
259 if( (double)D != b*d ) return TypeInt::INT; // Overflow?
260
261 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
262 else { lo0 = B; hi0 = A; }
263 if( C < D ) {
264 if( C < lo0 ) lo0 = C;
265 if( D > hi0 ) hi0 = D;
266 } else {
267 if( D < lo0 ) lo0 = D;
268 if( C > hi0 ) hi0 = C;
269 }
270 return TypeInt::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
271 }
272
273
274 //=============================================================================
275 //------------------------------Ideal------------------------------------------
276 // Check for power-of-2 multiply, then try the regular MulNode::Ideal
277 Node *MulLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
278 // Swap constant to right
279 jlong con;
280 if ((con = in(1)->find_long_con(0)) != 0) {
281 swap_edges(1, 2);
282 // Finish rest of method to use info in 'con'
283 } else if ((con = in(2)->find_long_con(0)) == 0) {
284 return MulNode::Ideal(phase, can_reshape);
285 }
286
287 // Now we have a constant Node on the right and the constant in con
288 if (con == CONST64(0)) return NULL; // By zero is handled by Value call
289 if (con == CONST64(1)) return NULL; // By one is handled by Identity call
290
291 // Check for negative constant; if so negate the final result
292 bool sign_flip = false;
293 julong abs_con = uabs(con);
294 if (abs_con != (julong)con) {
295 sign_flip = true;
296 }
297
298 // Get low bit; check for being the only bit
299 Node *res = NULL;
300 julong bit1 = abs_con & (0-abs_con); // Extract low bit
301 if (bit1 == abs_con) { // Found a power of 2?
302 res = new LShiftLNode(in(1), phase->intcon(log2_long(bit1)));
303 } else {
304
305 // Check for constant with 2 bits set
306 julong bit2 = abs_con-bit1;
307 bit2 = bit2 & (0-bit2); // Extract 2nd bit
308 if (bit2 + bit1 == abs_con) { // Found all bits in con?
309 Node *n1 = phase->transform(new LShiftLNode(in(1), phase->intcon(log2_long(bit1))));
310 Node *n2 = phase->transform(new LShiftLNode(in(1), phase->intcon(log2_long(bit2))));
311 res = new AddLNode(n2, n1);
312
313 } else if (is_power_of_2_long(abs_con+1)) {
314 // Sleezy: power-of-2 -1. Next time be generic.
315 julong temp = abs_con + 1;
316 Node *n1 = phase->transform( new LShiftLNode(in(1), phase->intcon(log2_long(temp))));
317 res = new SubLNode(n1, in(1));
318 } else {
319 return MulNode::Ideal(phase, can_reshape);
320 }
321 }
322
323 if (sign_flip) { // Need to negate result?
324 res = phase->transform(res);// Transform, before making the zero con
325 res = new SubLNode(phase->longcon(0),res);
326 }
327
328 return res; // Return final result
329 }
330
331 //------------------------------mul_ring---------------------------------------
332 // Compute the product type of two integer ranges into this node.
333 const Type *MulLNode::mul_ring(const Type *t0, const Type *t1) const {
334 const TypeLong *r0 = t0->is_long(); // Handy access
335 const TypeLong *r1 = t1->is_long();
336
337 // Fetch endpoints of all ranges
338 jlong lo0 = r0->_lo;
339 double a = (double)lo0;
340 jlong hi0 = r0->_hi;
341 double b = (double)hi0;
342 jlong lo1 = r1->_lo;
343 double c = (double)lo1;
344 jlong hi1 = r1->_hi;
345 double d = (double)hi1;
346
347 // Compute all endpoints & check for overflow
348 jlong A = java_multiply(lo0, lo1);
349 if( (double)A != a*c ) return TypeLong::LONG; // Overflow?
350 jlong B = java_multiply(lo0, hi1);
351 if( (double)B != a*d ) return TypeLong::LONG; // Overflow?
352 jlong C = java_multiply(hi0, lo1);
353 if( (double)C != b*c ) return TypeLong::LONG; // Overflow?
354 jlong D = java_multiply(hi0, hi1);
355 if( (double)D != b*d ) return TypeLong::LONG; // Overflow?
356
357 if( A < B ) { lo0 = A; hi0 = B; } // Sort range endpoints
358 else { lo0 = B; hi0 = A; }
359 if( C < D ) {
360 if( C < lo0 ) lo0 = C;
361 if( D > hi0 ) hi0 = D;
362 } else {
363 if( D < lo0 ) lo0 = D;
364 if( C > hi0 ) hi0 = C;
365 }
366 return TypeLong::make(lo0, hi0, MAX2(r0->_widen,r1->_widen));
367 }
368
369 //=============================================================================
370 //------------------------------mul_ring---------------------------------------
371 // Compute the product type of two double ranges into this node.
372 const Type *MulFNode::mul_ring(const Type *t0, const Type *t1) const {
373 if( t0 == Type::FLOAT || t1 == Type::FLOAT ) return Type::FLOAT;
374 return TypeF::make( t0->getf() * t1->getf() );
375 }
376
377 //=============================================================================
378 //------------------------------mul_ring---------------------------------------
379 // Compute the product type of two double ranges into this node.
380 const Type *MulDNode::mul_ring(const Type *t0, const Type *t1) const {
381 if( t0 == Type::DOUBLE || t1 == Type::DOUBLE ) return Type::DOUBLE;
382 // We must be multiplying 2 double constants.
383 return TypeD::make( t0->getd() * t1->getd() );
384 }
385
386 //=============================================================================
387 //------------------------------Value------------------------------------------
388 const Type* MulHiLNode::Value(PhaseGVN* phase) const {
389 // Either input is TOP ==> the result is TOP
390 const Type *t1 = phase->type( in(1) );
391 const Type *t2 = phase->type( in(2) );
392 if( t1 == Type::TOP ) return Type::TOP;
393 if( t2 == Type::TOP ) return Type::TOP;
394
395 // Either input is BOTTOM ==> the result is the local BOTTOM
396 const Type *bot = bottom_type();
397 if( (t1 == bot) || (t2 == bot) ||
398 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
399 return bot;
400
401 // It is not worth trying to constant fold this stuff!
402 return TypeLong::LONG;
403 }
404
405 //=============================================================================
406 //------------------------------mul_ring---------------------------------------
407 // Supplied function returns the product of the inputs IN THE CURRENT RING.
408 // For the logical operations the ring's MUL is really a logical AND function.
409 // This also type-checks the inputs for sanity. Guaranteed never to
410 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
411 const Type *AndINode::mul_ring( const Type *t0, const Type *t1 ) const {
412 const TypeInt *r0 = t0->is_int(); // Handy access
413 const TypeInt *r1 = t1->is_int();
414 int widen = MAX2(r0->_widen,r1->_widen);
415
416 // If either input is a constant, might be able to trim cases
417 if( !r0->is_con() && !r1->is_con() )
418 return TypeInt::INT; // No constants to be had
419
420 // Both constants? Return bits
421 if( r0->is_con() && r1->is_con() )
422 return TypeInt::make( r0->get_con() & r1->get_con() );
423
424 if( r0->is_con() && r0->get_con() > 0 )
425 return TypeInt::make(0, r0->get_con(), widen);
426
427 if( r1->is_con() && r1->get_con() > 0 )
428 return TypeInt::make(0, r1->get_con(), widen);
429
430 if( r0 == TypeInt::BOOL || r1 == TypeInt::BOOL ) {
431 return TypeInt::BOOL;
432 }
433
434 return TypeInt::INT; // No constants to be had
435 }
436
437 //------------------------------Identity---------------------------------------
438 // Masking off the high bits of an unsigned load is not required
439 Node* AndINode::Identity(PhaseGVN* phase) {
440
441 // x & x => x
442 if (phase->eqv(in(1), in(2))) return in(1);
443
444 Node* in1 = in(1);
445 uint op = in1->Opcode();
446 const TypeInt* t2 = phase->type(in(2))->isa_int();
447 if (t2 && t2->is_con()) {
448 int con = t2->get_con();
449 // Masking off high bits which are always zero is useless.
450 const TypeInt* t1 = phase->type( in(1) )->isa_int();
451 if (t1 != NULL && t1->_lo >= 0) {
452 jint t1_support = right_n_bits(1 + log2_jint(t1->_hi));
453 if ((t1_support & con) == t1_support)
454 return in1;
455 }
456 // Masking off the high bits of a unsigned-shift-right is not
457 // needed either.
458 if (op == Op_URShiftI) {
459 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
460 if (t12 && t12->is_con()) { // Shift is by a constant
461 int shift = t12->get_con();
462 shift &= BitsPerJavaInteger - 1; // semantics of Java shifts
463 int mask = max_juint >> shift;
464 if ((mask & con) == mask) // If AND is useless, skip it
465 return in1;
466 }
467 }
468 }
469 return MulNode::Identity(phase);
470 }
471
472 //------------------------------Ideal------------------------------------------
473 Node *AndINode::Ideal(PhaseGVN *phase, bool can_reshape) {
474 // Special case constant AND mask
475 const TypeInt *t2 = phase->type( in(2) )->isa_int();
476 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
477 const int mask = t2->get_con();
478 Node *load = in(1);
479 uint lop = load->Opcode();
480
481 #if INCLUDE_SHENANDOAHGC
482 if (UseShenandoahGC && ShenandoahBarrierC2Support::is_gc_state_load(load)) {
483 // Do not touch the load+mask, we would match the whole sequence exactly.
484 // Converting the load to LoadUB/LoadUS would mismatch and waste a register
485 // on the barrier fastpath.
486 return NULL;
487 }
488 #endif
489
490 // Masking bits off of a Character? Hi bits are already zero.
491 if( lop == Op_LoadUS &&
492 (mask & 0xFFFF0000) ) // Can we make a smaller mask?
493 return new AndINode(load,phase->intcon(mask&0xFFFF));
494
495 // Masking bits off of a Short? Loading a Character does some masking
496 if (can_reshape &&
497 load->outcnt() == 1 && load->unique_out() == this) {
498 if (lop == Op_LoadS && (mask & 0xFFFF0000) == 0 ) {
499 Node* ldus = load->as_Load()->convert_to_unsigned_load(*phase);
500 ldus = phase->transform(ldus);
501 return new AndINode(ldus, phase->intcon(mask & 0xFFFF));
502 }
503
504 // Masking sign bits off of a Byte? Do an unsigned byte load plus
505 // an and.
506 if (lop == Op_LoadB && (mask & 0xFFFFFF00) == 0) {
507 Node* ldub = load->as_Load()->convert_to_unsigned_load(*phase);
508 ldub = phase->transform(ldub);
509 return new AndINode(ldub, phase->intcon(mask));
510 }
511 }
512
513 // Masking off sign bits? Dont make them!
514 if( lop == Op_RShiftI ) {
515 const TypeInt *t12 = phase->type(load->in(2))->isa_int();
516 if( t12 && t12->is_con() ) { // Shift is by a constant
517 int shift = t12->get_con();
518 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
519 const int sign_bits_mask = ~right_n_bits(BitsPerJavaInteger - shift);
520 // If the AND'ing of the 2 masks has no bits, then only original shifted
521 // bits survive. NO sign-extension bits survive the maskings.
522 if( (sign_bits_mask & mask) == 0 ) {
523 // Use zero-fill shift instead
524 Node *zshift = phase->transform(new URShiftINode(load->in(1),load->in(2)));
525 return new AndINode( zshift, in(2) );
526 }
527 }
528 }
529
530 // Check for 'negate/and-1', a pattern emitted when someone asks for
531 // 'mod 2'. Negate leaves the low order bit unchanged (think: complement
532 // plus 1) and the mask is of the low order bit. Skip the negate.
533 if( lop == Op_SubI && mask == 1 && load->in(1) &&
534 phase->type(load->in(1)) == TypeInt::ZERO )
535 return new AndINode( load->in(2), in(2) );
536
537 return MulNode::Ideal(phase, can_reshape);
538 }
539
540 //=============================================================================
541 //------------------------------mul_ring---------------------------------------
542 // Supplied function returns the product of the inputs IN THE CURRENT RING.
543 // For the logical operations the ring's MUL is really a logical AND function.
544 // This also type-checks the inputs for sanity. Guaranteed never to
545 // be passed a TOP or BOTTOM type, these are filtered out by pre-check.
546 const Type *AndLNode::mul_ring( const Type *t0, const Type *t1 ) const {
547 const TypeLong *r0 = t0->is_long(); // Handy access
548 const TypeLong *r1 = t1->is_long();
549 int widen = MAX2(r0->_widen,r1->_widen);
550
551 // If either input is a constant, might be able to trim cases
552 if( !r0->is_con() && !r1->is_con() )
553 return TypeLong::LONG; // No constants to be had
554
555 // Both constants? Return bits
556 if( r0->is_con() && r1->is_con() )
557 return TypeLong::make( r0->get_con() & r1->get_con() );
558
559 if( r0->is_con() && r0->get_con() > 0 )
560 return TypeLong::make(CONST64(0), r0->get_con(), widen);
561
562 if( r1->is_con() && r1->get_con() > 0 )
563 return TypeLong::make(CONST64(0), r1->get_con(), widen);
564
565 return TypeLong::LONG; // No constants to be had
566 }
567
568 //------------------------------Identity---------------------------------------
569 // Masking off the high bits of an unsigned load is not required
570 Node* AndLNode::Identity(PhaseGVN* phase) {
571
572 // x & x => x
573 if (phase->eqv(in(1), in(2))) return in(1);
574
575 Node *usr = in(1);
576 const TypeLong *t2 = phase->type( in(2) )->isa_long();
577 if( t2 && t2->is_con() ) {
578 jlong con = t2->get_con();
579 // Masking off high bits which are always zero is useless.
580 const TypeLong* t1 = phase->type( in(1) )->isa_long();
581 if (t1 != NULL && t1->_lo >= 0) {
582 int bit_count = log2_long(t1->_hi) + 1;
583 jlong t1_support = jlong(max_julong >> (BitsPerJavaLong - bit_count));
584 if ((t1_support & con) == t1_support)
585 return usr;
586 }
587 uint lop = usr->Opcode();
588 // Masking off the high bits of a unsigned-shift-right is not
589 // needed either.
590 if( lop == Op_URShiftL ) {
591 const TypeInt *t12 = phase->type( usr->in(2) )->isa_int();
592 if( t12 && t12->is_con() ) { // Shift is by a constant
593 int shift = t12->get_con();
594 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
595 jlong mask = max_julong >> shift;
596 if( (mask&con) == mask ) // If AND is useless, skip it
597 return usr;
598 }
599 }
600 }
601 return MulNode::Identity(phase);
602 }
603
604 //------------------------------Ideal------------------------------------------
605 Node *AndLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
606 // Special case constant AND mask
607 const TypeLong *t2 = phase->type( in(2) )->isa_long();
608 if( !t2 || !t2->is_con() ) return MulNode::Ideal(phase, can_reshape);
609 const jlong mask = t2->get_con();
610
611 Node* in1 = in(1);
612 uint op = in1->Opcode();
613
614 // Are we masking a long that was converted from an int with a mask
615 // that fits in 32-bits? Commute them and use an AndINode. Don't
616 // convert masks which would cause a sign extension of the integer
617 // value. This check includes UI2L masks (0x00000000FFFFFFFF) which
618 // would be optimized away later in Identity.
619 if (op == Op_ConvI2L && (mask & UCONST64(0xFFFFFFFF80000000)) == 0) {
620 Node* andi = new AndINode(in1->in(1), phase->intcon(mask));
621 andi = phase->transform(andi);
622 return new ConvI2LNode(andi);
623 }
624
625 // Masking off sign bits? Dont make them!
626 if (op == Op_RShiftL) {
627 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
628 if( t12 && t12->is_con() ) { // Shift is by a constant
629 int shift = t12->get_con();
630 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
631 const jlong sign_bits_mask = ~(((jlong)CONST64(1) << (jlong)(BitsPerJavaLong - shift)) -1);
632 // If the AND'ing of the 2 masks has no bits, then only original shifted
633 // bits survive. NO sign-extension bits survive the maskings.
634 if( (sign_bits_mask & mask) == 0 ) {
635 // Use zero-fill shift instead
636 Node *zshift = phase->transform(new URShiftLNode(in1->in(1), in1->in(2)));
637 return new AndLNode(zshift, in(2));
638 }
639 }
640 }
641
642 return MulNode::Ideal(phase, can_reshape);
643 }
644
645 //=============================================================================
646
647 static int getShiftCon(PhaseGVN *phase, Node *shiftNode, int retVal) {
648 const Type *t = phase->type(shiftNode->in(2));
649 if (t == Type::TOP) return retVal; // Right input is dead.
650 const TypeInt *t2 = t->isa_int();
651 if (!t2 || !t2->is_con()) return retVal; // Right input is a constant.
652
653 return t2->get_con();
654 }
655
656 static int maskShiftAmount(PhaseGVN *phase, Node *shiftNode, int nBits) {
657 int shift = getShiftCon(phase, shiftNode, 0);
658 int maskedShift = shift & (nBits - 1);
659
660 if (maskedShift == 0) return 0; // Let Identity() handle 0 shift count.
661
662 if (shift != maskedShift) {
663 shiftNode->set_req(2, phase->intcon(maskedShift)); // Replace shift count with masked value.
664 phase->igvn_rehash_node_delayed(shiftNode);
665 }
666
667 return maskedShift;
668 }
669
670 //------------------------------Identity---------------------------------------
671 Node* LShiftINode::Identity(PhaseGVN* phase) {
672 return ((getShiftCon(phase, this, -1) & (BitsPerJavaInteger - 1)) == 0) ? in(1) : this;
673 }
674
675 //------------------------------Ideal------------------------------------------
676 // If the right input is a constant, and the left input is an add of a
677 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
678 Node *LShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
679 int con = maskShiftAmount(phase, this, BitsPerJavaInteger);
680 if (con == 0) {
681 return NULL;
682 }
683
684 // Left input is an add of a constant?
685 Node *add1 = in(1);
686 int add1_op = add1->Opcode();
687 if( add1_op == Op_AddI ) { // Left input is an add?
688 assert( add1 != add1->in(1), "dead loop in LShiftINode::Ideal" );
689 const TypeInt *t12 = phase->type(add1->in(2))->isa_int();
690 if( t12 && t12->is_con() ){ // Left input is an add of a con?
691 // Transform is legal, but check for profit. Avoid breaking 'i2s'
692 // and 'i2b' patterns which typically fold into 'StoreC/StoreB'.
693 if( con < 16 ) {
694 // Compute X << con0
695 Node *lsh = phase->transform( new LShiftINode( add1->in(1), in(2) ) );
696 // Compute X<<con0 + (con1<<con0)
697 return new AddINode( lsh, phase->intcon(t12->get_con() << con));
698 }
699 }
700 }
701
702 // Check for "(x>>c0)<<c0" which just masks off low bits
703 if( (add1_op == Op_RShiftI || add1_op == Op_URShiftI ) &&
704 add1->in(2) == in(2) )
705 // Convert to "(x & -(1<<c0))"
706 return new AndINode(add1->in(1),phase->intcon( -(1<<con)));
707
708 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
709 if( add1_op == Op_AndI ) {
710 Node *add2 = add1->in(1);
711 int add2_op = add2->Opcode();
712 if( (add2_op == Op_RShiftI || add2_op == Op_URShiftI ) &&
713 add2->in(2) == in(2) ) {
714 // Convert to "(x & (Y<<c0))"
715 Node *y_sh = phase->transform( new LShiftINode( add1->in(2), in(2) ) );
716 return new AndINode( add2->in(1), y_sh );
717 }
718 }
719
720 // Check for ((x & ((1<<(32-c0))-1)) << c0) which ANDs off high bits
721 // before shifting them away.
722 const jint bits_mask = right_n_bits(BitsPerJavaInteger-con);
723 if( add1_op == Op_AndI &&
724 phase->type(add1->in(2)) == TypeInt::make( bits_mask ) )
725 return new LShiftINode( add1->in(1), in(2) );
726
727 return NULL;
728 }
729
730 //------------------------------Value------------------------------------------
731 // A LShiftINode shifts its input2 left by input1 amount.
732 const Type* LShiftINode::Value(PhaseGVN* phase) const {
733 const Type *t1 = phase->type( in(1) );
734 const Type *t2 = phase->type( in(2) );
735 // Either input is TOP ==> the result is TOP
736 if( t1 == Type::TOP ) return Type::TOP;
737 if( t2 == Type::TOP ) return Type::TOP;
738
739 // Left input is ZERO ==> the result is ZERO.
740 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
741 // Shift by zero does nothing
742 if( t2 == TypeInt::ZERO ) return t1;
743
744 // Either input is BOTTOM ==> the result is BOTTOM
745 if( (t1 == TypeInt::INT) || (t2 == TypeInt::INT) ||
746 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
747 return TypeInt::INT;
748
749 const TypeInt *r1 = t1->is_int(); // Handy access
750 const TypeInt *r2 = t2->is_int(); // Handy access
751
752 if (!r2->is_con())
753 return TypeInt::INT;
754
755 uint shift = r2->get_con();
756 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
757 // Shift by a multiple of 32 does nothing:
758 if (shift == 0) return t1;
759
760 // If the shift is a constant, shift the bounds of the type,
761 // unless this could lead to an overflow.
762 if (!r1->is_con()) {
763 jint lo = r1->_lo, hi = r1->_hi;
764 if (((lo << shift) >> shift) == lo &&
765 ((hi << shift) >> shift) == hi) {
766 // No overflow. The range shifts up cleanly.
767 return TypeInt::make((jint)lo << (jint)shift,
768 (jint)hi << (jint)shift,
769 MAX2(r1->_widen,r2->_widen));
770 }
771 return TypeInt::INT;
772 }
773
774 return TypeInt::make( (jint)r1->get_con() << (jint)shift );
775 }
776
777 //=============================================================================
778 //------------------------------Identity---------------------------------------
779 Node* LShiftLNode::Identity(PhaseGVN* phase) {
780 return ((getShiftCon(phase, this, -1) & (BitsPerJavaLong - 1)) == 0) ? in(1) : this;
781 }
782
783 //------------------------------Ideal------------------------------------------
784 // If the right input is a constant, and the left input is an add of a
785 // constant, flatten the tree: (X+con1)<<con0 ==> X<<con0 + con1<<con0
786 Node *LShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
787 int con = maskShiftAmount(phase, this, BitsPerJavaLong);
788 if (con == 0) {
789 return NULL;
790 }
791
792 // Left input is an add of a constant?
793 Node *add1 = in(1);
794 int add1_op = add1->Opcode();
795 if( add1_op == Op_AddL ) { // Left input is an add?
796 // Avoid dead data cycles from dead loops
797 assert( add1 != add1->in(1), "dead loop in LShiftLNode::Ideal" );
798 const TypeLong *t12 = phase->type(add1->in(2))->isa_long();
799 if( t12 && t12->is_con() ){ // Left input is an add of a con?
800 // Compute X << con0
801 Node *lsh = phase->transform( new LShiftLNode( add1->in(1), in(2) ) );
802 // Compute X<<con0 + (con1<<con0)
803 return new AddLNode( lsh, phase->longcon(t12->get_con() << con));
804 }
805 }
806
807 // Check for "(x>>c0)<<c0" which just masks off low bits
808 if( (add1_op == Op_RShiftL || add1_op == Op_URShiftL ) &&
809 add1->in(2) == in(2) )
810 // Convert to "(x & -(1<<c0))"
811 return new AndLNode(add1->in(1),phase->longcon( -(CONST64(1)<<con)));
812
813 // Check for "((x>>c0) & Y)<<c0" which just masks off more low bits
814 if( add1_op == Op_AndL ) {
815 Node *add2 = add1->in(1);
816 int add2_op = add2->Opcode();
817 if( (add2_op == Op_RShiftL || add2_op == Op_URShiftL ) &&
818 add2->in(2) == in(2) ) {
819 // Convert to "(x & (Y<<c0))"
820 Node *y_sh = phase->transform( new LShiftLNode( add1->in(2), in(2) ) );
821 return new AndLNode( add2->in(1), y_sh );
822 }
823 }
824
825 // Check for ((x & ((CONST64(1)<<(64-c0))-1)) << c0) which ANDs off high bits
826 // before shifting them away.
827 const jlong bits_mask = jlong(max_julong >> con);
828 if( add1_op == Op_AndL &&
829 phase->type(add1->in(2)) == TypeLong::make( bits_mask ) )
830 return new LShiftLNode( add1->in(1), in(2) );
831
832 return NULL;
833 }
834
835 //------------------------------Value------------------------------------------
836 // A LShiftLNode shifts its input2 left by input1 amount.
837 const Type* LShiftLNode::Value(PhaseGVN* phase) const {
838 const Type *t1 = phase->type( in(1) );
839 const Type *t2 = phase->type( in(2) );
840 // Either input is TOP ==> the result is TOP
841 if( t1 == Type::TOP ) return Type::TOP;
842 if( t2 == Type::TOP ) return Type::TOP;
843
844 // Left input is ZERO ==> the result is ZERO.
845 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
846 // Shift by zero does nothing
847 if( t2 == TypeInt::ZERO ) return t1;
848
849 // Either input is BOTTOM ==> the result is BOTTOM
850 if( (t1 == TypeLong::LONG) || (t2 == TypeInt::INT) ||
851 (t1 == Type::BOTTOM) || (t2 == Type::BOTTOM) )
852 return TypeLong::LONG;
853
854 const TypeLong *r1 = t1->is_long(); // Handy access
855 const TypeInt *r2 = t2->is_int(); // Handy access
856
857 if (!r2->is_con())
858 return TypeLong::LONG;
859
860 uint shift = r2->get_con();
861 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
862 // Shift by a multiple of 64 does nothing:
863 if (shift == 0) return t1;
864
865 // If the shift is a constant, shift the bounds of the type,
866 // unless this could lead to an overflow.
867 if (!r1->is_con()) {
868 jlong lo = r1->_lo, hi = r1->_hi;
869 if (((lo << shift) >> shift) == lo &&
870 ((hi << shift) >> shift) == hi) {
871 // No overflow. The range shifts up cleanly.
872 return TypeLong::make((jlong)lo << (jint)shift,
873 (jlong)hi << (jint)shift,
874 MAX2(r1->_widen,r2->_widen));
875 }
876 return TypeLong::LONG;
877 }
878
879 return TypeLong::make( (jlong)r1->get_con() << (jint)shift );
880 }
881
882 //=============================================================================
883 //------------------------------Identity---------------------------------------
884 Node* RShiftINode::Identity(PhaseGVN* phase) {
885 int shift = getShiftCon(phase, this, -1);
886 if (shift == -1) return this;
887 if ((shift & (BitsPerJavaInteger - 1)) == 0) return in(1);
888
889 // Check for useless sign-masking
890 if (in(1)->Opcode() == Op_LShiftI &&
891 in(1)->req() == 3 &&
892 in(1)->in(2) == in(2)) {
893 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
894 // Compute masks for which this shifting doesn't change
895 int lo = (-1 << (BitsPerJavaInteger - ((uint)shift)-1)); // FFFF8000
896 int hi = ~lo; // 00007FFF
897 const TypeInt *t11 = phase->type(in(1)->in(1))->isa_int();
898 if (!t11) return this;
899 // Does actual value fit inside of mask?
900 if (lo <= t11->_lo && t11->_hi <= hi) {
901 return in(1)->in(1); // Then shifting is a nop
902 }
903 }
904
905 return this;
906 }
907
908 //------------------------------Ideal------------------------------------------
909 Node *RShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
910 // Inputs may be TOP if they are dead.
911 const TypeInt *t1 = phase->type(in(1))->isa_int();
912 if (!t1) return NULL; // Left input is an integer
913 const TypeInt *t3; // type of in(1).in(2)
914 int shift = maskShiftAmount(phase, this, BitsPerJavaInteger);
915 if (shift == 0) {
916 return NULL;
917 }
918
919 // Check for (x & 0xFF000000) >> 24, whose mask can be made smaller.
920 // Such expressions arise normally from shift chains like (byte)(x >> 24).
921 const Node *mask = in(1);
922 if( mask->Opcode() == Op_AndI &&
923 (t3 = phase->type(mask->in(2))->isa_int()) &&
924 t3->is_con() ) {
925 Node *x = mask->in(1);
926 jint maskbits = t3->get_con();
927 // Convert to "(x >> shift) & (mask >> shift)"
928 Node *shr_nomask = phase->transform( new RShiftINode(mask->in(1), in(2)) );
929 return new AndINode(shr_nomask, phase->intcon( maskbits >> shift));
930 }
931
932 // Check for "(short[i] <<16)>>16" which simply sign-extends
933 const Node *shl = in(1);
934 if( shl->Opcode() != Op_LShiftI ) return NULL;
935
936 if( shift == 16 &&
937 (t3 = phase->type(shl->in(2))->isa_int()) &&
938 t3->is_con(16) ) {
939 Node *ld = shl->in(1);
940 if( ld->Opcode() == Op_LoadS ) {
941 // Sign extension is just useless here. Return a RShiftI of zero instead
942 // returning 'ld' directly. We cannot return an old Node directly as
943 // that is the job of 'Identity' calls and Identity calls only work on
944 // direct inputs ('ld' is an extra Node removed from 'this'). The
945 // combined optimization requires Identity only return direct inputs.
946 set_req(1, ld);
947 set_req(2, phase->intcon(0));
948 return this;
949 }
950 else if( can_reshape &&
951 ld->Opcode() == Op_LoadUS &&
952 ld->outcnt() == 1 && ld->unique_out() == shl)
953 // Replace zero-extension-load with sign-extension-load
954 return ld->as_Load()->convert_to_signed_load(*phase);
955 }
956
957 // Check for "(byte[i] <<24)>>24" which simply sign-extends
958 if( shift == 24 &&
959 (t3 = phase->type(shl->in(2))->isa_int()) &&
960 t3->is_con(24) ) {
961 Node *ld = shl->in(1);
962 if( ld->Opcode() == Op_LoadB ) {
963 // Sign extension is just useless here
964 set_req(1, ld);
965 set_req(2, phase->intcon(0));
966 return this;
967 }
968 }
969
970 return NULL;
971 }
972
973 //------------------------------Value------------------------------------------
974 // A RShiftINode shifts its input2 right by input1 amount.
975 const Type* RShiftINode::Value(PhaseGVN* phase) const {
976 const Type *t1 = phase->type( in(1) );
977 const Type *t2 = phase->type( in(2) );
978 // Either input is TOP ==> the result is TOP
979 if( t1 == Type::TOP ) return Type::TOP;
980 if( t2 == Type::TOP ) return Type::TOP;
981
982 // Left input is ZERO ==> the result is ZERO.
983 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
984 // Shift by zero does nothing
985 if( t2 == TypeInt::ZERO ) return t1;
986
987 // Either input is BOTTOM ==> the result is BOTTOM
988 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
989 return TypeInt::INT;
990
991 if (t2 == TypeInt::INT)
992 return TypeInt::INT;
993
994 const TypeInt *r1 = t1->is_int(); // Handy access
995 const TypeInt *r2 = t2->is_int(); // Handy access
996
997 // If the shift is a constant, just shift the bounds of the type.
998 // For example, if the shift is 31, we just propagate sign bits.
999 if (r2->is_con()) {
1000 uint shift = r2->get_con();
1001 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
1002 // Shift by a multiple of 32 does nothing:
1003 if (shift == 0) return t1;
1004 // Calculate reasonably aggressive bounds for the result.
1005 // This is necessary if we are to correctly type things
1006 // like (x<<24>>24) == ((byte)x).
1007 jint lo = (jint)r1->_lo >> (jint)shift;
1008 jint hi = (jint)r1->_hi >> (jint)shift;
1009 assert(lo <= hi, "must have valid bounds");
1010 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1011 #ifdef ASSERT
1012 // Make sure we get the sign-capture idiom correct.
1013 if (shift == BitsPerJavaInteger-1) {
1014 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>31 of + is 0");
1015 if (r1->_hi < 0) assert(ti == TypeInt::MINUS_1, ">>31 of - is -1");
1016 }
1017 #endif
1018 return ti;
1019 }
1020
1021 if( !r1->is_con() || !r2->is_con() )
1022 return TypeInt::INT;
1023
1024 // Signed shift right
1025 return TypeInt::make( r1->get_con() >> (r2->get_con()&31) );
1026 }
1027
1028 //=============================================================================
1029 //------------------------------Identity---------------------------------------
1030 Node* RShiftLNode::Identity(PhaseGVN* phase) {
1031 const TypeInt *ti = phase->type(in(2))->isa_int(); // Shift count is an int.
1032 return (ti && ti->is_con() && (ti->get_con() & (BitsPerJavaLong - 1)) == 0) ? in(1) : this;
1033 }
1034
1035 //------------------------------Value------------------------------------------
1036 // A RShiftLNode shifts its input2 right by input1 amount.
1037 const Type* RShiftLNode::Value(PhaseGVN* phase) const {
1038 const Type *t1 = phase->type( in(1) );
1039 const Type *t2 = phase->type( in(2) );
1040 // Either input is TOP ==> the result is TOP
1041 if( t1 == Type::TOP ) return Type::TOP;
1042 if( t2 == Type::TOP ) return Type::TOP;
1043
1044 // Left input is ZERO ==> the result is ZERO.
1045 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1046 // Shift by zero does nothing
1047 if( t2 == TypeInt::ZERO ) return t1;
1048
1049 // Either input is BOTTOM ==> the result is BOTTOM
1050 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1051 return TypeLong::LONG;
1052
1053 if (t2 == TypeInt::INT)
1054 return TypeLong::LONG;
1055
1056 const TypeLong *r1 = t1->is_long(); // Handy access
1057 const TypeInt *r2 = t2->is_int (); // Handy access
1058
1059 // If the shift is a constant, just shift the bounds of the type.
1060 // For example, if the shift is 63, we just propagate sign bits.
1061 if (r2->is_con()) {
1062 uint shift = r2->get_con();
1063 shift &= (2*BitsPerJavaInteger)-1; // semantics of Java shifts
1064 // Shift by a multiple of 64 does nothing:
1065 if (shift == 0) return t1;
1066 // Calculate reasonably aggressive bounds for the result.
1067 // This is necessary if we are to correctly type things
1068 // like (x<<24>>24) == ((byte)x).
1069 jlong lo = (jlong)r1->_lo >> (jlong)shift;
1070 jlong hi = (jlong)r1->_hi >> (jlong)shift;
1071 assert(lo <= hi, "must have valid bounds");
1072 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1073 #ifdef ASSERT
1074 // Make sure we get the sign-capture idiom correct.
1075 if (shift == (2*BitsPerJavaInteger)-1) {
1076 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>63 of + is 0");
1077 if (r1->_hi < 0) assert(tl == TypeLong::MINUS_1, ">>63 of - is -1");
1078 }
1079 #endif
1080 return tl;
1081 }
1082
1083 return TypeLong::LONG; // Give up
1084 }
1085
1086 //=============================================================================
1087 //------------------------------Identity---------------------------------------
1088 Node* URShiftINode::Identity(PhaseGVN* phase) {
1089 int shift = getShiftCon(phase, this, -1);
1090 if ((shift & (BitsPerJavaInteger - 1)) == 0) return in(1);
1091
1092 // Check for "((x << LogBytesPerWord) + (wordSize-1)) >> LogBytesPerWord" which is just "x".
1093 // Happens during new-array length computation.
1094 // Safe if 'x' is in the range [0..(max_int>>LogBytesPerWord)]
1095 Node *add = in(1);
1096 if (add->Opcode() == Op_AddI) {
1097 const TypeInt *t2 = phase->type(add->in(2))->isa_int();
1098 if (t2 && t2->is_con(wordSize - 1) &&
1099 add->in(1)->Opcode() == Op_LShiftI) {
1100 // Check that shift_counts are LogBytesPerWord.
1101 Node *lshift_count = add->in(1)->in(2);
1102 const TypeInt *t_lshift_count = phase->type(lshift_count)->isa_int();
1103 if (t_lshift_count && t_lshift_count->is_con(LogBytesPerWord) &&
1104 t_lshift_count == phase->type(in(2))) {
1105 Node *x = add->in(1)->in(1);
1106 const TypeInt *t_x = phase->type(x)->isa_int();
1107 if (t_x != NULL && 0 <= t_x->_lo && t_x->_hi <= (max_jint>>LogBytesPerWord)) {
1108 return x;
1109 }
1110 }
1111 }
1112 }
1113
1114 return (phase->type(in(2))->higher_equal(TypeInt::ZERO)) ? in(1) : this;
1115 }
1116
1117 //------------------------------Ideal------------------------------------------
1118 Node *URShiftINode::Ideal(PhaseGVN *phase, bool can_reshape) {
1119 int con = maskShiftAmount(phase, this, BitsPerJavaInteger);
1120 if (con == 0) {
1121 return NULL;
1122 }
1123
1124 // We'll be wanting the right-shift amount as a mask of that many bits
1125 const int mask = right_n_bits(BitsPerJavaInteger - con);
1126
1127 int in1_op = in(1)->Opcode();
1128
1129 // Check for ((x>>>a)>>>b) and replace with (x>>>(a+b)) when a+b < 32
1130 if( in1_op == Op_URShiftI ) {
1131 const TypeInt *t12 = phase->type( in(1)->in(2) )->isa_int();
1132 if( t12 && t12->is_con() ) { // Right input is a constant
1133 assert( in(1) != in(1)->in(1), "dead loop in URShiftINode::Ideal" );
1134 const int con2 = t12->get_con() & 31; // Shift count is always masked
1135 const int con3 = con+con2;
1136 if( con3 < 32 ) // Only merge shifts if total is < 32
1137 return new URShiftINode( in(1)->in(1), phase->intcon(con3) );
1138 }
1139 }
1140
1141 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
1142 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1143 // If Q is "X << z" the rounding is useless. Look for patterns like
1144 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
1145 Node *add = in(1);
1146 const TypeInt *t2 = phase->type(in(2))->isa_int();
1147 if (in1_op == Op_AddI) {
1148 Node *lshl = add->in(1);
1149 if( lshl->Opcode() == Op_LShiftI &&
1150 phase->type(lshl->in(2)) == t2 ) {
1151 Node *y_z = phase->transform( new URShiftINode(add->in(2),in(2)) );
1152 Node *sum = phase->transform( new AddINode( lshl->in(1), y_z ) );
1153 return new AndINode( sum, phase->intcon(mask) );
1154 }
1155 }
1156
1157 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
1158 // This shortens the mask. Also, if we are extracting a high byte and
1159 // storing it to a buffer, the mask will be removed completely.
1160 Node *andi = in(1);
1161 if( in1_op == Op_AndI ) {
1162 const TypeInt *t3 = phase->type( andi->in(2) )->isa_int();
1163 if( t3 && t3->is_con() ) { // Right input is a constant
1164 jint mask2 = t3->get_con();
1165 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
1166 Node *newshr = phase->transform( new URShiftINode(andi->in(1), in(2)) );
1167 return new AndINode(newshr, phase->intcon(mask2));
1168 // The negative values are easier to materialize than positive ones.
1169 // A typical case from address arithmetic is ((x & ~15) >> 4).
1170 // It's better to change that to ((x >> 4) & ~0) versus
1171 // ((x >> 4) & 0x0FFFFFFF). The difference is greatest in LP64.
1172 }
1173 }
1174
1175 // Check for "(X << z ) >>> z" which simply zero-extends
1176 Node *shl = in(1);
1177 if( in1_op == Op_LShiftI &&
1178 phase->type(shl->in(2)) == t2 )
1179 return new AndINode( shl->in(1), phase->intcon(mask) );
1180
1181 return NULL;
1182 }
1183
1184 //------------------------------Value------------------------------------------
1185 // A URShiftINode shifts its input2 right by input1 amount.
1186 const Type* URShiftINode::Value(PhaseGVN* phase) const {
1187 // (This is a near clone of RShiftINode::Value.)
1188 const Type *t1 = phase->type( in(1) );
1189 const Type *t2 = phase->type( in(2) );
1190 // Either input is TOP ==> the result is TOP
1191 if( t1 == Type::TOP ) return Type::TOP;
1192 if( t2 == Type::TOP ) return Type::TOP;
1193
1194 // Left input is ZERO ==> the result is ZERO.
1195 if( t1 == TypeInt::ZERO ) return TypeInt::ZERO;
1196 // Shift by zero does nothing
1197 if( t2 == TypeInt::ZERO ) return t1;
1198
1199 // Either input is BOTTOM ==> the result is BOTTOM
1200 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1201 return TypeInt::INT;
1202
1203 if (t2 == TypeInt::INT)
1204 return TypeInt::INT;
1205
1206 const TypeInt *r1 = t1->is_int(); // Handy access
1207 const TypeInt *r2 = t2->is_int(); // Handy access
1208
1209 if (r2->is_con()) {
1210 uint shift = r2->get_con();
1211 shift &= BitsPerJavaInteger-1; // semantics of Java shifts
1212 // Shift by a multiple of 32 does nothing:
1213 if (shift == 0) return t1;
1214 // Calculate reasonably aggressive bounds for the result.
1215 jint lo = (juint)r1->_lo >> (juint)shift;
1216 jint hi = (juint)r1->_hi >> (juint)shift;
1217 if (r1->_hi >= 0 && r1->_lo < 0) {
1218 // If the type has both negative and positive values,
1219 // there are two separate sub-domains to worry about:
1220 // The positive half and the negative half.
1221 jint neg_lo = lo;
1222 jint neg_hi = (juint)-1 >> (juint)shift;
1223 jint pos_lo = (juint) 0 >> (juint)shift;
1224 jint pos_hi = hi;
1225 lo = MIN2(neg_lo, pos_lo); // == 0
1226 hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
1227 }
1228 assert(lo <= hi, "must have valid bounds");
1229 const TypeInt* ti = TypeInt::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1230 #ifdef ASSERT
1231 // Make sure we get the sign-capture idiom correct.
1232 if (shift == BitsPerJavaInteger-1) {
1233 if (r1->_lo >= 0) assert(ti == TypeInt::ZERO, ">>>31 of + is 0");
1234 if (r1->_hi < 0) assert(ti == TypeInt::ONE, ">>>31 of - is +1");
1235 }
1236 #endif
1237 return ti;
1238 }
1239
1240 //
1241 // Do not support shifted oops in info for GC
1242 //
1243 // else if( t1->base() == Type::InstPtr ) {
1244 //
1245 // const TypeInstPtr *o = t1->is_instptr();
1246 // if( t1->singleton() )
1247 // return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1248 // }
1249 // else if( t1->base() == Type::KlassPtr ) {
1250 // const TypeKlassPtr *o = t1->is_klassptr();
1251 // if( t1->singleton() )
1252 // return TypeInt::make( ((uint32_t)o->const_oop() + o->_offset) >> shift );
1253 // }
1254
1255 return TypeInt::INT;
1256 }
1257
1258 //=============================================================================
1259 //------------------------------Identity---------------------------------------
1260 Node* URShiftLNode::Identity(PhaseGVN* phase) {
1261 return ((getShiftCon(phase, this, -1) & (BitsPerJavaLong - 1)) == 0) ? in(1) : this;
1262 }
1263
1264 //------------------------------Ideal------------------------------------------
1265 Node *URShiftLNode::Ideal(PhaseGVN *phase, bool can_reshape) {
1266 int con = maskShiftAmount(phase, this, BitsPerJavaLong);
1267 if (con == 0) {
1268 return NULL;
1269 }
1270
1271 // We'll be wanting the right-shift amount as a mask of that many bits
1272 const jlong mask = jlong(max_julong >> con);
1273
1274 // Check for ((x << z) + Y) >>> z. Replace with x + con>>>z
1275 // The idiom for rounding to a power of 2 is "(Q+(2^z-1)) >>> z".
1276 // If Q is "X << z" the rounding is useless. Look for patterns like
1277 // ((X<<Z) + Y) >>> Z and replace with (X + Y>>>Z) & Z-mask.
1278 Node *add = in(1);
1279 const TypeInt *t2 = phase->type(in(2))->isa_int();
1280 if (add->Opcode() == Op_AddL) {
1281 Node *lshl = add->in(1);
1282 if( lshl->Opcode() == Op_LShiftL &&
1283 phase->type(lshl->in(2)) == t2 ) {
1284 Node *y_z = phase->transform( new URShiftLNode(add->in(2),in(2)) );
1285 Node *sum = phase->transform( new AddLNode( lshl->in(1), y_z ) );
1286 return new AndLNode( sum, phase->longcon(mask) );
1287 }
1288 }
1289
1290 // Check for (x & mask) >>> z. Replace with (x >>> z) & (mask >>> z)
1291 // This shortens the mask. Also, if we are extracting a high byte and
1292 // storing it to a buffer, the mask will be removed completely.
1293 Node *andi = in(1);
1294 if( andi->Opcode() == Op_AndL ) {
1295 const TypeLong *t3 = phase->type( andi->in(2) )->isa_long();
1296 if( t3 && t3->is_con() ) { // Right input is a constant
1297 jlong mask2 = t3->get_con();
1298 mask2 >>= con; // *signed* shift downward (high-order zeroes do not help)
1299 Node *newshr = phase->transform( new URShiftLNode(andi->in(1), in(2)) );
1300 return new AndLNode(newshr, phase->longcon(mask2));
1301 }
1302 }
1303
1304 // Check for "(X << z ) >>> z" which simply zero-extends
1305 Node *shl = in(1);
1306 if( shl->Opcode() == Op_LShiftL &&
1307 phase->type(shl->in(2)) == t2 )
1308 return new AndLNode( shl->in(1), phase->longcon(mask) );
1309
1310 return NULL;
1311 }
1312
1313 //------------------------------Value------------------------------------------
1314 // A URShiftINode shifts its input2 right by input1 amount.
1315 const Type* URShiftLNode::Value(PhaseGVN* phase) const {
1316 // (This is a near clone of RShiftLNode::Value.)
1317 const Type *t1 = phase->type( in(1) );
1318 const Type *t2 = phase->type( in(2) );
1319 // Either input is TOP ==> the result is TOP
1320 if( t1 == Type::TOP ) return Type::TOP;
1321 if( t2 == Type::TOP ) return Type::TOP;
1322
1323 // Left input is ZERO ==> the result is ZERO.
1324 if( t1 == TypeLong::ZERO ) return TypeLong::ZERO;
1325 // Shift by zero does nothing
1326 if( t2 == TypeInt::ZERO ) return t1;
1327
1328 // Either input is BOTTOM ==> the result is BOTTOM
1329 if (t1 == Type::BOTTOM || t2 == Type::BOTTOM)
1330 return TypeLong::LONG;
1331
1332 if (t2 == TypeInt::INT)
1333 return TypeLong::LONG;
1334
1335 const TypeLong *r1 = t1->is_long(); // Handy access
1336 const TypeInt *r2 = t2->is_int (); // Handy access
1337
1338 if (r2->is_con()) {
1339 uint shift = r2->get_con();
1340 shift &= BitsPerJavaLong - 1; // semantics of Java shifts
1341 // Shift by a multiple of 64 does nothing:
1342 if (shift == 0) return t1;
1343 // Calculate reasonably aggressive bounds for the result.
1344 jlong lo = (julong)r1->_lo >> (juint)shift;
1345 jlong hi = (julong)r1->_hi >> (juint)shift;
1346 if (r1->_hi >= 0 && r1->_lo < 0) {
1347 // If the type has both negative and positive values,
1348 // there are two separate sub-domains to worry about:
1349 // The positive half and the negative half.
1350 jlong neg_lo = lo;
1351 jlong neg_hi = (julong)-1 >> (juint)shift;
1352 jlong pos_lo = (julong) 0 >> (juint)shift;
1353 jlong pos_hi = hi;
1354 //lo = MIN2(neg_lo, pos_lo); // == 0
1355 lo = neg_lo < pos_lo ? neg_lo : pos_lo;
1356 //hi = MAX2(neg_hi, pos_hi); // == -1 >>> shift;
1357 hi = neg_hi > pos_hi ? neg_hi : pos_hi;
1358 }
1359 assert(lo <= hi, "must have valid bounds");
1360 const TypeLong* tl = TypeLong::make(lo, hi, MAX2(r1->_widen,r2->_widen));
1361 #ifdef ASSERT
1362 // Make sure we get the sign-capture idiom correct.
1363 if (shift == BitsPerJavaLong - 1) {
1364 if (r1->_lo >= 0) assert(tl == TypeLong::ZERO, ">>>63 of + is 0");
1365 if (r1->_hi < 0) assert(tl == TypeLong::ONE, ">>>63 of - is +1");
1366 }
1367 #endif
1368 return tl;
1369 }
1370
1371 return TypeLong::LONG; // Give up
1372 }
1373
1374 //=============================================================================
1375 //------------------------------Value------------------------------------------
1376 const Type* FmaDNode::Value(PhaseGVN* phase) const {
1377 const Type *t1 = phase->type(in(1));
1378 if (t1 == Type::TOP) return Type::TOP;
1379 if (t1->base() != Type::DoubleCon) return Type::DOUBLE;
1380 const Type *t2 = phase->type(in(2));
1381 if (t2 == Type::TOP) return Type::TOP;
1382 if (t2->base() != Type::DoubleCon) return Type::DOUBLE;
1383 const Type *t3 = phase->type(in(3));
1384 if (t3 == Type::TOP) return Type::TOP;
1385 if (t3->base() != Type::DoubleCon) return Type::DOUBLE;
1386 #ifndef __STDC_IEC_559__
1387 return Type::DOUBLE;
1388 #else
1389 double d1 = t1->getd();
1390 double d2 = t2->getd();
1391 double d3 = t3->getd();
1392 return TypeD::make(fma(d1, d2, d3));
1393 #endif
1394 }
1395
1396 //=============================================================================
1397 //------------------------------Value------------------------------------------
1398 const Type* FmaFNode::Value(PhaseGVN* phase) const {
1399 const Type *t1 = phase->type(in(1));
1400 if (t1 == Type::TOP) return Type::TOP;
1401 if (t1->base() != Type::FloatCon) return Type::FLOAT;
1402 const Type *t2 = phase->type(in(2));
1403 if (t2 == Type::TOP) return Type::TOP;
1404 if (t2->base() != Type::FloatCon) return Type::FLOAT;
1405 const Type *t3 = phase->type(in(3));
1406 if (t3 == Type::TOP) return Type::TOP;
1407 if (t3->base() != Type::FloatCon) return Type::FLOAT;
1408 #ifndef __STDC_IEC_559__
1409 return Type::FLOAT;
1410 #else
1411 float f1 = t1->getf();
1412 float f2 = t2->getf();
1413 float f3 = t3->getf();
1414 return TypeF::make(fma(f1, f2, f3));
1415 #endif
1416 }