1 /*
2 * Copyright (c) 2003, 2020, Oracle and/or its affiliates. All rights reserved.
3 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
4 *
5 * This code is free software; you can redistribute it and/or modify it
6 * under the terms of the GNU General Public License version 2 only, as
7 * published by the Free Software Foundation.
8 *
9 * This code is distributed in the hope that it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
12 * version 2 for more details (a copy is included in the LICENSE file that
13 * accompanied this code).
14 *
15 * You should have received a copy of the GNU General Public License version
16 * 2 along with this work; if not, write to the Free Software Foundation,
17 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
18 *
19 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
20 * or visit www.oracle.com if you need additional information or have any
21 * questions.
22 *
23 */
24
25 #include "precompiled.hpp"
26 #include "asm/macroAssembler.hpp"
27 #include "asm/macroAssembler.inline.hpp"
28 #include "code/debugInfoRec.hpp"
29 #include "code/icBuffer.hpp"
30 #include "code/nativeInst.hpp"
31 #include "code/vtableStubs.hpp"
32 #include "gc/shared/gcLocker.hpp"
33 #include "gc/shared/collectedHeap.hpp"
34 #include "interpreter/interpreter.hpp"
35 #include "logging/log.hpp"
36 #include "memory/resourceArea.hpp"
37 #include "oops/compiledICHolder.hpp"
38 #include "runtime/safepointMechanism.hpp"
39 #include "runtime/sharedRuntime.hpp"
40 #include "runtime/vframeArray.hpp"
41 #include "utilities/align.hpp"
42 #include "vmreg_x86.inline.hpp"
43 #ifdef COMPILER1
44 #include "c1/c1_Runtime1.hpp"
45 #endif
46 #ifdef COMPILER2
47 #include "opto/runtime.hpp"
48 #endif
49 #include "vm_version_x86.hpp"
50
51 #define __ masm->
52
53 const int StackAlignmentInSlots = StackAlignmentInBytes / VMRegImpl::stack_slot_size;
54
55 class RegisterSaver {
56 // Capture info about frame layout
57 #define DEF_XMM_OFFS(regnum) xmm ## regnum ## _off = xmm_off + (regnum)*16/BytesPerInt, xmm ## regnum ## H_off
58 enum layout {
59 fpu_state_off = 0,
60 fpu_state_end = fpu_state_off+FPUStateSizeInWords,
61 st0_off, st0H_off,
62 st1_off, st1H_off,
63 st2_off, st2H_off,
64 st3_off, st3H_off,
65 st4_off, st4H_off,
66 st5_off, st5H_off,
67 st6_off, st6H_off,
68 st7_off, st7H_off,
69 xmm_off,
70 DEF_XMM_OFFS(0),
71 DEF_XMM_OFFS(1),
72 DEF_XMM_OFFS(2),
73 DEF_XMM_OFFS(3),
74 DEF_XMM_OFFS(4),
75 DEF_XMM_OFFS(5),
76 DEF_XMM_OFFS(6),
77 DEF_XMM_OFFS(7),
78 flags_off = xmm7_off + 16/BytesPerInt + 1, // 16-byte stack alignment fill word
79 rdi_off,
80 rsi_off,
81 ignore_off, // extra copy of rbp,
82 rsp_off,
83 rbx_off,
84 rdx_off,
85 rcx_off,
86 rax_off,
87 // The frame sender code expects that rbp will be in the "natural" place and
88 // will override any oopMap setting for it. We must therefore force the layout
89 // so that it agrees with the frame sender code.
90 rbp_off,
91 return_off, // slot for return address
92 reg_save_size };
93 enum { FPU_regs_live = flags_off - fpu_state_end };
94
95 public:
96
97 static OopMap* save_live_registers(MacroAssembler* masm, int additional_frame_words,
98 int* total_frame_words, bool verify_fpu = true, bool save_vectors = false);
99 static void restore_live_registers(MacroAssembler* masm, bool restore_vectors = false);
100
101 static int rax_offset() { return rax_off; }
102 static int rbx_offset() { return rbx_off; }
103
104 // Offsets into the register save area
105 // Used by deoptimization when it is managing result register
106 // values on its own
107
108 static int raxOffset(void) { return rax_off; }
109 static int rdxOffset(void) { return rdx_off; }
110 static int rbxOffset(void) { return rbx_off; }
111 static int xmm0Offset(void) { return xmm0_off; }
112 // This really returns a slot in the fp save area, which one is not important
113 static int fpResultOffset(void) { return st0_off; }
114
115 // During deoptimization only the result register need to be restored
116 // all the other values have already been extracted.
117
118 static void restore_result_registers(MacroAssembler* masm);
119
120 };
121
122 OopMap* RegisterSaver::save_live_registers(MacroAssembler* masm, int additional_frame_words,
123 int* total_frame_words, bool verify_fpu, bool save_vectors) {
124 int num_xmm_regs = XMMRegisterImpl::number_of_registers;
125 int ymm_bytes = num_xmm_regs * 16;
126 int zmm_bytes = num_xmm_regs * 32;
127 #ifdef COMPILER2
128 if (save_vectors) {
129 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
130 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
131 // Save upper half of YMM registers
132 int vect_bytes = ymm_bytes;
133 if (UseAVX > 2) {
134 // Save upper half of ZMM registers as well
135 vect_bytes += zmm_bytes;
136 }
137 additional_frame_words += vect_bytes / wordSize;
138 }
139 #else
140 assert(!save_vectors, "vectors are generated only by C2");
141 #endif
142 int frame_size_in_bytes = (reg_save_size + additional_frame_words) * wordSize;
143 int frame_words = frame_size_in_bytes / wordSize;
144 *total_frame_words = frame_words;
145
146 assert(FPUStateSizeInWords == 27, "update stack layout");
147
148 // save registers, fpu state, and flags
149 // We assume caller has already has return address slot on the stack
150 // We push epb twice in this sequence because we want the real rbp,
151 // to be under the return like a normal enter and we want to use pusha
152 // We push by hand instead of using push.
153 __ enter();
154 __ pusha();
155 __ pushf();
156 __ subptr(rsp,FPU_regs_live*wordSize); // Push FPU registers space
157 __ push_FPU_state(); // Save FPU state & init
158
159 if (verify_fpu) {
160 // Some stubs may have non standard FPU control word settings so
161 // only check and reset the value when it required to be the
162 // standard value. The safepoint blob in particular can be used
163 // in methods which are using the 24 bit control word for
164 // optimized float math.
165
166 #ifdef ASSERT
167 // Make sure the control word has the expected value
168 Label ok;
169 __ cmpw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
170 __ jccb(Assembler::equal, ok);
171 __ stop("corrupted control word detected");
172 __ bind(ok);
173 #endif
174
175 // Reset the control word to guard against exceptions being unmasked
176 // since fstp_d can cause FPU stack underflow exceptions. Write it
177 // into the on stack copy and then reload that to make sure that the
178 // current and future values are correct.
179 __ movw(Address(rsp, 0), StubRoutines::fpu_cntrl_wrd_std());
180 }
181
182 __ frstor(Address(rsp, 0));
183 if (!verify_fpu) {
184 // Set the control word so that exceptions are masked for the
185 // following code.
186 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
187 }
188
189 int off = st0_off;
190 int delta = st1_off - off;
191
192 // Save the FPU registers in de-opt-able form
193 for (int n = 0; n < FloatRegisterImpl::number_of_registers; n++) {
194 __ fstp_d(Address(rsp, off*wordSize));
195 off += delta;
196 }
197
198 off = xmm0_off;
199 delta = xmm1_off - off;
200 if(UseSSE == 1) {
201 // Save the XMM state
202 for (int n = 0; n < num_xmm_regs; n++) {
203 __ movflt(Address(rsp, off*wordSize), as_XMMRegister(n));
204 off += delta;
205 }
206 } else if(UseSSE >= 2) {
207 // Save whole 128bit (16 bytes) XMM registers
208 for (int n = 0; n < num_xmm_regs; n++) {
209 __ movdqu(Address(rsp, off*wordSize), as_XMMRegister(n));
210 off += delta;
211 }
212 }
213
214 if (save_vectors) {
215 __ subptr(rsp, ymm_bytes);
216 // Save upper half of YMM registers
217 for (int n = 0; n < num_xmm_regs; n++) {
218 __ vextractf128_high(Address(rsp, n*16), as_XMMRegister(n));
219 }
220 if (UseAVX > 2) {
221 __ subptr(rsp, zmm_bytes);
222 // Save upper half of ZMM registers
223 for (int n = 0; n < num_xmm_regs; n++) {
224 __ vextractf64x4_high(Address(rsp, n*32), as_XMMRegister(n));
225 }
226 }
227 }
228 __ vzeroupper();
229
230 // Set an oopmap for the call site. This oopmap will map all
231 // oop-registers and debug-info registers as callee-saved. This
232 // will allow deoptimization at this safepoint to find all possible
233 // debug-info recordings, as well as let GC find all oops.
234
235 OopMapSet *oop_maps = new OopMapSet();
236 OopMap* map = new OopMap( frame_words, 0 );
237
238 #define STACK_OFFSET(x) VMRegImpl::stack2reg((x) + additional_frame_words)
239 #define NEXTREG(x) (x)->as_VMReg()->next()
240
241 map->set_callee_saved(STACK_OFFSET(rax_off), rax->as_VMReg());
242 map->set_callee_saved(STACK_OFFSET(rcx_off), rcx->as_VMReg());
243 map->set_callee_saved(STACK_OFFSET(rdx_off), rdx->as_VMReg());
244 map->set_callee_saved(STACK_OFFSET(rbx_off), rbx->as_VMReg());
245 // rbp, location is known implicitly, no oopMap
246 map->set_callee_saved(STACK_OFFSET(rsi_off), rsi->as_VMReg());
247 map->set_callee_saved(STACK_OFFSET(rdi_off), rdi->as_VMReg());
248 // %%% This is really a waste but we'll keep things as they were for now for the upper component
249 off = st0_off;
250 delta = st1_off - off;
251 for (int n = 0; n < FloatRegisterImpl::number_of_registers; n++) {
252 FloatRegister freg_name = as_FloatRegister(n);
253 map->set_callee_saved(STACK_OFFSET(off), freg_name->as_VMReg());
254 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(freg_name));
255 off += delta;
256 }
257 off = xmm0_off;
258 delta = xmm1_off - off;
259 for (int n = 0; n < num_xmm_regs; n++) {
260 XMMRegister xmm_name = as_XMMRegister(n);
261 map->set_callee_saved(STACK_OFFSET(off), xmm_name->as_VMReg());
262 map->set_callee_saved(STACK_OFFSET(off+1), NEXTREG(xmm_name));
263 off += delta;
264 }
265 #undef NEXTREG
266 #undef STACK_OFFSET
267
268 return map;
269 }
270
271 void RegisterSaver::restore_live_registers(MacroAssembler* masm, bool restore_vectors) {
272 int num_xmm_regs = XMMRegisterImpl::number_of_registers;
273 int ymm_bytes = num_xmm_regs * 16;
274 int zmm_bytes = num_xmm_regs * 32;
275 // Recover XMM & FPU state
276 int additional_frame_bytes = 0;
277 #ifdef COMPILER2
278 if (restore_vectors) {
279 assert(UseAVX > 0, "Vectors larger than 16 byte long are supported only with AVX");
280 assert(MaxVectorSize <= 64, "Only up to 64 byte long vectors are supported");
281 // Save upper half of YMM registers
282 additional_frame_bytes = ymm_bytes;
283 if (UseAVX > 2) {
284 // Save upper half of ZMM registers as well
285 additional_frame_bytes += zmm_bytes;
286 }
287 }
288 #else
289 assert(!restore_vectors, "vectors are generated only by C2");
290 #endif
291
292 int off = xmm0_off;
293 int delta = xmm1_off - off;
294
295 __ vzeroupper();
296
297 if (UseSSE == 1) {
298 // Restore XMM registers
299 assert(additional_frame_bytes == 0, "");
300 for (int n = 0; n < num_xmm_regs; n++) {
301 __ movflt(as_XMMRegister(n), Address(rsp, off*wordSize));
302 off += delta;
303 }
304 } else if (UseSSE >= 2) {
305 // Restore whole 128bit (16 bytes) XMM registers. Do this before restoring YMM and
306 // ZMM because the movdqu instruction zeros the upper part of the XMM register.
307 for (int n = 0; n < num_xmm_regs; n++) {
308 __ movdqu(as_XMMRegister(n), Address(rsp, off*wordSize+additional_frame_bytes));
309 off += delta;
310 }
311 }
312
313 if (restore_vectors) {
314 if (UseAVX > 2) {
315 // Restore upper half of ZMM registers.
316 for (int n = 0; n < num_xmm_regs; n++) {
317 __ vinsertf64x4_high(as_XMMRegister(n), Address(rsp, n*32));
318 }
319 __ addptr(rsp, zmm_bytes);
320 }
321 // Restore upper half of YMM registers.
322 for (int n = 0; n < num_xmm_regs; n++) {
323 __ vinsertf128_high(as_XMMRegister(n), Address(rsp, n*16));
324 }
325 __ addptr(rsp, ymm_bytes);
326 }
327
328 __ pop_FPU_state();
329 __ addptr(rsp, FPU_regs_live*wordSize); // Pop FPU registers
330
331 __ popf();
332 __ popa();
333 // Get the rbp, described implicitly by the frame sender code (no oopMap)
334 __ pop(rbp);
335 }
336
337 void RegisterSaver::restore_result_registers(MacroAssembler* masm) {
338
339 // Just restore result register. Only used by deoptimization. By
340 // now any callee save register that needs to be restore to a c2
341 // caller of the deoptee has been extracted into the vframeArray
342 // and will be stuffed into the c2i adapter we create for later
343 // restoration so only result registers need to be restored here.
344 //
345
346 __ frstor(Address(rsp, 0)); // Restore fpu state
347
348 // Recover XMM & FPU state
349 if( UseSSE == 1 ) {
350 __ movflt(xmm0, Address(rsp, xmm0_off*wordSize));
351 } else if( UseSSE >= 2 ) {
352 __ movdbl(xmm0, Address(rsp, xmm0_off*wordSize));
353 }
354 __ movptr(rax, Address(rsp, rax_off*wordSize));
355 __ movptr(rdx, Address(rsp, rdx_off*wordSize));
356 // Pop all of the register save are off the stack except the return address
357 __ addptr(rsp, return_off * wordSize);
358 }
359
360 // Is vector's size (in bytes) bigger than a size saved by default?
361 // 16 bytes XMM registers are saved by default using SSE2 movdqu instructions.
362 // Note, MaxVectorSize == 0 with UseSSE < 2 and vectors are not generated.
363 bool SharedRuntime::is_wide_vector(int size) {
364 return size > 16;
365 }
366
367 size_t SharedRuntime::trampoline_size() {
368 return 16;
369 }
370
371 void SharedRuntime::generate_trampoline(MacroAssembler *masm, address destination) {
372 __ jump(RuntimeAddress(destination));
373 }
374
375 // The java_calling_convention describes stack locations as ideal slots on
376 // a frame with no abi restrictions. Since we must observe abi restrictions
377 // (like the placement of the register window) the slots must be biased by
378 // the following value.
379 static int reg2offset_in(VMReg r) {
380 // Account for saved rbp, and return address
381 // This should really be in_preserve_stack_slots
382 return (r->reg2stack() + 2) * VMRegImpl::stack_slot_size;
383 }
384
385 static int reg2offset_out(VMReg r) {
386 return (r->reg2stack() + SharedRuntime::out_preserve_stack_slots()) * VMRegImpl::stack_slot_size;
387 }
388
389 // ---------------------------------------------------------------------------
390 // Read the array of BasicTypes from a signature, and compute where the
391 // arguments should go. Values in the VMRegPair regs array refer to 4-byte
392 // quantities. Values less than SharedInfo::stack0 are registers, those above
393 // refer to 4-byte stack slots. All stack slots are based off of the stack pointer
394 // as framesizes are fixed.
395 // VMRegImpl::stack0 refers to the first slot 0(sp).
396 // and VMRegImpl::stack0+1 refers to the memory word 4-byes higher. Register
397 // up to RegisterImpl::number_of_registers) are the 32-bit
398 // integer registers.
399
400 // Pass first two oop/int args in registers ECX and EDX.
401 // Pass first two float/double args in registers XMM0 and XMM1.
402 // Doubles have precedence, so if you pass a mix of floats and doubles
403 // the doubles will grab the registers before the floats will.
404
405 // Note: the INPUTS in sig_bt are in units of Java argument words, which are
406 // either 32-bit or 64-bit depending on the build. The OUTPUTS are in 32-bit
407 // units regardless of build. Of course for i486 there is no 64 bit build
408
409
410 // ---------------------------------------------------------------------------
411 // The compiled Java calling convention.
412 // Pass first two oop/int args in registers ECX and EDX.
413 // Pass first two float/double args in registers XMM0 and XMM1.
414 // Doubles have precedence, so if you pass a mix of floats and doubles
415 // the doubles will grab the registers before the floats will.
416 int SharedRuntime::java_calling_convention(const BasicType *sig_bt,
417 VMRegPair *regs,
418 int total_args_passed,
419 int is_outgoing) {
420 uint stack = 0; // Starting stack position for args on stack
421
422
423 // Pass first two oop/int args in registers ECX and EDX.
424 uint reg_arg0 = 9999;
425 uint reg_arg1 = 9999;
426
427 // Pass first two float/double args in registers XMM0 and XMM1.
428 // Doubles have precedence, so if you pass a mix of floats and doubles
429 // the doubles will grab the registers before the floats will.
430 // CNC - TURNED OFF FOR non-SSE.
431 // On Intel we have to round all doubles (and most floats) at
432 // call sites by storing to the stack in any case.
433 // UseSSE=0 ==> Don't Use ==> 9999+0
434 // UseSSE=1 ==> Floats only ==> 9999+1
435 // UseSSE>=2 ==> Floats or doubles ==> 9999+2
436 enum { fltarg_dontuse = 9999+0, fltarg_float_only = 9999+1, fltarg_flt_dbl = 9999+2 };
437 uint fargs = (UseSSE>=2) ? 2 : UseSSE;
438 uint freg_arg0 = 9999+fargs;
439 uint freg_arg1 = 9999+fargs;
440
441 // Pass doubles & longs aligned on the stack. First count stack slots for doubles
442 int i;
443 for( i = 0; i < total_args_passed; i++) {
444 if( sig_bt[i] == T_DOUBLE ) {
445 // first 2 doubles go in registers
446 if( freg_arg0 == fltarg_flt_dbl ) freg_arg0 = i;
447 else if( freg_arg1 == fltarg_flt_dbl ) freg_arg1 = i;
448 else // Else double is passed low on the stack to be aligned.
449 stack += 2;
450 } else if( sig_bt[i] == T_LONG ) {
451 stack += 2;
452 }
453 }
454 int dstack = 0; // Separate counter for placing doubles
455
456 // Now pick where all else goes.
457 for( i = 0; i < total_args_passed; i++) {
458 // From the type and the argument number (count) compute the location
459 switch( sig_bt[i] ) {
460 case T_SHORT:
461 case T_CHAR:
462 case T_BYTE:
463 case T_BOOLEAN:
464 case T_INT:
465 case T_ARRAY:
466 case T_OBJECT:
467 case T_ADDRESS:
468 if( reg_arg0 == 9999 ) {
469 reg_arg0 = i;
470 regs[i].set1(rcx->as_VMReg());
471 } else if( reg_arg1 == 9999 ) {
472 reg_arg1 = i;
473 regs[i].set1(rdx->as_VMReg());
474 } else {
475 regs[i].set1(VMRegImpl::stack2reg(stack++));
476 }
477 break;
478 case T_FLOAT:
479 if( freg_arg0 == fltarg_flt_dbl || freg_arg0 == fltarg_float_only ) {
480 freg_arg0 = i;
481 regs[i].set1(xmm0->as_VMReg());
482 } else if( freg_arg1 == fltarg_flt_dbl || freg_arg1 == fltarg_float_only ) {
483 freg_arg1 = i;
484 regs[i].set1(xmm1->as_VMReg());
485 } else {
486 regs[i].set1(VMRegImpl::stack2reg(stack++));
487 }
488 break;
489 case T_LONG:
490 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
491 regs[i].set2(VMRegImpl::stack2reg(dstack));
492 dstack += 2;
493 break;
494 case T_DOUBLE:
495 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
496 if( freg_arg0 == (uint)i ) {
497 regs[i].set2(xmm0->as_VMReg());
498 } else if( freg_arg1 == (uint)i ) {
499 regs[i].set2(xmm1->as_VMReg());
500 } else {
501 regs[i].set2(VMRegImpl::stack2reg(dstack));
502 dstack += 2;
503 }
504 break;
505 case T_VOID: regs[i].set_bad(); break;
506 break;
507 default:
508 ShouldNotReachHere();
509 break;
510 }
511 }
512
513 // return value can be odd number of VMRegImpl stack slots make multiple of 2
514 return align_up(stack, 2);
515 }
516
517 // Patch the callers callsite with entry to compiled code if it exists.
518 static void patch_callers_callsite(MacroAssembler *masm) {
519 Label L;
520 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
521 __ jcc(Assembler::equal, L);
522 // Schedule the branch target address early.
523 // Call into the VM to patch the caller, then jump to compiled callee
524 // rax, isn't live so capture return address while we easily can
525 __ movptr(rax, Address(rsp, 0));
526 __ pusha();
527 __ pushf();
528
529 if (UseSSE == 1) {
530 __ subptr(rsp, 2*wordSize);
531 __ movflt(Address(rsp, 0), xmm0);
532 __ movflt(Address(rsp, wordSize), xmm1);
533 }
534 if (UseSSE >= 2) {
535 __ subptr(rsp, 4*wordSize);
536 __ movdbl(Address(rsp, 0), xmm0);
537 __ movdbl(Address(rsp, 2*wordSize), xmm1);
538 }
539 #ifdef COMPILER2
540 // C2 may leave the stack dirty if not in SSE2+ mode
541 if (UseSSE >= 2) {
542 __ verify_FPU(0, "c2i transition should have clean FPU stack");
543 } else {
544 __ empty_FPU_stack();
545 }
546 #endif /* COMPILER2 */
547
548 // VM needs caller's callsite
549 __ push(rax);
550 // VM needs target method
551 __ push(rbx);
552 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::fixup_callers_callsite)));
553 __ addptr(rsp, 2*wordSize);
554
555 if (UseSSE == 1) {
556 __ movflt(xmm0, Address(rsp, 0));
557 __ movflt(xmm1, Address(rsp, wordSize));
558 __ addptr(rsp, 2*wordSize);
559 }
560 if (UseSSE >= 2) {
561 __ movdbl(xmm0, Address(rsp, 0));
562 __ movdbl(xmm1, Address(rsp, 2*wordSize));
563 __ addptr(rsp, 4*wordSize);
564 }
565
566 __ popf();
567 __ popa();
568 __ bind(L);
569 }
570
571
572 static void move_c2i_double(MacroAssembler *masm, XMMRegister r, int st_off) {
573 int next_off = st_off - Interpreter::stackElementSize;
574 __ movdbl(Address(rsp, next_off), r);
575 }
576
577 static void gen_c2i_adapter(MacroAssembler *masm,
578 int total_args_passed,
579 int comp_args_on_stack,
580 const BasicType *sig_bt,
581 const VMRegPair *regs,
582 Label& skip_fixup) {
583 // Before we get into the guts of the C2I adapter, see if we should be here
584 // at all. We've come from compiled code and are attempting to jump to the
585 // interpreter, which means the caller made a static call to get here
586 // (vcalls always get a compiled target if there is one). Check for a
587 // compiled target. If there is one, we need to patch the caller's call.
588 patch_callers_callsite(masm);
589
590 __ bind(skip_fixup);
591
592 #ifdef COMPILER2
593 // C2 may leave the stack dirty if not in SSE2+ mode
594 if (UseSSE >= 2) {
595 __ verify_FPU(0, "c2i transition should have clean FPU stack");
596 } else {
597 __ empty_FPU_stack();
598 }
599 #endif /* COMPILER2 */
600
601 // Since all args are passed on the stack, total_args_passed * interpreter_
602 // stack_element_size is the
603 // space we need.
604 int extraspace = total_args_passed * Interpreter::stackElementSize;
605
606 // Get return address
607 __ pop(rax);
608
609 // set senderSP value
610 __ movptr(rsi, rsp);
611
612 __ subptr(rsp, extraspace);
613
614 // Now write the args into the outgoing interpreter space
615 for (int i = 0; i < total_args_passed; i++) {
616 if (sig_bt[i] == T_VOID) {
617 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
618 continue;
619 }
620
621 // st_off points to lowest address on stack.
622 int st_off = ((total_args_passed - 1) - i) * Interpreter::stackElementSize;
623 int next_off = st_off - Interpreter::stackElementSize;
624
625 // Say 4 args:
626 // i st_off
627 // 0 12 T_LONG
628 // 1 8 T_VOID
629 // 2 4 T_OBJECT
630 // 3 0 T_BOOL
631 VMReg r_1 = regs[i].first();
632 VMReg r_2 = regs[i].second();
633 if (!r_1->is_valid()) {
634 assert(!r_2->is_valid(), "");
635 continue;
636 }
637
638 if (r_1->is_stack()) {
639 // memory to memory use fpu stack top
640 int ld_off = r_1->reg2stack() * VMRegImpl::stack_slot_size + extraspace;
641
642 if (!r_2->is_valid()) {
643 __ movl(rdi, Address(rsp, ld_off));
644 __ movptr(Address(rsp, st_off), rdi);
645 } else {
646
647 // ld_off == LSW, ld_off+VMRegImpl::stack_slot_size == MSW
648 // st_off == MSW, st_off-wordSize == LSW
649
650 __ movptr(rdi, Address(rsp, ld_off));
651 __ movptr(Address(rsp, next_off), rdi);
652 #ifndef _LP64
653 __ movptr(rdi, Address(rsp, ld_off + wordSize));
654 __ movptr(Address(rsp, st_off), rdi);
655 #else
656 #ifdef ASSERT
657 // Overwrite the unused slot with known junk
658 __ mov64(rax, CONST64(0xdeadffffdeadaaaa));
659 __ movptr(Address(rsp, st_off), rax);
660 #endif /* ASSERT */
661 #endif // _LP64
662 }
663 } else if (r_1->is_Register()) {
664 Register r = r_1->as_Register();
665 if (!r_2->is_valid()) {
666 __ movl(Address(rsp, st_off), r);
667 } else {
668 // long/double in gpr
669 NOT_LP64(ShouldNotReachHere());
670 // Two VMRegs can be T_OBJECT, T_ADDRESS, T_DOUBLE, T_LONG
671 // T_DOUBLE and T_LONG use two slots in the interpreter
672 if ( sig_bt[i] == T_LONG || sig_bt[i] == T_DOUBLE) {
673 // long/double in gpr
674 #ifdef ASSERT
675 // Overwrite the unused slot with known junk
676 LP64_ONLY(__ mov64(rax, CONST64(0xdeadffffdeadaaab)));
677 __ movptr(Address(rsp, st_off), rax);
678 #endif /* ASSERT */
679 __ movptr(Address(rsp, next_off), r);
680 } else {
681 __ movptr(Address(rsp, st_off), r);
682 }
683 }
684 } else {
685 assert(r_1->is_XMMRegister(), "");
686 if (!r_2->is_valid()) {
687 __ movflt(Address(rsp, st_off), r_1->as_XMMRegister());
688 } else {
689 assert(sig_bt[i] == T_DOUBLE || sig_bt[i] == T_LONG, "wrong type");
690 move_c2i_double(masm, r_1->as_XMMRegister(), st_off);
691 }
692 }
693 }
694
695 // Schedule the branch target address early.
696 __ movptr(rcx, Address(rbx, in_bytes(Method::interpreter_entry_offset())));
697 // And repush original return address
698 __ push(rax);
699 __ jmp(rcx);
700 }
701
702
703 static void move_i2c_double(MacroAssembler *masm, XMMRegister r, Register saved_sp, int ld_off) {
704 int next_val_off = ld_off - Interpreter::stackElementSize;
705 __ movdbl(r, Address(saved_sp, next_val_off));
706 }
707
708 static void range_check(MacroAssembler* masm, Register pc_reg, Register temp_reg,
709 address code_start, address code_end,
710 Label& L_ok) {
711 Label L_fail;
712 __ lea(temp_reg, ExternalAddress(code_start));
713 __ cmpptr(pc_reg, temp_reg);
714 __ jcc(Assembler::belowEqual, L_fail);
715 __ lea(temp_reg, ExternalAddress(code_end));
716 __ cmpptr(pc_reg, temp_reg);
717 __ jcc(Assembler::below, L_ok);
718 __ bind(L_fail);
719 }
720
721 void SharedRuntime::gen_i2c_adapter(MacroAssembler *masm,
722 int total_args_passed,
723 int comp_args_on_stack,
724 const BasicType *sig_bt,
725 const VMRegPair *regs) {
726 // Note: rsi contains the senderSP on entry. We must preserve it since
727 // we may do a i2c -> c2i transition if we lose a race where compiled
728 // code goes non-entrant while we get args ready.
729
730 // Adapters can be frameless because they do not require the caller
731 // to perform additional cleanup work, such as correcting the stack pointer.
732 // An i2c adapter is frameless because the *caller* frame, which is interpreted,
733 // routinely repairs its own stack pointer (from interpreter_frame_last_sp),
734 // even if a callee has modified the stack pointer.
735 // A c2i adapter is frameless because the *callee* frame, which is interpreted,
736 // routinely repairs its caller's stack pointer (from sender_sp, which is set
737 // up via the senderSP register).
738 // In other words, if *either* the caller or callee is interpreted, we can
739 // get the stack pointer repaired after a call.
740 // This is why c2i and i2c adapters cannot be indefinitely composed.
741 // In particular, if a c2i adapter were to somehow call an i2c adapter,
742 // both caller and callee would be compiled methods, and neither would
743 // clean up the stack pointer changes performed by the two adapters.
744 // If this happens, control eventually transfers back to the compiled
745 // caller, but with an uncorrected stack, causing delayed havoc.
746
747 // Pick up the return address
748 __ movptr(rax, Address(rsp, 0));
749
750 if (VerifyAdapterCalls &&
751 (Interpreter::code() != NULL || StubRoutines::code1() != NULL)) {
752 // So, let's test for cascading c2i/i2c adapters right now.
753 // assert(Interpreter::contains($return_addr) ||
754 // StubRoutines::contains($return_addr),
755 // "i2c adapter must return to an interpreter frame");
756 __ block_comment("verify_i2c { ");
757 Label L_ok;
758 if (Interpreter::code() != NULL)
759 range_check(masm, rax, rdi,
760 Interpreter::code()->code_start(), Interpreter::code()->code_end(),
761 L_ok);
762 if (StubRoutines::code1() != NULL)
763 range_check(masm, rax, rdi,
764 StubRoutines::code1()->code_begin(), StubRoutines::code1()->code_end(),
765 L_ok);
766 if (StubRoutines::code2() != NULL)
767 range_check(masm, rax, rdi,
768 StubRoutines::code2()->code_begin(), StubRoutines::code2()->code_end(),
769 L_ok);
770 const char* msg = "i2c adapter must return to an interpreter frame";
771 __ block_comment(msg);
772 __ stop(msg);
773 __ bind(L_ok);
774 __ block_comment("} verify_i2ce ");
775 }
776
777 // Must preserve original SP for loading incoming arguments because
778 // we need to align the outgoing SP for compiled code.
779 __ movptr(rdi, rsp);
780
781 // Cut-out for having no stack args. Since up to 2 int/oop args are passed
782 // in registers, we will occasionally have no stack args.
783 int comp_words_on_stack = 0;
784 if (comp_args_on_stack) {
785 // Sig words on the stack are greater-than VMRegImpl::stack0. Those in
786 // registers are below. By subtracting stack0, we either get a negative
787 // number (all values in registers) or the maximum stack slot accessed.
788 // int comp_args_on_stack = VMRegImpl::reg2stack(max_arg);
789 // Convert 4-byte stack slots to words.
790 comp_words_on_stack = align_up(comp_args_on_stack*4, wordSize)>>LogBytesPerWord;
791 // Round up to miminum stack alignment, in wordSize
792 comp_words_on_stack = align_up(comp_words_on_stack, 2);
793 __ subptr(rsp, comp_words_on_stack * wordSize);
794 }
795
796 // Align the outgoing SP
797 __ andptr(rsp, -(StackAlignmentInBytes));
798
799 // push the return address on the stack (note that pushing, rather
800 // than storing it, yields the correct frame alignment for the callee)
801 __ push(rax);
802
803 // Put saved SP in another register
804 const Register saved_sp = rax;
805 __ movptr(saved_sp, rdi);
806
807
808 // Will jump to the compiled code just as if compiled code was doing it.
809 // Pre-load the register-jump target early, to schedule it better.
810 __ movptr(rdi, Address(rbx, in_bytes(Method::from_compiled_offset())));
811
812 // Now generate the shuffle code. Pick up all register args and move the
813 // rest through the floating point stack top.
814 for (int i = 0; i < total_args_passed; i++) {
815 if (sig_bt[i] == T_VOID) {
816 // Longs and doubles are passed in native word order, but misaligned
817 // in the 32-bit build.
818 assert(i > 0 && (sig_bt[i-1] == T_LONG || sig_bt[i-1] == T_DOUBLE), "missing half");
819 continue;
820 }
821
822 // Pick up 0, 1 or 2 words from SP+offset.
823
824 assert(!regs[i].second()->is_valid() || regs[i].first()->next() == regs[i].second(),
825 "scrambled load targets?");
826 // Load in argument order going down.
827 int ld_off = (total_args_passed - i) * Interpreter::stackElementSize;
828 // Point to interpreter value (vs. tag)
829 int next_off = ld_off - Interpreter::stackElementSize;
830 //
831 //
832 //
833 VMReg r_1 = regs[i].first();
834 VMReg r_2 = regs[i].second();
835 if (!r_1->is_valid()) {
836 assert(!r_2->is_valid(), "");
837 continue;
838 }
839 if (r_1->is_stack()) {
840 // Convert stack slot to an SP offset (+ wordSize to account for return address )
841 int st_off = regs[i].first()->reg2stack()*VMRegImpl::stack_slot_size + wordSize;
842
843 // We can use rsi as a temp here because compiled code doesn't need rsi as an input
844 // and if we end up going thru a c2i because of a miss a reasonable value of rsi
845 // we be generated.
846 if (!r_2->is_valid()) {
847 // __ fld_s(Address(saved_sp, ld_off));
848 // __ fstp_s(Address(rsp, st_off));
849 __ movl(rsi, Address(saved_sp, ld_off));
850 __ movptr(Address(rsp, st_off), rsi);
851 } else {
852 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
853 // are accessed as negative so LSW is at LOW address
854
855 // ld_off is MSW so get LSW
856 // st_off is LSW (i.e. reg.first())
857 // __ fld_d(Address(saved_sp, next_off));
858 // __ fstp_d(Address(rsp, st_off));
859 //
860 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
861 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
862 // So we must adjust where to pick up the data to match the interpreter.
863 //
864 // Interpreter local[n] == MSW, local[n+1] == LSW however locals
865 // are accessed as negative so LSW is at LOW address
866
867 // ld_off is MSW so get LSW
868 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
869 next_off : ld_off;
870 __ movptr(rsi, Address(saved_sp, offset));
871 __ movptr(Address(rsp, st_off), rsi);
872 #ifndef _LP64
873 __ movptr(rsi, Address(saved_sp, ld_off));
874 __ movptr(Address(rsp, st_off + wordSize), rsi);
875 #endif // _LP64
876 }
877 } else if (r_1->is_Register()) { // Register argument
878 Register r = r_1->as_Register();
879 assert(r != rax, "must be different");
880 if (r_2->is_valid()) {
881 //
882 // We are using two VMRegs. This can be either T_OBJECT, T_ADDRESS, T_LONG, or T_DOUBLE
883 // the interpreter allocates two slots but only uses one for thr T_LONG or T_DOUBLE case
884 // So we must adjust where to pick up the data to match the interpreter.
885
886 const int offset = (NOT_LP64(true ||) sig_bt[i]==T_LONG||sig_bt[i]==T_DOUBLE)?
887 next_off : ld_off;
888
889 // this can be a misaligned move
890 __ movptr(r, Address(saved_sp, offset));
891 #ifndef _LP64
892 assert(r_2->as_Register() != rax, "need another temporary register");
893 // Remember r_1 is low address (and LSB on x86)
894 // So r_2 gets loaded from high address regardless of the platform
895 __ movptr(r_2->as_Register(), Address(saved_sp, ld_off));
896 #endif // _LP64
897 } else {
898 __ movl(r, Address(saved_sp, ld_off));
899 }
900 } else {
901 assert(r_1->is_XMMRegister(), "");
902 if (!r_2->is_valid()) {
903 __ movflt(r_1->as_XMMRegister(), Address(saved_sp, ld_off));
904 } else {
905 move_i2c_double(masm, r_1->as_XMMRegister(), saved_sp, ld_off);
906 }
907 }
908 }
909
910 // 6243940 We might end up in handle_wrong_method if
911 // the callee is deoptimized as we race thru here. If that
912 // happens we don't want to take a safepoint because the
913 // caller frame will look interpreted and arguments are now
914 // "compiled" so it is much better to make this transition
915 // invisible to the stack walking code. Unfortunately if
916 // we try and find the callee by normal means a safepoint
917 // is possible. So we stash the desired callee in the thread
918 // and the vm will find there should this case occur.
919
920 __ get_thread(rax);
921 __ movptr(Address(rax, JavaThread::callee_target_offset()), rbx);
922
923 // move Method* to rax, in case we end up in an c2i adapter.
924 // the c2i adapters expect Method* in rax, (c2) because c2's
925 // resolve stubs return the result (the method) in rax,.
926 // I'd love to fix this.
927 __ mov(rax, rbx);
928
929 __ jmp(rdi);
930 }
931
932 // ---------------------------------------------------------------
933 AdapterHandlerEntry* SharedRuntime::generate_i2c2i_adapters(MacroAssembler *masm,
934 int total_args_passed,
935 int comp_args_on_stack,
936 const BasicType *sig_bt,
937 const VMRegPair *regs,
938 AdapterFingerPrint* fingerprint) {
939 address i2c_entry = __ pc();
940
941 gen_i2c_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs);
942
943 // -------------------------------------------------------------------------
944 // Generate a C2I adapter. On entry we know rbx, holds the Method* during calls
945 // to the interpreter. The args start out packed in the compiled layout. They
946 // need to be unpacked into the interpreter layout. This will almost always
947 // require some stack space. We grow the current (compiled) stack, then repack
948 // the args. We finally end in a jump to the generic interpreter entry point.
949 // On exit from the interpreter, the interpreter will restore our SP (lest the
950 // compiled code, which relys solely on SP and not EBP, get sick).
951
952 address c2i_unverified_entry = __ pc();
953 Label skip_fixup;
954
955 Register holder = rax;
956 Register receiver = rcx;
957 Register temp = rbx;
958
959 {
960
961 Label missed;
962 __ movptr(temp, Address(receiver, oopDesc::klass_offset_in_bytes()));
963 __ cmpptr(temp, Address(holder, CompiledICHolder::holder_klass_offset()));
964 __ movptr(rbx, Address(holder, CompiledICHolder::holder_metadata_offset()));
965 __ jcc(Assembler::notEqual, missed);
966 // Method might have been compiled since the call site was patched to
967 // interpreted if that is the case treat it as a miss so we can get
968 // the call site corrected.
969 __ cmpptr(Address(rbx, in_bytes(Method::code_offset())), (int32_t)NULL_WORD);
970 __ jcc(Assembler::equal, skip_fixup);
971
972 __ bind(missed);
973 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
974 }
975
976 address c2i_entry = __ pc();
977
978 gen_c2i_adapter(masm, total_args_passed, comp_args_on_stack, sig_bt, regs, skip_fixup);
979
980 __ flush();
981 return AdapterHandlerLibrary::new_entry(fingerprint, i2c_entry, c2i_entry, c2i_unverified_entry);
982 }
983
984 int SharedRuntime::c_calling_convention(const BasicType *sig_bt,
985 VMRegPair *regs,
986 VMRegPair *regs2,
987 int total_args_passed) {
988 assert(regs2 == NULL, "not needed on x86");
989 // We return the amount of VMRegImpl stack slots we need to reserve for all
990 // the arguments NOT counting out_preserve_stack_slots.
991
992 uint stack = 0; // All arguments on stack
993
994 for( int i = 0; i < total_args_passed; i++) {
995 // From the type and the argument number (count) compute the location
996 switch( sig_bt[i] ) {
997 case T_BOOLEAN:
998 case T_CHAR:
999 case T_FLOAT:
1000 case T_BYTE:
1001 case T_SHORT:
1002 case T_INT:
1003 case T_OBJECT:
1004 case T_ARRAY:
1005 case T_ADDRESS:
1006 case T_METADATA:
1007 regs[i].set1(VMRegImpl::stack2reg(stack++));
1008 break;
1009 case T_LONG:
1010 case T_DOUBLE: // The stack numbering is reversed from Java
1011 // Since C arguments do not get reversed, the ordering for
1012 // doubles on the stack must be opposite the Java convention
1013 assert((i + 1) < total_args_passed && sig_bt[i+1] == T_VOID, "missing Half" );
1014 regs[i].set2(VMRegImpl::stack2reg(stack));
1015 stack += 2;
1016 break;
1017 case T_VOID: regs[i].set_bad(); break;
1018 default:
1019 ShouldNotReachHere();
1020 break;
1021 }
1022 }
1023 return stack;
1024 }
1025
1026 // A simple move of integer like type
1027 static void simple_move32(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1028 if (src.first()->is_stack()) {
1029 if (dst.first()->is_stack()) {
1030 // stack to stack
1031 // __ ld(FP, reg2offset(src.first()) + STACK_BIAS, L5);
1032 // __ st(L5, SP, reg2offset(dst.first()) + STACK_BIAS);
1033 __ movl2ptr(rax, Address(rbp, reg2offset_in(src.first())));
1034 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1035 } else {
1036 // stack to reg
1037 __ movl2ptr(dst.first()->as_Register(), Address(rbp, reg2offset_in(src.first())));
1038 }
1039 } else if (dst.first()->is_stack()) {
1040 // reg to stack
1041 // no need to sign extend on 64bit
1042 __ movptr(Address(rsp, reg2offset_out(dst.first())), src.first()->as_Register());
1043 } else {
1044 if (dst.first() != src.first()) {
1045 __ mov(dst.first()->as_Register(), src.first()->as_Register());
1046 }
1047 }
1048 }
1049
1050 // An oop arg. Must pass a handle not the oop itself
1051 static void object_move(MacroAssembler* masm,
1052 OopMap* map,
1053 int oop_handle_offset,
1054 int framesize_in_slots,
1055 VMRegPair src,
1056 VMRegPair dst,
1057 bool is_receiver,
1058 int* receiver_offset) {
1059
1060 // Because of the calling conventions we know that src can be a
1061 // register or a stack location. dst can only be a stack location.
1062
1063 assert(dst.first()->is_stack(), "must be stack");
1064 // must pass a handle. First figure out the location we use as a handle
1065
1066 if (src.first()->is_stack()) {
1067 // Oop is already on the stack as an argument
1068 Register rHandle = rax;
1069 Label nil;
1070 __ xorptr(rHandle, rHandle);
1071 __ cmpptr(Address(rbp, reg2offset_in(src.first())), (int32_t)NULL_WORD);
1072 __ jcc(Assembler::equal, nil);
1073 __ lea(rHandle, Address(rbp, reg2offset_in(src.first())));
1074 __ bind(nil);
1075 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1076
1077 int offset_in_older_frame = src.first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1078 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + framesize_in_slots));
1079 if (is_receiver) {
1080 *receiver_offset = (offset_in_older_frame + framesize_in_slots) * VMRegImpl::stack_slot_size;
1081 }
1082 } else {
1083 // Oop is in an a register we must store it to the space we reserve
1084 // on the stack for oop_handles
1085 const Register rOop = src.first()->as_Register();
1086 const Register rHandle = rax;
1087 int oop_slot = (rOop == rcx ? 0 : 1) * VMRegImpl::slots_per_word + oop_handle_offset;
1088 int offset = oop_slot*VMRegImpl::stack_slot_size;
1089 Label skip;
1090 __ movptr(Address(rsp, offset), rOop);
1091 map->set_oop(VMRegImpl::stack2reg(oop_slot));
1092 __ xorptr(rHandle, rHandle);
1093 __ cmpptr(rOop, (int32_t)NULL_WORD);
1094 __ jcc(Assembler::equal, skip);
1095 __ lea(rHandle, Address(rsp, offset));
1096 __ bind(skip);
1097 // Store the handle parameter
1098 __ movptr(Address(rsp, reg2offset_out(dst.first())), rHandle);
1099 if (is_receiver) {
1100 *receiver_offset = offset;
1101 }
1102 }
1103 }
1104
1105 // A float arg may have to do float reg int reg conversion
1106 static void float_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1107 assert(!src.second()->is_valid() && !dst.second()->is_valid(), "bad float_move");
1108
1109 // Because of the calling convention we know that src is either a stack location
1110 // or an xmm register. dst can only be a stack location.
1111
1112 assert(dst.first()->is_stack() && ( src.first()->is_stack() || src.first()->is_XMMRegister()), "bad parameters");
1113
1114 if (src.first()->is_stack()) {
1115 __ movl(rax, Address(rbp, reg2offset_in(src.first())));
1116 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1117 } else {
1118 // reg to stack
1119 __ movflt(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1120 }
1121 }
1122
1123 // A long move
1124 static void long_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1125
1126 // The only legal possibility for a long_move VMRegPair is:
1127 // 1: two stack slots (possibly unaligned)
1128 // as neither the java or C calling convention will use registers
1129 // for longs.
1130
1131 if (src.first()->is_stack() && dst.first()->is_stack()) {
1132 assert(src.second()->is_stack() && dst.second()->is_stack(), "must be all stack");
1133 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1134 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1135 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1136 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1137 } else {
1138 ShouldNotReachHere();
1139 }
1140 }
1141
1142 // A double move
1143 static void double_move(MacroAssembler* masm, VMRegPair src, VMRegPair dst) {
1144
1145 // The only legal possibilities for a double_move VMRegPair are:
1146 // The painful thing here is that like long_move a VMRegPair might be
1147
1148 // Because of the calling convention we know that src is either
1149 // 1: a single physical register (xmm registers only)
1150 // 2: two stack slots (possibly unaligned)
1151 // dst can only be a pair of stack slots.
1152
1153 assert(dst.first()->is_stack() && (src.first()->is_XMMRegister() || src.first()->is_stack()), "bad args");
1154
1155 if (src.first()->is_stack()) {
1156 // source is all stack
1157 __ movptr(rax, Address(rbp, reg2offset_in(src.first())));
1158 NOT_LP64(__ movptr(rbx, Address(rbp, reg2offset_in(src.second()))));
1159 __ movptr(Address(rsp, reg2offset_out(dst.first())), rax);
1160 NOT_LP64(__ movptr(Address(rsp, reg2offset_out(dst.second())), rbx));
1161 } else {
1162 // reg to stack
1163 // No worries about stack alignment
1164 __ movdbl(Address(rsp, reg2offset_out(dst.first())), src.first()->as_XMMRegister());
1165 }
1166 }
1167
1168
1169 void SharedRuntime::save_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1170 // We always ignore the frame_slots arg and just use the space just below frame pointer
1171 // which by this time is free to use
1172 switch (ret_type) {
1173 case T_FLOAT:
1174 __ fstp_s(Address(rbp, -wordSize));
1175 break;
1176 case T_DOUBLE:
1177 __ fstp_d(Address(rbp, -2*wordSize));
1178 break;
1179 case T_VOID: break;
1180 case T_LONG:
1181 __ movptr(Address(rbp, -wordSize), rax);
1182 NOT_LP64(__ movptr(Address(rbp, -2*wordSize), rdx));
1183 break;
1184 default: {
1185 __ movptr(Address(rbp, -wordSize), rax);
1186 }
1187 }
1188 }
1189
1190 void SharedRuntime::restore_native_result(MacroAssembler *masm, BasicType ret_type, int frame_slots) {
1191 // We always ignore the frame_slots arg and just use the space just below frame pointer
1192 // which by this time is free to use
1193 switch (ret_type) {
1194 case T_FLOAT:
1195 __ fld_s(Address(rbp, -wordSize));
1196 break;
1197 case T_DOUBLE:
1198 __ fld_d(Address(rbp, -2*wordSize));
1199 break;
1200 case T_LONG:
1201 __ movptr(rax, Address(rbp, -wordSize));
1202 NOT_LP64(__ movptr(rdx, Address(rbp, -2*wordSize)));
1203 break;
1204 case T_VOID: break;
1205 default: {
1206 __ movptr(rax, Address(rbp, -wordSize));
1207 }
1208 }
1209 }
1210
1211
1212 static void save_or_restore_arguments(MacroAssembler* masm,
1213 const int stack_slots,
1214 const int total_in_args,
1215 const int arg_save_area,
1216 OopMap* map,
1217 VMRegPair* in_regs,
1218 BasicType* in_sig_bt) {
1219 // if map is non-NULL then the code should store the values,
1220 // otherwise it should load them.
1221 int handle_index = 0;
1222 // Save down double word first
1223 for ( int i = 0; i < total_in_args; i++) {
1224 if (in_regs[i].first()->is_XMMRegister() && in_sig_bt[i] == T_DOUBLE) {
1225 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1226 int offset = slot * VMRegImpl::stack_slot_size;
1227 handle_index += 2;
1228 assert(handle_index <= stack_slots, "overflow");
1229 if (map != NULL) {
1230 __ movdbl(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1231 } else {
1232 __ movdbl(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1233 }
1234 }
1235 if (in_regs[i].first()->is_Register() && in_sig_bt[i] == T_LONG) {
1236 int slot = handle_index * VMRegImpl::slots_per_word + arg_save_area;
1237 int offset = slot * VMRegImpl::stack_slot_size;
1238 handle_index += 2;
1239 assert(handle_index <= stack_slots, "overflow");
1240 if (map != NULL) {
1241 __ movl(Address(rsp, offset), in_regs[i].first()->as_Register());
1242 if (in_regs[i].second()->is_Register()) {
1243 __ movl(Address(rsp, offset + 4), in_regs[i].second()->as_Register());
1244 }
1245 } else {
1246 __ movl(in_regs[i].first()->as_Register(), Address(rsp, offset));
1247 if (in_regs[i].second()->is_Register()) {
1248 __ movl(in_regs[i].second()->as_Register(), Address(rsp, offset + 4));
1249 }
1250 }
1251 }
1252 }
1253 // Save or restore single word registers
1254 for ( int i = 0; i < total_in_args; i++) {
1255 if (in_regs[i].first()->is_Register()) {
1256 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1257 int offset = slot * VMRegImpl::stack_slot_size;
1258 assert(handle_index <= stack_slots, "overflow");
1259 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1260 map->set_oop(VMRegImpl::stack2reg(slot));;
1261 }
1262
1263 // Value is in an input register pass we must flush it to the stack
1264 const Register reg = in_regs[i].first()->as_Register();
1265 switch (in_sig_bt[i]) {
1266 case T_ARRAY:
1267 if (map != NULL) {
1268 __ movptr(Address(rsp, offset), reg);
1269 } else {
1270 __ movptr(reg, Address(rsp, offset));
1271 }
1272 break;
1273 case T_BOOLEAN:
1274 case T_CHAR:
1275 case T_BYTE:
1276 case T_SHORT:
1277 case T_INT:
1278 if (map != NULL) {
1279 __ movl(Address(rsp, offset), reg);
1280 } else {
1281 __ movl(reg, Address(rsp, offset));
1282 }
1283 break;
1284 case T_OBJECT:
1285 default: ShouldNotReachHere();
1286 }
1287 } else if (in_regs[i].first()->is_XMMRegister()) {
1288 if (in_sig_bt[i] == T_FLOAT) {
1289 int slot = handle_index++ * VMRegImpl::slots_per_word + arg_save_area;
1290 int offset = slot * VMRegImpl::stack_slot_size;
1291 assert(handle_index <= stack_slots, "overflow");
1292 if (map != NULL) {
1293 __ movflt(Address(rsp, offset), in_regs[i].first()->as_XMMRegister());
1294 } else {
1295 __ movflt(in_regs[i].first()->as_XMMRegister(), Address(rsp, offset));
1296 }
1297 }
1298 } else if (in_regs[i].first()->is_stack()) {
1299 if (in_sig_bt[i] == T_ARRAY && map != NULL) {
1300 int offset_in_older_frame = in_regs[i].first()->reg2stack() + SharedRuntime::out_preserve_stack_slots();
1301 map->set_oop(VMRegImpl::stack2reg(offset_in_older_frame + stack_slots));
1302 }
1303 }
1304 }
1305 }
1306
1307 // Registers need to be saved for runtime call
1308 static Register caller_saved_registers[] = {
1309 rcx, rdx, rsi, rdi
1310 };
1311
1312 // Save caller saved registers except r1 and r2
1313 static void save_registers_except(MacroAssembler* masm, Register r1, Register r2) {
1314 int reg_len = (int)(sizeof(caller_saved_registers) / sizeof(Register));
1315 for (int index = 0; index < reg_len; index ++) {
1316 Register this_reg = caller_saved_registers[index];
1317 if (this_reg != r1 && this_reg != r2) {
1318 __ push(this_reg);
1319 }
1320 }
1321 }
1322
1323 // Restore caller saved registers except r1 and r2
1324 static void restore_registers_except(MacroAssembler* masm, Register r1, Register r2) {
1325 int reg_len = (int)(sizeof(caller_saved_registers) / sizeof(Register));
1326 for (int index = reg_len - 1; index >= 0; index --) {
1327 Register this_reg = caller_saved_registers[index];
1328 if (this_reg != r1 && this_reg != r2) {
1329 __ pop(this_reg);
1330 }
1331 }
1332 }
1333
1334 // Pin object, return pinned object or null in rax
1335 static void gen_pin_object(MacroAssembler* masm,
1336 Register thread, VMRegPair reg) {
1337 __ block_comment("gen_pin_object {");
1338
1339 Label is_null;
1340 Register tmp_reg = rax;
1341 VMRegPair tmp(tmp_reg->as_VMReg());
1342 if (reg.first()->is_stack()) {
1343 // Load the arg up from the stack
1344 simple_move32(masm, reg, tmp);
1345 reg = tmp;
1346 } else {
1347 __ movl(tmp_reg, reg.first()->as_Register());
1348 }
1349 __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1350 __ jccb(Assembler::equal, is_null);
1351
1352 // Save registers that may be used by runtime call
1353 Register arg = reg.first()->is_Register() ? reg.first()->as_Register() : noreg;
1354 save_registers_except(masm, arg, thread);
1355
1356 __ call_VM_leaf(
1357 CAST_FROM_FN_PTR(address, SharedRuntime::pin_object),
1358 thread, reg.first()->as_Register());
1359
1360 // Restore saved registers
1361 restore_registers_except(masm, arg, thread);
1362
1363 __ bind(is_null);
1364 __ block_comment("} gen_pin_object");
1365 }
1366
1367 // Unpin object
1368 static void gen_unpin_object(MacroAssembler* masm,
1369 Register thread, VMRegPair reg) {
1370 __ block_comment("gen_unpin_object {");
1371 Label is_null;
1372
1373 // temp register
1374 __ push(rax);
1375 Register tmp_reg = rax;
1376 VMRegPair tmp(tmp_reg->as_VMReg());
1377
1378 simple_move32(masm, reg, tmp);
1379
1380 __ testptr(rax, rax);
1381 __ jccb(Assembler::equal, is_null);
1382
1383 // Save registers that may be used by runtime call
1384 Register arg = reg.first()->is_Register() ? reg.first()->as_Register() : noreg;
1385 save_registers_except(masm, arg, thread);
1386
1387 __ call_VM_leaf(
1388 CAST_FROM_FN_PTR(address, SharedRuntime::unpin_object),
1389 thread, rax);
1390
1391 // Restore saved registers
1392 restore_registers_except(masm, arg, thread);
1393 __ bind(is_null);
1394 __ pop(rax);
1395 __ block_comment("} gen_unpin_object");
1396 }
1397
1398 // Check GCLocker::needs_gc and enter the runtime if it's true. This
1399 // keeps a new JNI critical region from starting until a GC has been
1400 // forced. Save down any oops in registers and describe them in an
1401 // OopMap.
1402 static void check_needs_gc_for_critical_native(MacroAssembler* masm,
1403 Register thread,
1404 int stack_slots,
1405 int total_c_args,
1406 int total_in_args,
1407 int arg_save_area,
1408 OopMapSet* oop_maps,
1409 VMRegPair* in_regs,
1410 BasicType* in_sig_bt) {
1411 __ block_comment("check GCLocker::needs_gc");
1412 Label cont;
1413 __ cmp8(ExternalAddress((address)GCLocker::needs_gc_address()), false);
1414 __ jcc(Assembler::equal, cont);
1415
1416 // Save down any incoming oops and call into the runtime to halt for a GC
1417
1418 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1419
1420 save_or_restore_arguments(masm, stack_slots, total_in_args,
1421 arg_save_area, map, in_regs, in_sig_bt);
1422
1423 address the_pc = __ pc();
1424 oop_maps->add_gc_map( __ offset(), map);
1425 __ set_last_Java_frame(thread, rsp, noreg, the_pc);
1426
1427 __ block_comment("block_for_jni_critical");
1428 __ push(thread);
1429 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::block_for_jni_critical)));
1430 __ increment(rsp, wordSize);
1431
1432 __ get_thread(thread);
1433 __ reset_last_Java_frame(thread, false);
1434
1435 save_or_restore_arguments(masm, stack_slots, total_in_args,
1436 arg_save_area, NULL, in_regs, in_sig_bt);
1437
1438 __ bind(cont);
1439 #ifdef ASSERT
1440 if (StressCriticalJNINatives) {
1441 // Stress register saving
1442 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1443 save_or_restore_arguments(masm, stack_slots, total_in_args,
1444 arg_save_area, map, in_regs, in_sig_bt);
1445 // Destroy argument registers
1446 for (int i = 0; i < total_in_args - 1; i++) {
1447 if (in_regs[i].first()->is_Register()) {
1448 const Register reg = in_regs[i].first()->as_Register();
1449 __ xorptr(reg, reg);
1450 } else if (in_regs[i].first()->is_XMMRegister()) {
1451 __ xorpd(in_regs[i].first()->as_XMMRegister(), in_regs[i].first()->as_XMMRegister());
1452 } else if (in_regs[i].first()->is_FloatRegister()) {
1453 ShouldNotReachHere();
1454 } else if (in_regs[i].first()->is_stack()) {
1455 // Nothing to do
1456 } else {
1457 ShouldNotReachHere();
1458 }
1459 if (in_sig_bt[i] == T_LONG || in_sig_bt[i] == T_DOUBLE) {
1460 i++;
1461 }
1462 }
1463
1464 save_or_restore_arguments(masm, stack_slots, total_in_args,
1465 arg_save_area, NULL, in_regs, in_sig_bt);
1466 }
1467 #endif
1468 }
1469
1470 // Unpack an array argument into a pointer to the body and the length
1471 // if the array is non-null, otherwise pass 0 for both.
1472 static void unpack_array_argument(MacroAssembler* masm, VMRegPair reg, BasicType in_elem_type, VMRegPair body_arg, VMRegPair length_arg) {
1473 Register tmp_reg = rax;
1474 assert(!body_arg.first()->is_Register() || body_arg.first()->as_Register() != tmp_reg,
1475 "possible collision");
1476 assert(!length_arg.first()->is_Register() || length_arg.first()->as_Register() != tmp_reg,
1477 "possible collision");
1478
1479 // Pass the length, ptr pair
1480 Label is_null, done;
1481 VMRegPair tmp(tmp_reg->as_VMReg());
1482 if (reg.first()->is_stack()) {
1483 // Load the arg up from the stack
1484 simple_move32(masm, reg, tmp);
1485 reg = tmp;
1486 }
1487 __ testptr(reg.first()->as_Register(), reg.first()->as_Register());
1488 __ jccb(Assembler::equal, is_null);
1489 __ lea(tmp_reg, Address(reg.first()->as_Register(), arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1490 simple_move32(masm, tmp, body_arg);
1491 // load the length relative to the body.
1492 __ movl(tmp_reg, Address(tmp_reg, arrayOopDesc::length_offset_in_bytes() -
1493 arrayOopDesc::base_offset_in_bytes(in_elem_type)));
1494 simple_move32(masm, tmp, length_arg);
1495 __ jmpb(done);
1496 __ bind(is_null);
1497 // Pass zeros
1498 __ xorptr(tmp_reg, tmp_reg);
1499 simple_move32(masm, tmp, body_arg);
1500 simple_move32(masm, tmp, length_arg);
1501 __ bind(done);
1502 }
1503
1504 static void verify_oop_args(MacroAssembler* masm,
1505 const methodHandle& method,
1506 const BasicType* sig_bt,
1507 const VMRegPair* regs) {
1508 Register temp_reg = rbx; // not part of any compiled calling seq
1509 if (VerifyOops) {
1510 for (int i = 0; i < method->size_of_parameters(); i++) {
1511 if (sig_bt[i] == T_OBJECT ||
1512 sig_bt[i] == T_ARRAY) {
1513 VMReg r = regs[i].first();
1514 assert(r->is_valid(), "bad oop arg");
1515 if (r->is_stack()) {
1516 __ movptr(temp_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1517 __ verify_oop(temp_reg);
1518 } else {
1519 __ verify_oop(r->as_Register());
1520 }
1521 }
1522 }
1523 }
1524 }
1525
1526 static void gen_special_dispatch(MacroAssembler* masm,
1527 const methodHandle& method,
1528 const BasicType* sig_bt,
1529 const VMRegPair* regs) {
1530 verify_oop_args(masm, method, sig_bt, regs);
1531 vmIntrinsics::ID iid = method->intrinsic_id();
1532
1533 // Now write the args into the outgoing interpreter space
1534 bool has_receiver = false;
1535 Register receiver_reg = noreg;
1536 int member_arg_pos = -1;
1537 Register member_reg = noreg;
1538 int ref_kind = MethodHandles::signature_polymorphic_intrinsic_ref_kind(iid);
1539 if (ref_kind != 0) {
1540 member_arg_pos = method->size_of_parameters() - 1; // trailing MemberName argument
1541 member_reg = rbx; // known to be free at this point
1542 has_receiver = MethodHandles::ref_kind_has_receiver(ref_kind);
1543 } else if (iid == vmIntrinsics::_invokeBasic) {
1544 has_receiver = true;
1545 } else {
1546 fatal("unexpected intrinsic id %d", iid);
1547 }
1548
1549 if (member_reg != noreg) {
1550 // Load the member_arg into register, if necessary.
1551 SharedRuntime::check_member_name_argument_is_last_argument(method, sig_bt, regs);
1552 VMReg r = regs[member_arg_pos].first();
1553 if (r->is_stack()) {
1554 __ movptr(member_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1555 } else {
1556 // no data motion is needed
1557 member_reg = r->as_Register();
1558 }
1559 }
1560
1561 if (has_receiver) {
1562 // Make sure the receiver is loaded into a register.
1563 assert(method->size_of_parameters() > 0, "oob");
1564 assert(sig_bt[0] == T_OBJECT, "receiver argument must be an object");
1565 VMReg r = regs[0].first();
1566 assert(r->is_valid(), "bad receiver arg");
1567 if (r->is_stack()) {
1568 // Porting note: This assumes that compiled calling conventions always
1569 // pass the receiver oop in a register. If this is not true on some
1570 // platform, pick a temp and load the receiver from stack.
1571 fatal("receiver always in a register");
1572 receiver_reg = rcx; // known to be free at this point
1573 __ movptr(receiver_reg, Address(rsp, r->reg2stack() * VMRegImpl::stack_slot_size + wordSize));
1574 } else {
1575 // no data motion is needed
1576 receiver_reg = r->as_Register();
1577 }
1578 }
1579
1580 // Figure out which address we are really jumping to:
1581 MethodHandles::generate_method_handle_dispatch(masm, iid,
1582 receiver_reg, member_reg, /*for_compiler_entry:*/ true);
1583 }
1584
1585 // ---------------------------------------------------------------------------
1586 // Generate a native wrapper for a given method. The method takes arguments
1587 // in the Java compiled code convention, marshals them to the native
1588 // convention (handlizes oops, etc), transitions to native, makes the call,
1589 // returns to java state (possibly blocking), unhandlizes any result and
1590 // returns.
1591 //
1592 // Critical native functions are a shorthand for the use of
1593 // GetPrimtiveArrayCritical and disallow the use of any other JNI
1594 // functions. The wrapper is expected to unpack the arguments before
1595 // passing them to the callee and perform checks before and after the
1596 // native call to ensure that they GCLocker
1597 // lock_critical/unlock_critical semantics are followed. Some other
1598 // parts of JNI setup are skipped like the tear down of the JNI handle
1599 // block and the check for pending exceptions it's impossible for them
1600 // to be thrown.
1601 //
1602 // They are roughly structured like this:
1603 // if (GCLocker::needs_gc())
1604 // SharedRuntime::block_for_jni_critical();
1605 // tranistion to thread_in_native
1606 // unpack arrray arguments and call native entry point
1607 // check for safepoint in progress
1608 // check if any thread suspend flags are set
1609 // call into JVM and possible unlock the JNI critical
1610 // if a GC was suppressed while in the critical native.
1611 // transition back to thread_in_Java
1612 // return to caller
1613 //
1614 nmethod* SharedRuntime::generate_native_wrapper(MacroAssembler* masm,
1615 const methodHandle& method,
1616 int compile_id,
1617 BasicType* in_sig_bt,
1618 VMRegPair* in_regs,
1619 BasicType ret_type,
1620 address critical_entry) {
1621 if (method->is_method_handle_intrinsic()) {
1622 vmIntrinsics::ID iid = method->intrinsic_id();
1623 intptr_t start = (intptr_t)__ pc();
1624 int vep_offset = ((intptr_t)__ pc()) - start;
1625 gen_special_dispatch(masm,
1626 method,
1627 in_sig_bt,
1628 in_regs);
1629 int frame_complete = ((intptr_t)__ pc()) - start; // not complete, period
1630 __ flush();
1631 int stack_slots = SharedRuntime::out_preserve_stack_slots(); // no out slots at all, actually
1632 return nmethod::new_native_nmethod(method,
1633 compile_id,
1634 masm->code(),
1635 vep_offset,
1636 frame_complete,
1637 stack_slots / VMRegImpl::slots_per_word,
1638 in_ByteSize(-1),
1639 in_ByteSize(-1),
1640 (OopMapSet*)NULL);
1641 }
1642 bool is_critical_native = true;
1643 address native_func = critical_entry;
1644 if (native_func == NULL) {
1645 native_func = method->native_function();
1646 is_critical_native = false;
1647 }
1648 assert(native_func != NULL, "must have function");
1649
1650 // An OopMap for lock (and class if static)
1651 OopMapSet *oop_maps = new OopMapSet();
1652
1653 // We have received a description of where all the java arg are located
1654 // on entry to the wrapper. We need to convert these args to where
1655 // the jni function will expect them. To figure out where they go
1656 // we convert the java signature to a C signature by inserting
1657 // the hidden arguments as arg[0] and possibly arg[1] (static method)
1658
1659 const int total_in_args = method->size_of_parameters();
1660 int total_c_args = total_in_args;
1661 if (!is_critical_native) {
1662 total_c_args += 1;
1663 if (method->is_static()) {
1664 total_c_args++;
1665 }
1666 } else {
1667 for (int i = 0; i < total_in_args; i++) {
1668 if (in_sig_bt[i] == T_ARRAY) {
1669 total_c_args++;
1670 }
1671 }
1672 }
1673
1674 BasicType* out_sig_bt = NEW_RESOURCE_ARRAY(BasicType, total_c_args);
1675 VMRegPair* out_regs = NEW_RESOURCE_ARRAY(VMRegPair, total_c_args);
1676 BasicType* in_elem_bt = NULL;
1677
1678 int argc = 0;
1679 if (!is_critical_native) {
1680 out_sig_bt[argc++] = T_ADDRESS;
1681 if (method->is_static()) {
1682 out_sig_bt[argc++] = T_OBJECT;
1683 }
1684
1685 for (int i = 0; i < total_in_args ; i++ ) {
1686 out_sig_bt[argc++] = in_sig_bt[i];
1687 }
1688 } else {
1689 Thread* THREAD = Thread::current();
1690 in_elem_bt = NEW_RESOURCE_ARRAY(BasicType, total_in_args);
1691 SignatureStream ss(method->signature());
1692 for (int i = 0; i < total_in_args ; i++ ) {
1693 if (in_sig_bt[i] == T_ARRAY) {
1694 // Arrays are passed as int, elem* pair
1695 out_sig_bt[argc++] = T_INT;
1696 out_sig_bt[argc++] = T_ADDRESS;
1697 Symbol* atype = ss.as_symbol(CHECK_NULL);
1698 const char* at = atype->as_C_string();
1699 if (strlen(at) == 2) {
1700 assert(at[0] == '[', "must be");
1701 switch (at[1]) {
1702 case 'B': in_elem_bt[i] = T_BYTE; break;
1703 case 'C': in_elem_bt[i] = T_CHAR; break;
1704 case 'D': in_elem_bt[i] = T_DOUBLE; break;
1705 case 'F': in_elem_bt[i] = T_FLOAT; break;
1706 case 'I': in_elem_bt[i] = T_INT; break;
1707 case 'J': in_elem_bt[i] = T_LONG; break;
1708 case 'S': in_elem_bt[i] = T_SHORT; break;
1709 case 'Z': in_elem_bt[i] = T_BOOLEAN; break;
1710 default: ShouldNotReachHere();
1711 }
1712 }
1713 } else {
1714 out_sig_bt[argc++] = in_sig_bt[i];
1715 in_elem_bt[i] = T_VOID;
1716 }
1717 if (in_sig_bt[i] != T_VOID) {
1718 assert(in_sig_bt[i] == ss.type(), "must match");
1719 ss.next();
1720 }
1721 }
1722 }
1723
1724 // Now figure out where the args must be stored and how much stack space
1725 // they require.
1726 int out_arg_slots;
1727 out_arg_slots = c_calling_convention(out_sig_bt, out_regs, NULL, total_c_args);
1728
1729 // Compute framesize for the wrapper. We need to handlize all oops in
1730 // registers a max of 2 on x86.
1731
1732 // Calculate the total number of stack slots we will need.
1733
1734 // First count the abi requirement plus all of the outgoing args
1735 int stack_slots = SharedRuntime::out_preserve_stack_slots() + out_arg_slots;
1736
1737 // Now the space for the inbound oop handle area
1738 int total_save_slots = 2 * VMRegImpl::slots_per_word; // 2 arguments passed in registers
1739 if (is_critical_native) {
1740 // Critical natives may have to call out so they need a save area
1741 // for register arguments.
1742 int double_slots = 0;
1743 int single_slots = 0;
1744 for ( int i = 0; i < total_in_args; i++) {
1745 if (in_regs[i].first()->is_Register()) {
1746 const Register reg = in_regs[i].first()->as_Register();
1747 switch (in_sig_bt[i]) {
1748 case T_ARRAY: // critical array (uses 2 slots on LP64)
1749 case T_BOOLEAN:
1750 case T_BYTE:
1751 case T_SHORT:
1752 case T_CHAR:
1753 case T_INT: single_slots++; break;
1754 case T_LONG: double_slots++; break;
1755 default: ShouldNotReachHere();
1756 }
1757 } else if (in_regs[i].first()->is_XMMRegister()) {
1758 switch (in_sig_bt[i]) {
1759 case T_FLOAT: single_slots++; break;
1760 case T_DOUBLE: double_slots++; break;
1761 default: ShouldNotReachHere();
1762 }
1763 } else if (in_regs[i].first()->is_FloatRegister()) {
1764 ShouldNotReachHere();
1765 }
1766 }
1767 total_save_slots = double_slots * 2 + single_slots;
1768 // align the save area
1769 if (double_slots != 0) {
1770 stack_slots = align_up(stack_slots, 2);
1771 }
1772 }
1773
1774 int oop_handle_offset = stack_slots;
1775 stack_slots += total_save_slots;
1776
1777 // Now any space we need for handlizing a klass if static method
1778
1779 int klass_slot_offset = 0;
1780 int klass_offset = -1;
1781 int lock_slot_offset = 0;
1782 bool is_static = false;
1783
1784 if (method->is_static()) {
1785 klass_slot_offset = stack_slots;
1786 stack_slots += VMRegImpl::slots_per_word;
1787 klass_offset = klass_slot_offset * VMRegImpl::stack_slot_size;
1788 is_static = true;
1789 }
1790
1791 // Plus a lock if needed
1792
1793 if (method->is_synchronized()) {
1794 lock_slot_offset = stack_slots;
1795 stack_slots += VMRegImpl::slots_per_word;
1796 }
1797
1798 // Now a place (+2) to save return values or temp during shuffling
1799 // + 2 for return address (which we own) and saved rbp,
1800 stack_slots += 4;
1801
1802 // Ok The space we have allocated will look like:
1803 //
1804 //
1805 // FP-> | |
1806 // |---------------------|
1807 // | 2 slots for moves |
1808 // |---------------------|
1809 // | lock box (if sync) |
1810 // |---------------------| <- lock_slot_offset (-lock_slot_rbp_offset)
1811 // | klass (if static) |
1812 // |---------------------| <- klass_slot_offset
1813 // | oopHandle area |
1814 // |---------------------| <- oop_handle_offset (a max of 2 registers)
1815 // | outbound memory |
1816 // | based arguments |
1817 // | |
1818 // |---------------------|
1819 // | |
1820 // SP-> | out_preserved_slots |
1821 //
1822 //
1823 // ****************************************************************************
1824 // WARNING - on Windows Java Natives use pascal calling convention and pop the
1825 // arguments off of the stack after the jni call. Before the call we can use
1826 // instructions that are SP relative. After the jni call we switch to FP
1827 // relative instructions instead of re-adjusting the stack on windows.
1828 // ****************************************************************************
1829
1830
1831 // Now compute actual number of stack words we need rounding to make
1832 // stack properly aligned.
1833 stack_slots = align_up(stack_slots, StackAlignmentInSlots);
1834
1835 int stack_size = stack_slots * VMRegImpl::stack_slot_size;
1836
1837 intptr_t start = (intptr_t)__ pc();
1838
1839 // First thing make an ic check to see if we should even be here
1840
1841 // We are free to use all registers as temps without saving them and
1842 // restoring them except rbp. rbp is the only callee save register
1843 // as far as the interpreter and the compiler(s) are concerned.
1844
1845
1846 const Register ic_reg = rax;
1847 const Register receiver = rcx;
1848 Label hit;
1849 Label exception_pending;
1850
1851 __ verify_oop(receiver);
1852 __ cmpptr(ic_reg, Address(receiver, oopDesc::klass_offset_in_bytes()));
1853 __ jcc(Assembler::equal, hit);
1854
1855 __ jump(RuntimeAddress(SharedRuntime::get_ic_miss_stub()));
1856
1857 // verified entry must be aligned for code patching.
1858 // and the first 5 bytes must be in the same cache line
1859 // if we align at 8 then we will be sure 5 bytes are in the same line
1860 __ align(8);
1861
1862 __ bind(hit);
1863
1864 int vep_offset = ((intptr_t)__ pc()) - start;
1865
1866 #ifdef COMPILER1
1867 // For Object.hashCode, System.identityHashCode try to pull hashCode from object header if available.
1868 if ((InlineObjectHash && method->intrinsic_id() == vmIntrinsics::_hashCode) || (method->intrinsic_id() == vmIntrinsics::_identityHashCode)) {
1869 inline_check_hashcode_from_object_header(masm, method, rcx /*obj_reg*/, rax /*result*/);
1870 }
1871 #endif // COMPILER1
1872
1873 // The instruction at the verified entry point must be 5 bytes or longer
1874 // because it can be patched on the fly by make_non_entrant. The stack bang
1875 // instruction fits that requirement.
1876
1877 // Generate stack overflow check
1878
1879 if (UseStackBanging) {
1880 __ bang_stack_with_offset((int)JavaThread::stack_shadow_zone_size());
1881 } else {
1882 // need a 5 byte instruction to allow MT safe patching to non-entrant
1883 __ fat_nop();
1884 }
1885
1886 // Generate a new frame for the wrapper.
1887 __ enter();
1888 // -2 because return address is already present and so is saved rbp
1889 __ subptr(rsp, stack_size - 2*wordSize);
1890
1891 // Frame is now completed as far as size and linkage.
1892 int frame_complete = ((intptr_t)__ pc()) - start;
1893
1894 if (UseRTMLocking) {
1895 // Abort RTM transaction before calling JNI
1896 // because critical section will be large and will be
1897 // aborted anyway. Also nmethod could be deoptimized.
1898 __ xabort(0);
1899 }
1900
1901 // Calculate the difference between rsp and rbp,. We need to know it
1902 // after the native call because on windows Java Natives will pop
1903 // the arguments and it is painful to do rsp relative addressing
1904 // in a platform independent way. So after the call we switch to
1905 // rbp, relative addressing.
1906
1907 int fp_adjustment = stack_size - 2*wordSize;
1908
1909 #ifdef COMPILER2
1910 // C2 may leave the stack dirty if not in SSE2+ mode
1911 if (UseSSE >= 2) {
1912 __ verify_FPU(0, "c2i transition should have clean FPU stack");
1913 } else {
1914 __ empty_FPU_stack();
1915 }
1916 #endif /* COMPILER2 */
1917
1918 // Compute the rbp, offset for any slots used after the jni call
1919
1920 int lock_slot_rbp_offset = (lock_slot_offset*VMRegImpl::stack_slot_size) - fp_adjustment;
1921
1922 // We use rdi as a thread pointer because it is callee save and
1923 // if we load it once it is usable thru the entire wrapper
1924 const Register thread = rdi;
1925
1926 // We use rsi as the oop handle for the receiver/klass
1927 // It is callee save so it survives the call to native
1928
1929 const Register oop_handle_reg = rsi;
1930
1931 __ get_thread(thread);
1932
1933 if (is_critical_native && !Universe::heap()->supports_object_pinning()) {
1934 check_needs_gc_for_critical_native(masm, thread, stack_slots, total_c_args, total_in_args,
1935 oop_handle_offset, oop_maps, in_regs, in_sig_bt);
1936 }
1937
1938 //
1939 // We immediately shuffle the arguments so that any vm call we have to
1940 // make from here on out (sync slow path, jvmti, etc.) we will have
1941 // captured the oops from our caller and have a valid oopMap for
1942 // them.
1943
1944 // -----------------
1945 // The Grand Shuffle
1946 //
1947 // Natives require 1 or 2 extra arguments over the normal ones: the JNIEnv*
1948 // and, if static, the class mirror instead of a receiver. This pretty much
1949 // guarantees that register layout will not match (and x86 doesn't use reg
1950 // parms though amd does). Since the native abi doesn't use register args
1951 // and the java conventions does we don't have to worry about collisions.
1952 // All of our moved are reg->stack or stack->stack.
1953 // We ignore the extra arguments during the shuffle and handle them at the
1954 // last moment. The shuffle is described by the two calling convention
1955 // vectors we have in our possession. We simply walk the java vector to
1956 // get the source locations and the c vector to get the destinations.
1957
1958 int c_arg = is_critical_native ? 0 : (method->is_static() ? 2 : 1 );
1959
1960 // Record rsp-based slot for receiver on stack for non-static methods
1961 int receiver_offset = -1;
1962
1963 // This is a trick. We double the stack slots so we can claim
1964 // the oops in the caller's frame. Since we are sure to have
1965 // more args than the caller doubling is enough to make
1966 // sure we can capture all the incoming oop args from the
1967 // caller.
1968 //
1969 OopMap* map = new OopMap(stack_slots * 2, 0 /* arg_slots*/);
1970
1971 // Inbound arguments that need to be pinned for critical natives
1972 GrowableArray<int> pinned_args(total_in_args);
1973 // Current stack slot for storing register based array argument
1974 int pinned_slot = oop_handle_offset;
1975
1976 // Mark location of rbp,
1977 // map->set_callee_saved(VMRegImpl::stack2reg( stack_slots - 2), stack_slots * 2, 0, rbp->as_VMReg());
1978
1979 // We know that we only have args in at most two integer registers (rcx, rdx). So rax, rbx
1980 // Are free to temporaries if we have to do stack to steck moves.
1981 // All inbound args are referenced based on rbp, and all outbound args via rsp.
1982
1983 for (int i = 0; i < total_in_args ; i++, c_arg++ ) {
1984 switch (in_sig_bt[i]) {
1985 case T_ARRAY:
1986 if (is_critical_native) {
1987 VMRegPair in_arg = in_regs[i];
1988 if (Universe::heap()->supports_object_pinning()) {
1989 // gen_pin_object handles save and restore
1990 // of any clobbered registers
1991 gen_pin_object(masm, thread, in_arg);
1992 pinned_args.append(i);
1993
1994 // rax has pinned array
1995 VMRegPair result_reg(rax->as_VMReg());
1996 if (!in_arg.first()->is_stack()) {
1997 assert(pinned_slot <= stack_slots, "overflow");
1998 simple_move32(masm, result_reg, VMRegImpl::stack2reg(pinned_slot));
1999 pinned_slot += VMRegImpl::slots_per_word;
2000 } else {
2001 // Write back pinned value, it will be used to unpin this argument
2002 __ movptr(Address(rbp, reg2offset_in(in_arg.first())), result_reg.first()->as_Register());
2003 }
2004 // We have the array in register, use it
2005 in_arg = result_reg;
2006 }
2007
2008 unpack_array_argument(masm, in_arg, in_elem_bt[i], out_regs[c_arg + 1], out_regs[c_arg]);
2009 c_arg++;
2010 break;
2011 }
2012 case T_OBJECT:
2013 assert(!is_critical_native, "no oop arguments");
2014 object_move(masm, map, oop_handle_offset, stack_slots, in_regs[i], out_regs[c_arg],
2015 ((i == 0) && (!is_static)),
2016 &receiver_offset);
2017 break;
2018 case T_VOID:
2019 break;
2020
2021 case T_FLOAT:
2022 float_move(masm, in_regs[i], out_regs[c_arg]);
2023 break;
2024
2025 case T_DOUBLE:
2026 assert( i + 1 < total_in_args &&
2027 in_sig_bt[i + 1] == T_VOID &&
2028 out_sig_bt[c_arg+1] == T_VOID, "bad arg list");
2029 double_move(masm, in_regs[i], out_regs[c_arg]);
2030 break;
2031
2032 case T_LONG :
2033 long_move(masm, in_regs[i], out_regs[c_arg]);
2034 break;
2035
2036 case T_ADDRESS: assert(false, "found T_ADDRESS in java args");
2037
2038 default:
2039 simple_move32(masm, in_regs[i], out_regs[c_arg]);
2040 }
2041 }
2042
2043 // Pre-load a static method's oop into rsi. Used both by locking code and
2044 // the normal JNI call code.
2045 if (method->is_static() && !is_critical_native) {
2046
2047 // load opp into a register
2048 __ movoop(oop_handle_reg, JNIHandles::make_local(method->method_holder()->java_mirror()));
2049
2050 // Now handlize the static class mirror it's known not-null.
2051 __ movptr(Address(rsp, klass_offset), oop_handle_reg);
2052 map->set_oop(VMRegImpl::stack2reg(klass_slot_offset));
2053
2054 // Now get the handle
2055 __ lea(oop_handle_reg, Address(rsp, klass_offset));
2056 // store the klass handle as second argument
2057 __ movptr(Address(rsp, wordSize), oop_handle_reg);
2058 }
2059
2060 // Change state to native (we save the return address in the thread, since it might not
2061 // be pushed on the stack when we do a a stack traversal). It is enough that the pc()
2062 // points into the right code segment. It does not have to be the correct return pc.
2063 // We use the same pc/oopMap repeatedly when we call out
2064
2065 intptr_t the_pc = (intptr_t) __ pc();
2066 oop_maps->add_gc_map(the_pc - start, map);
2067
2068 __ set_last_Java_frame(thread, rsp, noreg, (address)the_pc);
2069
2070
2071 // We have all of the arguments setup at this point. We must not touch any register
2072 // argument registers at this point (what if we save/restore them there are no oop?
2073
2074 {
2075 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
2076 __ mov_metadata(rax, method());
2077 __ call_VM_leaf(
2078 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_entry),
2079 thread, rax);
2080 }
2081
2082 // RedefineClasses() tracing support for obsolete method entry
2083 if (log_is_enabled(Trace, redefine, class, obsolete)) {
2084 __ mov_metadata(rax, method());
2085 __ call_VM_leaf(
2086 CAST_FROM_FN_PTR(address, SharedRuntime::rc_trace_method_entry),
2087 thread, rax);
2088 }
2089
2090 // These are register definitions we need for locking/unlocking
2091 const Register swap_reg = rax; // Must use rax, for cmpxchg instruction
2092 const Register obj_reg = rcx; // Will contain the oop
2093 const Register lock_reg = rdx; // Address of compiler lock object (BasicLock)
2094
2095 Label slow_path_lock;
2096 Label lock_done;
2097
2098 // Lock a synchronized method
2099 if (method->is_synchronized()) {
2100 assert(!is_critical_native, "unhandled");
2101
2102
2103 const int mark_word_offset = BasicLock::displaced_header_offset_in_bytes();
2104
2105 // Get the handle (the 2nd argument)
2106 __ movptr(oop_handle_reg, Address(rsp, wordSize));
2107
2108 // Get address of the box
2109
2110 __ lea(lock_reg, Address(rbp, lock_slot_rbp_offset));
2111
2112 // Load the oop from the handle
2113 __ movptr(obj_reg, Address(oop_handle_reg, 0));
2114
2115 if (UseBiasedLocking) {
2116 // Note that oop_handle_reg is trashed during this call
2117 __ biased_locking_enter(lock_reg, obj_reg, swap_reg, oop_handle_reg, false, lock_done, &slow_path_lock);
2118 }
2119
2120 // Load immediate 1 into swap_reg %rax,
2121 __ movptr(swap_reg, 1);
2122
2123 // Load (object->mark() | 1) into swap_reg %rax,
2124 __ orptr(swap_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2125
2126 // Save (object->mark() | 1) into BasicLock's displaced header
2127 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2128
2129 if (os::is_MP()) {
2130 __ lock();
2131 }
2132
2133 // src -> dest iff dest == rax, else rax, <- dest
2134 // *obj_reg = lock_reg iff *obj_reg == rax, else rax, = *(obj_reg)
2135 __ cmpxchgptr(lock_reg, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2136 __ jcc(Assembler::equal, lock_done);
2137
2138 // Test if the oopMark is an obvious stack pointer, i.e.,
2139 // 1) (mark & 3) == 0, and
2140 // 2) rsp <= mark < mark + os::pagesize()
2141 // These 3 tests can be done by evaluating the following
2142 // expression: ((mark - rsp) & (3 - os::vm_page_size())),
2143 // assuming both stack pointer and pagesize have their
2144 // least significant 2 bits clear.
2145 // NOTE: the oopMark is in swap_reg %rax, as the result of cmpxchg
2146
2147 __ subptr(swap_reg, rsp);
2148 __ andptr(swap_reg, 3 - os::vm_page_size());
2149
2150 // Save the test result, for recursive case, the result is zero
2151 __ movptr(Address(lock_reg, mark_word_offset), swap_reg);
2152 __ jcc(Assembler::notEqual, slow_path_lock);
2153 // Slow path will re-enter here
2154 __ bind(lock_done);
2155
2156 if (UseBiasedLocking) {
2157 // Re-fetch oop_handle_reg as we trashed it above
2158 __ movptr(oop_handle_reg, Address(rsp, wordSize));
2159 }
2160 }
2161
2162
2163 // Finally just about ready to make the JNI call
2164
2165
2166 // get JNIEnv* which is first argument to native
2167 if (!is_critical_native) {
2168 __ lea(rdx, Address(thread, in_bytes(JavaThread::jni_environment_offset())));
2169 __ movptr(Address(rsp, 0), rdx);
2170 }
2171
2172 // Now set thread in native
2173 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native);
2174
2175 __ call(RuntimeAddress(native_func));
2176
2177 // Verify or restore cpu control state after JNI call
2178 __ restore_cpu_control_state_after_jni();
2179
2180 // WARNING - on Windows Java Natives use pascal calling convention and pop the
2181 // arguments off of the stack. We could just re-adjust the stack pointer here
2182 // and continue to do SP relative addressing but we instead switch to FP
2183 // relative addressing.
2184
2185 // Unpack native results.
2186 switch (ret_type) {
2187 case T_BOOLEAN: __ c2bool(rax); break;
2188 case T_CHAR : __ andptr(rax, 0xFFFF); break;
2189 case T_BYTE : __ sign_extend_byte (rax); break;
2190 case T_SHORT : __ sign_extend_short(rax); break;
2191 case T_INT : /* nothing to do */ break;
2192 case T_DOUBLE :
2193 case T_FLOAT :
2194 // Result is in st0 we'll save as needed
2195 break;
2196 case T_ARRAY: // Really a handle
2197 case T_OBJECT: // Really a handle
2198 break; // can't de-handlize until after safepoint check
2199 case T_VOID: break;
2200 case T_LONG: break;
2201 default : ShouldNotReachHere();
2202 }
2203
2204 // unpin pinned arguments
2205 pinned_slot = oop_handle_offset;
2206 if (pinned_args.length() > 0) {
2207 // save return value that may be overwritten otherwise.
2208 save_native_result(masm, ret_type, stack_slots);
2209 for (int index = 0; index < pinned_args.length(); index ++) {
2210 int i = pinned_args.at(index);
2211 assert(pinned_slot <= stack_slots, "overflow");
2212 if (!in_regs[i].first()->is_stack()) {
2213 int offset = pinned_slot * VMRegImpl::stack_slot_size;
2214 __ movl(in_regs[i].first()->as_Register(), Address(rsp, offset));
2215 pinned_slot += VMRegImpl::slots_per_word;
2216 }
2217 // gen_pin_object handles save and restore
2218 // of any other clobbered registers
2219 gen_unpin_object(masm, thread, in_regs[i]);
2220 }
2221 restore_native_result(masm, ret_type, stack_slots);
2222 }
2223
2224 // Switch thread to "native transition" state before reading the synchronization state.
2225 // This additional state is necessary because reading and testing the synchronization
2226 // state is not atomic w.r.t. GC, as this scenario demonstrates:
2227 // Java thread A, in _thread_in_native state, loads _not_synchronized and is preempted.
2228 // VM thread changes sync state to synchronizing and suspends threads for GC.
2229 // Thread A is resumed to finish this native method, but doesn't block here since it
2230 // didn't see any synchronization is progress, and escapes.
2231 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_native_trans);
2232
2233 if(os::is_MP()) {
2234 if (UseMembar) {
2235 // Force this write out before the read below
2236 __ membar(Assembler::Membar_mask_bits(
2237 Assembler::LoadLoad | Assembler::LoadStore |
2238 Assembler::StoreLoad | Assembler::StoreStore));
2239 } else {
2240 // Write serialization page so VM thread can do a pseudo remote membar.
2241 // We use the current thread pointer to calculate a thread specific
2242 // offset to write to within the page. This minimizes bus traffic
2243 // due to cache line collision.
2244 __ serialize_memory(thread, rcx);
2245 }
2246 }
2247
2248 if (AlwaysRestoreFPU) {
2249 // Make sure the control word is correct.
2250 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2251 }
2252
2253 Label after_transition;
2254
2255 // check for safepoint operation in progress and/or pending suspend requests
2256 { Label Continue, slow_path;
2257
2258 __ safepoint_poll(slow_path, thread, noreg);
2259
2260 __ cmpl(Address(thread, JavaThread::suspend_flags_offset()), 0);
2261 __ jcc(Assembler::equal, Continue);
2262 __ bind(slow_path);
2263
2264 // Don't use call_VM as it will see a possible pending exception and forward it
2265 // and never return here preventing us from clearing _last_native_pc down below.
2266 // Also can't use call_VM_leaf either as it will check to see if rsi & rdi are
2267 // preserved and correspond to the bcp/locals pointers. So we do a runtime call
2268 // by hand.
2269 //
2270 __ vzeroupper();
2271
2272 save_native_result(masm, ret_type, stack_slots);
2273 __ push(thread);
2274 if (!is_critical_native) {
2275 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
2276 JavaThread::check_special_condition_for_native_trans)));
2277 } else {
2278 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address,
2279 JavaThread::check_special_condition_for_native_trans_and_transition)));
2280 }
2281 __ increment(rsp, wordSize);
2282 // Restore any method result value
2283 restore_native_result(masm, ret_type, stack_slots);
2284
2285 if (is_critical_native) {
2286 // The call above performed the transition to thread_in_Java so
2287 // skip the transition logic below.
2288 __ jmpb(after_transition);
2289 }
2290
2291 __ bind(Continue);
2292 }
2293
2294 // change thread state
2295 __ movl(Address(thread, JavaThread::thread_state_offset()), _thread_in_Java);
2296 __ bind(after_transition);
2297
2298 Label reguard;
2299 Label reguard_done;
2300 __ cmpl(Address(thread, JavaThread::stack_guard_state_offset()), JavaThread::stack_guard_yellow_reserved_disabled);
2301 __ jcc(Assembler::equal, reguard);
2302
2303 // slow path reguard re-enters here
2304 __ bind(reguard_done);
2305
2306 // Handle possible exception (will unlock if necessary)
2307
2308 // native result if any is live
2309
2310 // Unlock
2311 Label slow_path_unlock;
2312 Label unlock_done;
2313 if (method->is_synchronized()) {
2314
2315 Label done;
2316
2317 // Get locked oop from the handle we passed to jni
2318 __ movptr(obj_reg, Address(oop_handle_reg, 0));
2319
2320 if (UseBiasedLocking) {
2321 __ biased_locking_exit(obj_reg, rbx, done);
2322 }
2323
2324 // Simple recursive lock?
2325
2326 __ cmpptr(Address(rbp, lock_slot_rbp_offset), (int32_t)NULL_WORD);
2327 __ jcc(Assembler::equal, done);
2328
2329 // Must save rax, if if it is live now because cmpxchg must use it
2330 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2331 save_native_result(masm, ret_type, stack_slots);
2332 }
2333
2334 // get old displaced header
2335 __ movptr(rbx, Address(rbp, lock_slot_rbp_offset));
2336
2337 // get address of the stack lock
2338 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2339
2340 // Atomic swap old header if oop still contains the stack lock
2341 if (os::is_MP()) {
2342 __ lock();
2343 }
2344
2345 // src -> dest iff dest == rax, else rax, <- dest
2346 // *obj_reg = rbx, iff *obj_reg == rax, else rax, = *(obj_reg)
2347 __ cmpxchgptr(rbx, Address(obj_reg, oopDesc::mark_offset_in_bytes()));
2348 __ jcc(Assembler::notEqual, slow_path_unlock);
2349
2350 // slow path re-enters here
2351 __ bind(unlock_done);
2352 if (ret_type != T_FLOAT && ret_type != T_DOUBLE && ret_type != T_VOID) {
2353 restore_native_result(masm, ret_type, stack_slots);
2354 }
2355
2356 __ bind(done);
2357
2358 }
2359
2360 {
2361 SkipIfEqual skip_if(masm, &DTraceMethodProbes, 0);
2362 // Tell dtrace about this method exit
2363 save_native_result(masm, ret_type, stack_slots);
2364 __ mov_metadata(rax, method());
2365 __ call_VM_leaf(
2366 CAST_FROM_FN_PTR(address, SharedRuntime::dtrace_method_exit),
2367 thread, rax);
2368 restore_native_result(masm, ret_type, stack_slots);
2369 }
2370
2371 // We can finally stop using that last_Java_frame we setup ages ago
2372
2373 __ reset_last_Java_frame(thread, false);
2374
2375 // Unbox oop result, e.g. JNIHandles::resolve value.
2376 if (ret_type == T_OBJECT || ret_type == T_ARRAY) {
2377 __ resolve_jobject(rax /* value */,
2378 thread /* thread */,
2379 rcx /* tmp */);
2380 }
2381
2382 if (CheckJNICalls) {
2383 // clear_pending_jni_exception_check
2384 __ movptr(Address(thread, JavaThread::pending_jni_exception_check_fn_offset()), NULL_WORD);
2385 }
2386
2387 if (!is_critical_native) {
2388 // reset handle block
2389 __ movptr(rcx, Address(thread, JavaThread::active_handles_offset()));
2390 __ movl(Address(rcx, JNIHandleBlock::top_offset_in_bytes()), NULL_WORD);
2391
2392 // Any exception pending?
2393 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2394 __ jcc(Assembler::notEqual, exception_pending);
2395 }
2396
2397 // no exception, we're almost done
2398
2399 // check that only result value is on FPU stack
2400 __ verify_FPU(ret_type == T_FLOAT || ret_type == T_DOUBLE ? 1 : 0, "native_wrapper normal exit");
2401
2402 // Fixup floating pointer results so that result looks like a return from a compiled method
2403 if (ret_type == T_FLOAT) {
2404 if (UseSSE >= 1) {
2405 // Pop st0 and store as float and reload into xmm register
2406 __ fstp_s(Address(rbp, -4));
2407 __ movflt(xmm0, Address(rbp, -4));
2408 }
2409 } else if (ret_type == T_DOUBLE) {
2410 if (UseSSE >= 2) {
2411 // Pop st0 and store as double and reload into xmm register
2412 __ fstp_d(Address(rbp, -8));
2413 __ movdbl(xmm0, Address(rbp, -8));
2414 }
2415 }
2416
2417 // Return
2418
2419 __ leave();
2420 __ ret(0);
2421
2422 // Unexpected paths are out of line and go here
2423
2424 // Slow path locking & unlocking
2425 if (method->is_synchronized()) {
2426
2427 // BEGIN Slow path lock
2428
2429 __ bind(slow_path_lock);
2430
2431 // has last_Java_frame setup. No exceptions so do vanilla call not call_VM
2432 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2433 __ push(thread);
2434 __ push(lock_reg);
2435 __ push(obj_reg);
2436 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_locking_C)));
2437 __ addptr(rsp, 3*wordSize);
2438
2439 #ifdef ASSERT
2440 { Label L;
2441 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int)NULL_WORD);
2442 __ jcc(Assembler::equal, L);
2443 __ stop("no pending exception allowed on exit from monitorenter");
2444 __ bind(L);
2445 }
2446 #endif
2447 __ jmp(lock_done);
2448
2449 // END Slow path lock
2450
2451 // BEGIN Slow path unlock
2452 __ bind(slow_path_unlock);
2453 __ vzeroupper();
2454 // Slow path unlock
2455
2456 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2457 save_native_result(masm, ret_type, stack_slots);
2458 }
2459 // Save pending exception around call to VM (which contains an EXCEPTION_MARK)
2460
2461 __ pushptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2462 __ movptr(Address(thread, in_bytes(Thread::pending_exception_offset())), NULL_WORD);
2463
2464
2465 // should be a peal
2466 // +wordSize because of the push above
2467 // args are (oop obj, BasicLock* lock, JavaThread* thread)
2468 __ push(thread);
2469 __ lea(rax, Address(rbp, lock_slot_rbp_offset));
2470 __ push(rax);
2471
2472 __ push(obj_reg);
2473 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::complete_monitor_unlocking_C)));
2474 __ addptr(rsp, 3*wordSize);
2475 #ifdef ASSERT
2476 {
2477 Label L;
2478 __ cmpptr(Address(thread, in_bytes(Thread::pending_exception_offset())), (int32_t)NULL_WORD);
2479 __ jcc(Assembler::equal, L);
2480 __ stop("no pending exception allowed on exit complete_monitor_unlocking_C");
2481 __ bind(L);
2482 }
2483 #endif /* ASSERT */
2484
2485 __ popptr(Address(thread, in_bytes(Thread::pending_exception_offset())));
2486
2487 if (ret_type == T_FLOAT || ret_type == T_DOUBLE ) {
2488 restore_native_result(masm, ret_type, stack_slots);
2489 }
2490 __ jmp(unlock_done);
2491 // END Slow path unlock
2492
2493 }
2494
2495 // SLOW PATH Reguard the stack if needed
2496
2497 __ bind(reguard);
2498 __ vzeroupper();
2499 save_native_result(masm, ret_type, stack_slots);
2500 {
2501 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, SharedRuntime::reguard_yellow_pages)));
2502 }
2503 restore_native_result(masm, ret_type, stack_slots);
2504 __ jmp(reguard_done);
2505
2506
2507 // BEGIN EXCEPTION PROCESSING
2508
2509 if (!is_critical_native) {
2510 // Forward the exception
2511 __ bind(exception_pending);
2512
2513 // remove possible return value from FPU register stack
2514 __ empty_FPU_stack();
2515
2516 // pop our frame
2517 __ leave();
2518 // and forward the exception
2519 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
2520 }
2521
2522 __ flush();
2523
2524 nmethod *nm = nmethod::new_native_nmethod(method,
2525 compile_id,
2526 masm->code(),
2527 vep_offset,
2528 frame_complete,
2529 stack_slots / VMRegImpl::slots_per_word,
2530 (is_static ? in_ByteSize(klass_offset) : in_ByteSize(receiver_offset)),
2531 in_ByteSize(lock_slot_offset*VMRegImpl::stack_slot_size),
2532 oop_maps);
2533
2534 if (is_critical_native) {
2535 nm->set_lazy_critical_native(true);
2536 }
2537
2538 return nm;
2539
2540 }
2541
2542 // this function returns the adjust size (in number of words) to a c2i adapter
2543 // activation for use during deoptimization
2544 int Deoptimization::last_frame_adjust(int callee_parameters, int callee_locals ) {
2545 return (callee_locals - callee_parameters) * Interpreter::stackElementWords;
2546 }
2547
2548
2549 uint SharedRuntime::out_preserve_stack_slots() {
2550 return 0;
2551 }
2552
2553 //------------------------------generate_deopt_blob----------------------------
2554 void SharedRuntime::generate_deopt_blob() {
2555 // allocate space for the code
2556 ResourceMark rm;
2557 // setup code generation tools
2558 // note: the buffer code size must account for StackShadowPages=50
2559 CodeBuffer buffer("deopt_blob", 1536, 1024);
2560 MacroAssembler* masm = new MacroAssembler(&buffer);
2561 int frame_size_in_words;
2562 OopMap* map = NULL;
2563 // Account for the extra args we place on the stack
2564 // by the time we call fetch_unroll_info
2565 const int additional_words = 2; // deopt kind, thread
2566
2567 OopMapSet *oop_maps = new OopMapSet();
2568
2569 // -------------
2570 // This code enters when returning to a de-optimized nmethod. A return
2571 // address has been pushed on the the stack, and return values are in
2572 // registers.
2573 // If we are doing a normal deopt then we were called from the patched
2574 // nmethod from the point we returned to the nmethod. So the return
2575 // address on the stack is wrong by NativeCall::instruction_size
2576 // We will adjust the value to it looks like we have the original return
2577 // address on the stack (like when we eagerly deoptimized).
2578 // In the case of an exception pending with deoptimized then we enter
2579 // with a return address on the stack that points after the call we patched
2580 // into the exception handler. We have the following register state:
2581 // rax,: exception
2582 // rbx,: exception handler
2583 // rdx: throwing pc
2584 // So in this case we simply jam rdx into the useless return address and
2585 // the stack looks just like we want.
2586 //
2587 // At this point we need to de-opt. We save the argument return
2588 // registers. We call the first C routine, fetch_unroll_info(). This
2589 // routine captures the return values and returns a structure which
2590 // describes the current frame size and the sizes of all replacement frames.
2591 // The current frame is compiled code and may contain many inlined
2592 // functions, each with their own JVM state. We pop the current frame, then
2593 // push all the new frames. Then we call the C routine unpack_frames() to
2594 // populate these frames. Finally unpack_frames() returns us the new target
2595 // address. Notice that callee-save registers are BLOWN here; they have
2596 // already been captured in the vframeArray at the time the return PC was
2597 // patched.
2598 address start = __ pc();
2599 Label cont;
2600
2601 // Prolog for non exception case!
2602
2603 // Save everything in sight.
2604
2605 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2606 // Normal deoptimization
2607 __ push(Deoptimization::Unpack_deopt);
2608 __ jmp(cont);
2609
2610 int reexecute_offset = __ pc() - start;
2611
2612 // Reexecute case
2613 // return address is the pc describes what bci to do re-execute at
2614
2615 // No need to update map as each call to save_live_registers will produce identical oopmap
2616 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2617
2618 __ push(Deoptimization::Unpack_reexecute);
2619 __ jmp(cont);
2620
2621 int exception_offset = __ pc() - start;
2622
2623 // Prolog for exception case
2624
2625 // all registers are dead at this entry point, except for rax, and
2626 // rdx which contain the exception oop and exception pc
2627 // respectively. Set them in TLS and fall thru to the
2628 // unpack_with_exception_in_tls entry point.
2629
2630 __ get_thread(rdi);
2631 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), rdx);
2632 __ movptr(Address(rdi, JavaThread::exception_oop_offset()), rax);
2633
2634 int exception_in_tls_offset = __ pc() - start;
2635
2636 // new implementation because exception oop is now passed in JavaThread
2637
2638 // Prolog for exception case
2639 // All registers must be preserved because they might be used by LinearScan
2640 // Exceptiop oop and throwing PC are passed in JavaThread
2641 // tos: stack at point of call to method that threw the exception (i.e. only
2642 // args are on the stack, no return address)
2643
2644 // make room on stack for the return address
2645 // It will be patched later with the throwing pc. The correct value is not
2646 // available now because loading it from memory would destroy registers.
2647 __ push(0);
2648
2649 // Save everything in sight.
2650
2651 // No need to update map as each call to save_live_registers will produce identical oopmap
2652 (void) RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false);
2653
2654 // Now it is safe to overwrite any register
2655
2656 // store the correct deoptimization type
2657 __ push(Deoptimization::Unpack_exception);
2658
2659 // load throwing pc from JavaThread and patch it as the return address
2660 // of the current frame. Then clear the field in JavaThread
2661 __ get_thread(rdi);
2662 __ movptr(rdx, Address(rdi, JavaThread::exception_pc_offset()));
2663 __ movptr(Address(rbp, wordSize), rdx);
2664 __ movptr(Address(rdi, JavaThread::exception_pc_offset()), NULL_WORD);
2665
2666 #ifdef ASSERT
2667 // verify that there is really an exception oop in JavaThread
2668 __ movptr(rax, Address(rdi, JavaThread::exception_oop_offset()));
2669 __ verify_oop(rax);
2670
2671 // verify that there is no pending exception
2672 Label no_pending_exception;
2673 __ movptr(rax, Address(rdi, Thread::pending_exception_offset()));
2674 __ testptr(rax, rax);
2675 __ jcc(Assembler::zero, no_pending_exception);
2676 __ stop("must not have pending exception here");
2677 __ bind(no_pending_exception);
2678 #endif
2679
2680 __ bind(cont);
2681
2682 // Compiled code leaves the floating point stack dirty, empty it.
2683 __ empty_FPU_stack();
2684
2685
2686 // Call C code. Need thread and this frame, but NOT official VM entry
2687 // crud. We cannot block on this call, no GC can happen.
2688 __ get_thread(rcx);
2689 __ push(rcx);
2690 // fetch_unroll_info needs to call last_java_frame()
2691 __ set_last_Java_frame(rcx, noreg, noreg, NULL);
2692
2693 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::fetch_unroll_info)));
2694
2695 // Need to have an oopmap that tells fetch_unroll_info where to
2696 // find any register it might need.
2697
2698 oop_maps->add_gc_map( __ pc()-start, map);
2699
2700 // Discard args to fetch_unroll_info
2701 __ pop(rcx);
2702 __ pop(rcx);
2703
2704 __ get_thread(rcx);
2705 __ reset_last_Java_frame(rcx, false);
2706
2707 // Load UnrollBlock into EDI
2708 __ mov(rdi, rax);
2709
2710 // Move the unpack kind to a safe place in the UnrollBlock because
2711 // we are very short of registers
2712
2713 Address unpack_kind(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes());
2714 // retrieve the deopt kind from the UnrollBlock.
2715 __ movl(rax, unpack_kind);
2716
2717 Label noException;
2718 __ cmpl(rax, Deoptimization::Unpack_exception); // Was exception pending?
2719 __ jcc(Assembler::notEqual, noException);
2720 __ movptr(rax, Address(rcx, JavaThread::exception_oop_offset()));
2721 __ movptr(rdx, Address(rcx, JavaThread::exception_pc_offset()));
2722 __ movptr(Address(rcx, JavaThread::exception_oop_offset()), NULL_WORD);
2723 __ movptr(Address(rcx, JavaThread::exception_pc_offset()), NULL_WORD);
2724
2725 __ verify_oop(rax);
2726
2727 // Overwrite the result registers with the exception results.
2728 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2729 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2730
2731 __ bind(noException);
2732
2733 // Stack is back to only having register save data on the stack.
2734 // Now restore the result registers. Everything else is either dead or captured
2735 // in the vframeArray.
2736
2737 RegisterSaver::restore_result_registers(masm);
2738
2739 // Non standard control word may be leaked out through a safepoint blob, and we can
2740 // deopt at a poll point with the non standard control word. However, we should make
2741 // sure the control word is correct after restore_result_registers.
2742 __ fldcw(ExternalAddress(StubRoutines::addr_fpu_cntrl_wrd_std()));
2743
2744 // All of the register save area has been popped of the stack. Only the
2745 // return address remains.
2746
2747 // Pop all the frames we must move/replace.
2748 //
2749 // Frame picture (youngest to oldest)
2750 // 1: self-frame (no frame link)
2751 // 2: deopting frame (no frame link)
2752 // 3: caller of deopting frame (could be compiled/interpreted).
2753 //
2754 // Note: by leaving the return address of self-frame on the stack
2755 // and using the size of frame 2 to adjust the stack
2756 // when we are done the return to frame 3 will still be on the stack.
2757
2758 // Pop deoptimized frame
2759 __ addptr(rsp, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2760
2761 // sp should be pointing at the return address to the caller (3)
2762
2763 // Pick up the initial fp we should save
2764 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2765 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
2766
2767 #ifdef ASSERT
2768 // Compilers generate code that bang the stack by as much as the
2769 // interpreter would need. So this stack banging should never
2770 // trigger a fault. Verify that it does not on non product builds.
2771 if (UseStackBanging) {
2772 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2773 __ bang_stack_size(rbx, rcx);
2774 }
2775 #endif
2776
2777 // Load array of frame pcs into ECX
2778 __ movptr(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
2779
2780 __ pop(rsi); // trash the old pc
2781
2782 // Load array of frame sizes into ESI
2783 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
2784
2785 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
2786
2787 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
2788 __ movl(counter, rbx);
2789
2790 // Now adjust the caller's stack to make up for the extra locals
2791 // but record the original sp so that we can save it in the skeletal interpreter
2792 // frame and the stack walking of interpreter_sender will get the unextended sp
2793 // value and not the "real" sp value.
2794
2795 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
2796 __ movptr(sp_temp, rsp);
2797 __ movl2ptr(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
2798 __ subptr(rsp, rbx);
2799
2800 // Push interpreter frames in a loop
2801 Label loop;
2802 __ bind(loop);
2803 __ movptr(rbx, Address(rsi, 0)); // Load frame size
2804 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
2805 __ pushptr(Address(rcx, 0)); // save return address
2806 __ enter(); // save old & set new rbp,
2807 __ subptr(rsp, rbx); // Prolog!
2808 __ movptr(rbx, sp_temp); // sender's sp
2809 // This value is corrected by layout_activation_impl
2810 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD);
2811 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
2812 __ movptr(sp_temp, rsp); // pass to next frame
2813 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
2814 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
2815 __ decrementl(counter); // decrement counter
2816 __ jcc(Assembler::notZero, loop);
2817 __ pushptr(Address(rcx, 0)); // save final return address
2818
2819 // Re-push self-frame
2820 __ enter(); // save old & set new rbp,
2821
2822 // Return address and rbp, are in place
2823 // We'll push additional args later. Just allocate a full sized
2824 // register save area
2825 __ subptr(rsp, (frame_size_in_words-additional_words - 2) * wordSize);
2826
2827 // Restore frame locals after moving the frame
2828 __ movptr(Address(rsp, RegisterSaver::raxOffset()*wordSize), rax);
2829 __ movptr(Address(rsp, RegisterSaver::rdxOffset()*wordSize), rdx);
2830 __ fstp_d(Address(rsp, RegisterSaver::fpResultOffset()*wordSize)); // Pop float stack and store in local
2831 if( UseSSE>=2 ) __ movdbl(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2832 if( UseSSE==1 ) __ movflt(Address(rsp, RegisterSaver::xmm0Offset()*wordSize), xmm0);
2833
2834 // Set up the args to unpack_frame
2835
2836 __ pushl(unpack_kind); // get the unpack_kind value
2837 __ get_thread(rcx);
2838 __ push(rcx);
2839
2840 // set last_Java_sp, last_Java_fp
2841 __ set_last_Java_frame(rcx, noreg, rbp, NULL);
2842
2843 // Call C code. Need thread but NOT official VM entry
2844 // crud. We cannot block on this call, no GC can happen. Call should
2845 // restore return values to their stack-slots with the new SP.
2846 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
2847 // Set an oopmap for the call site
2848 oop_maps->add_gc_map( __ pc()-start, new OopMap( frame_size_in_words, 0 ));
2849
2850 // rax, contains the return result type
2851 __ push(rax);
2852
2853 __ get_thread(rcx);
2854 __ reset_last_Java_frame(rcx, false);
2855
2856 // Collect return values
2857 __ movptr(rax,Address(rsp, (RegisterSaver::raxOffset() + additional_words + 1)*wordSize));
2858 __ movptr(rdx,Address(rsp, (RegisterSaver::rdxOffset() + additional_words + 1)*wordSize));
2859
2860 // Clear floating point stack before returning to interpreter
2861 __ empty_FPU_stack();
2862
2863 // Check if we should push the float or double return value.
2864 Label results_done, yes_double_value;
2865 __ cmpl(Address(rsp, 0), T_DOUBLE);
2866 __ jcc (Assembler::zero, yes_double_value);
2867 __ cmpl(Address(rsp, 0), T_FLOAT);
2868 __ jcc (Assembler::notZero, results_done);
2869
2870 // return float value as expected by interpreter
2871 if( UseSSE>=1 ) __ movflt(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2872 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2873 __ jmp(results_done);
2874
2875 // return double value as expected by interpreter
2876 __ bind(yes_double_value);
2877 if( UseSSE>=2 ) __ movdbl(xmm0, Address(rsp, (RegisterSaver::xmm0Offset() + additional_words + 1)*wordSize));
2878 else __ fld_d(Address(rsp, (RegisterSaver::fpResultOffset() + additional_words + 1)*wordSize));
2879
2880 __ bind(results_done);
2881
2882 // Pop self-frame.
2883 __ leave(); // Epilog!
2884
2885 // Jump to interpreter
2886 __ ret(0);
2887
2888 // -------------
2889 // make sure all code is generated
2890 masm->flush();
2891
2892 _deopt_blob = DeoptimizationBlob::create( &buffer, oop_maps, 0, exception_offset, reexecute_offset, frame_size_in_words);
2893 _deopt_blob->set_unpack_with_exception_in_tls_offset(exception_in_tls_offset);
2894 }
2895
2896
2897 #ifdef COMPILER2
2898 //------------------------------generate_uncommon_trap_blob--------------------
2899 void SharedRuntime::generate_uncommon_trap_blob() {
2900 // allocate space for the code
2901 ResourceMark rm;
2902 // setup code generation tools
2903 CodeBuffer buffer("uncommon_trap_blob", 512, 512);
2904 MacroAssembler* masm = new MacroAssembler(&buffer);
2905
2906 enum frame_layout {
2907 arg0_off, // thread sp + 0 // Arg location for
2908 arg1_off, // unloaded_class_index sp + 1 // calling C
2909 arg2_off, // exec_mode sp + 2
2910 // The frame sender code expects that rbp will be in the "natural" place and
2911 // will override any oopMap setting for it. We must therefore force the layout
2912 // so that it agrees with the frame sender code.
2913 rbp_off, // callee saved register sp + 3
2914 return_off, // slot for return address sp + 4
2915 framesize
2916 };
2917
2918 address start = __ pc();
2919
2920 if (UseRTMLocking) {
2921 // Abort RTM transaction before possible nmethod deoptimization.
2922 __ xabort(0);
2923 }
2924
2925 // Push self-frame.
2926 __ subptr(rsp, return_off*wordSize); // Epilog!
2927
2928 // rbp, is an implicitly saved callee saved register (i.e. the calling
2929 // convention will save restore it in prolog/epilog) Other than that
2930 // there are no callee save registers no that adapter frames are gone.
2931 __ movptr(Address(rsp, rbp_off*wordSize), rbp);
2932
2933 // Clear the floating point exception stack
2934 __ empty_FPU_stack();
2935
2936 // set last_Java_sp
2937 __ get_thread(rdx);
2938 __ set_last_Java_frame(rdx, noreg, noreg, NULL);
2939
2940 // Call C code. Need thread but NOT official VM entry
2941 // crud. We cannot block on this call, no GC can happen. Call should
2942 // capture callee-saved registers as well as return values.
2943 __ movptr(Address(rsp, arg0_off*wordSize), rdx);
2944 // argument already in ECX
2945 __ movl(Address(rsp, arg1_off*wordSize),rcx);
2946 __ movl(Address(rsp, arg2_off*wordSize), Deoptimization::Unpack_uncommon_trap);
2947 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::uncommon_trap)));
2948
2949 // Set an oopmap for the call site
2950 OopMapSet *oop_maps = new OopMapSet();
2951 OopMap* map = new OopMap( framesize, 0 );
2952 // No oopMap for rbp, it is known implicitly
2953
2954 oop_maps->add_gc_map( __ pc()-start, map);
2955
2956 __ get_thread(rcx);
2957
2958 __ reset_last_Java_frame(rcx, false);
2959
2960 // Load UnrollBlock into EDI
2961 __ movptr(rdi, rax);
2962
2963 #ifdef ASSERT
2964 { Label L;
2965 __ cmpptr(Address(rdi, Deoptimization::UnrollBlock::unpack_kind_offset_in_bytes()),
2966 (int32_t)Deoptimization::Unpack_uncommon_trap);
2967 __ jcc(Assembler::equal, L);
2968 __ stop("SharedRuntime::generate_deopt_blob: expected Unpack_uncommon_trap");
2969 __ bind(L);
2970 }
2971 #endif
2972
2973 // Pop all the frames we must move/replace.
2974 //
2975 // Frame picture (youngest to oldest)
2976 // 1: self-frame (no frame link)
2977 // 2: deopting frame (no frame link)
2978 // 3: caller of deopting frame (could be compiled/interpreted).
2979
2980 // Pop self-frame. We have no frame, and must rely only on EAX and ESP.
2981 __ addptr(rsp,(framesize-1)*wordSize); // Epilog!
2982
2983 // Pop deoptimized frame
2984 __ movl2ptr(rcx, Address(rdi,Deoptimization::UnrollBlock::size_of_deoptimized_frame_offset_in_bytes()));
2985 __ addptr(rsp, rcx);
2986
2987 // sp should be pointing at the return address to the caller (3)
2988
2989 // Pick up the initial fp we should save
2990 // restore rbp before stack bang because if stack overflow is thrown it needs to be pushed (and preserved)
2991 __ movptr(rbp, Address(rdi, Deoptimization::UnrollBlock::initial_info_offset_in_bytes()));
2992
2993 #ifdef ASSERT
2994 // Compilers generate code that bang the stack by as much as the
2995 // interpreter would need. So this stack banging should never
2996 // trigger a fault. Verify that it does not on non product builds.
2997 if (UseStackBanging) {
2998 __ movl(rbx, Address(rdi ,Deoptimization::UnrollBlock::total_frame_sizes_offset_in_bytes()));
2999 __ bang_stack_size(rbx, rcx);
3000 }
3001 #endif
3002
3003 // Load array of frame pcs into ECX
3004 __ movl(rcx,Address(rdi,Deoptimization::UnrollBlock::frame_pcs_offset_in_bytes()));
3005
3006 __ pop(rsi); // trash the pc
3007
3008 // Load array of frame sizes into ESI
3009 __ movptr(rsi,Address(rdi,Deoptimization::UnrollBlock::frame_sizes_offset_in_bytes()));
3010
3011 Address counter(rdi, Deoptimization::UnrollBlock::counter_temp_offset_in_bytes());
3012
3013 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::number_of_frames_offset_in_bytes()));
3014 __ movl(counter, rbx);
3015
3016 // Now adjust the caller's stack to make up for the extra locals
3017 // but record the original sp so that we can save it in the skeletal interpreter
3018 // frame and the stack walking of interpreter_sender will get the unextended sp
3019 // value and not the "real" sp value.
3020
3021 Address sp_temp(rdi, Deoptimization::UnrollBlock::sender_sp_temp_offset_in_bytes());
3022 __ movptr(sp_temp, rsp);
3023 __ movl(rbx, Address(rdi, Deoptimization::UnrollBlock::caller_adjustment_offset_in_bytes()));
3024 __ subptr(rsp, rbx);
3025
3026 // Push interpreter frames in a loop
3027 Label loop;
3028 __ bind(loop);
3029 __ movptr(rbx, Address(rsi, 0)); // Load frame size
3030 __ subptr(rbx, 2*wordSize); // we'll push pc and rbp, by hand
3031 __ pushptr(Address(rcx, 0)); // save return address
3032 __ enter(); // save old & set new rbp,
3033 __ subptr(rsp, rbx); // Prolog!
3034 __ movptr(rbx, sp_temp); // sender's sp
3035 // This value is corrected by layout_activation_impl
3036 __ movptr(Address(rbp, frame::interpreter_frame_last_sp_offset * wordSize), NULL_WORD );
3037 __ movptr(Address(rbp, frame::interpreter_frame_sender_sp_offset * wordSize), rbx); // Make it walkable
3038 __ movptr(sp_temp, rsp); // pass to next frame
3039 __ addptr(rsi, wordSize); // Bump array pointer (sizes)
3040 __ addptr(rcx, wordSize); // Bump array pointer (pcs)
3041 __ decrementl(counter); // decrement counter
3042 __ jcc(Assembler::notZero, loop);
3043 __ pushptr(Address(rcx, 0)); // save final return address
3044
3045 // Re-push self-frame
3046 __ enter(); // save old & set new rbp,
3047 __ subptr(rsp, (framesize-2) * wordSize); // Prolog!
3048
3049
3050 // set last_Java_sp, last_Java_fp
3051 __ get_thread(rdi);
3052 __ set_last_Java_frame(rdi, noreg, rbp, NULL);
3053
3054 // Call C code. Need thread but NOT official VM entry
3055 // crud. We cannot block on this call, no GC can happen. Call should
3056 // restore return values to their stack-slots with the new SP.
3057 __ movptr(Address(rsp,arg0_off*wordSize),rdi);
3058 __ movl(Address(rsp,arg1_off*wordSize), Deoptimization::Unpack_uncommon_trap);
3059 __ call(RuntimeAddress(CAST_FROM_FN_PTR(address, Deoptimization::unpack_frames)));
3060 // Set an oopmap for the call site
3061 oop_maps->add_gc_map( __ pc()-start, new OopMap( framesize, 0 ) );
3062
3063 __ get_thread(rdi);
3064 __ reset_last_Java_frame(rdi, true);
3065
3066 // Pop self-frame.
3067 __ leave(); // Epilog!
3068
3069 // Jump to interpreter
3070 __ ret(0);
3071
3072 // -------------
3073 // make sure all code is generated
3074 masm->flush();
3075
3076 _uncommon_trap_blob = UncommonTrapBlob::create(&buffer, oop_maps, framesize);
3077 }
3078 #endif // COMPILER2
3079
3080 //------------------------------generate_handler_blob------
3081 //
3082 // Generate a special Compile2Runtime blob that saves all registers,
3083 // setup oopmap, and calls safepoint code to stop the compiled code for
3084 // a safepoint.
3085 //
3086 SafepointBlob* SharedRuntime::generate_handler_blob(address call_ptr, int poll_type) {
3087
3088 // Account for thread arg in our frame
3089 const int additional_words = 1;
3090 int frame_size_in_words;
3091
3092 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3093
3094 ResourceMark rm;
3095 OopMapSet *oop_maps = new OopMapSet();
3096 OopMap* map;
3097
3098 // allocate space for the code
3099 // setup code generation tools
3100 CodeBuffer buffer("handler_blob", 1024, 512);
3101 MacroAssembler* masm = new MacroAssembler(&buffer);
3102
3103 const Register java_thread = rdi; // callee-saved for VC++
3104 address start = __ pc();
3105 address call_pc = NULL;
3106 bool cause_return = (poll_type == POLL_AT_RETURN);
3107 bool save_vectors = (poll_type == POLL_AT_VECTOR_LOOP);
3108
3109 if (UseRTMLocking) {
3110 // Abort RTM transaction before calling runtime
3111 // because critical section will be large and will be
3112 // aborted anyway. Also nmethod could be deoptimized.
3113 __ xabort(0);
3114 }
3115
3116 // If cause_return is true we are at a poll_return and there is
3117 // the return address on the stack to the caller on the nmethod
3118 // that is safepoint. We can leave this return on the stack and
3119 // effectively complete the return and safepoint in the caller.
3120 // Otherwise we push space for a return address that the safepoint
3121 // handler will install later to make the stack walking sensible.
3122 if (!cause_return)
3123 __ push(rbx); // Make room for return address (or push it again)
3124
3125 map = RegisterSaver::save_live_registers(masm, additional_words, &frame_size_in_words, false, save_vectors);
3126
3127 // The following is basically a call_VM. However, we need the precise
3128 // address of the call in order to generate an oopmap. Hence, we do all the
3129 // work ourselves.
3130
3131 // Push thread argument and setup last_Java_sp
3132 __ get_thread(java_thread);
3133 __ push(java_thread);
3134 __ set_last_Java_frame(java_thread, noreg, noreg, NULL);
3135
3136 // if this was not a poll_return then we need to correct the return address now.
3137 if (!cause_return) {
3138 // Get the return pc saved by the signal handler and stash it in its appropriate place on the stack.
3139 // Additionally, rbx is a callee saved register and we can look at it later to determine
3140 // if someone changed the return address for us!
3141 __ movptr(rbx, Address(java_thread, JavaThread::saved_exception_pc_offset()));
3142 __ movptr(Address(rbp, wordSize), rbx);
3143 }
3144
3145 // do the call
3146 __ call(RuntimeAddress(call_ptr));
3147
3148 // Set an oopmap for the call site. This oopmap will map all
3149 // oop-registers and debug-info registers as callee-saved. This
3150 // will allow deoptimization at this safepoint to find all possible
3151 // debug-info recordings, as well as let GC find all oops.
3152
3153 oop_maps->add_gc_map( __ pc() - start, map);
3154
3155 // Discard arg
3156 __ pop(rcx);
3157
3158 Label noException;
3159
3160 // Clear last_Java_sp again
3161 __ get_thread(java_thread);
3162 __ reset_last_Java_frame(java_thread, false);
3163
3164 __ cmpptr(Address(java_thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3165 __ jcc(Assembler::equal, noException);
3166
3167 // Exception pending
3168 RegisterSaver::restore_live_registers(masm, save_vectors);
3169
3170 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3171
3172 __ bind(noException);
3173
3174 Label no_adjust, bail, not_special;
3175 if (SafepointMechanism::uses_thread_local_poll() && !cause_return) {
3176 // If our stashed return pc was modified by the runtime we avoid touching it
3177 __ cmpptr(rbx, Address(rbp, wordSize));
3178 __ jccb(Assembler::notEqual, no_adjust);
3179
3180 // Skip over the poll instruction.
3181 // See NativeInstruction::is_safepoint_poll()
3182 // Possible encodings:
3183 // 85 00 test %eax,(%rax)
3184 // 85 01 test %eax,(%rcx)
3185 // 85 02 test %eax,(%rdx)
3186 // 85 03 test %eax,(%rbx)
3187 // 85 06 test %eax,(%rsi)
3188 // 85 07 test %eax,(%rdi)
3189 //
3190 // 85 04 24 test %eax,(%rsp)
3191 // 85 45 00 test %eax,0x0(%rbp)
3192
3193 #ifdef ASSERT
3194 __ movptr(rax, rbx); // remember where 0x85 should be, for verification below
3195 #endif
3196 // rsp/rbp base encoding takes 3 bytes with the following register values:
3197 // rsp 0x04
3198 // rbp 0x05
3199 __ movzbl(rcx, Address(rbx, 1));
3200 __ andptr(rcx, 0x07); // looking for 0x04 .. 0x05
3201 __ subptr(rcx, 4); // looking for 0x00 .. 0x01
3202 __ cmpptr(rcx, 1);
3203 __ jcc(Assembler::above, not_special);
3204 __ addptr(rbx, 1);
3205 __ bind(not_special);
3206 #ifdef ASSERT
3207 // Verify the correct encoding of the poll we're about to skip.
3208 __ cmpb(Address(rax, 0), NativeTstRegMem::instruction_code_memXregl);
3209 __ jcc(Assembler::notEqual, bail);
3210 // Mask out the modrm bits
3211 __ testb(Address(rax, 1), NativeTstRegMem::modrm_mask);
3212 // rax encodes to 0, so if the bits are nonzero it's incorrect
3213 __ jcc(Assembler::notZero, bail);
3214 #endif
3215 // Adjust return pc forward to step over the safepoint poll instruction
3216 __ addptr(rbx, 2);
3217 __ movptr(Address(rbp, wordSize), rbx);
3218 }
3219
3220 __ bind(no_adjust);
3221 // Normal exit, register restoring and exit
3222 RegisterSaver::restore_live_registers(masm, save_vectors);
3223
3224 __ ret(0);
3225
3226 #ifdef ASSERT
3227 __ bind(bail);
3228 __ stop("Attempting to adjust pc to skip safepoint poll but the return point is not what we expected");
3229 #endif
3230
3231 // make sure all code is generated
3232 masm->flush();
3233
3234 // Fill-out other meta info
3235 return SafepointBlob::create(&buffer, oop_maps, frame_size_in_words);
3236 }
3237
3238 //
3239 // generate_resolve_blob - call resolution (static/virtual/opt-virtual/ic-miss
3240 //
3241 // Generate a stub that calls into vm to find out the proper destination
3242 // of a java call. All the argument registers are live at this point
3243 // but since this is generic code we don't know what they are and the caller
3244 // must do any gc of the args.
3245 //
3246 RuntimeStub* SharedRuntime::generate_resolve_blob(address destination, const char* name) {
3247 assert (StubRoutines::forward_exception_entry() != NULL, "must be generated before");
3248
3249 // allocate space for the code
3250 ResourceMark rm;
3251
3252 CodeBuffer buffer(name, 1000, 512);
3253 MacroAssembler* masm = new MacroAssembler(&buffer);
3254
3255 int frame_size_words;
3256 enum frame_layout {
3257 thread_off,
3258 extra_words };
3259
3260 OopMapSet *oop_maps = new OopMapSet();
3261 OopMap* map = NULL;
3262
3263 int start = __ offset();
3264
3265 map = RegisterSaver::save_live_registers(masm, extra_words, &frame_size_words);
3266
3267 int frame_complete = __ offset();
3268
3269 const Register thread = rdi;
3270 __ get_thread(rdi);
3271
3272 __ push(thread);
3273 __ set_last_Java_frame(thread, noreg, rbp, NULL);
3274
3275 __ call(RuntimeAddress(destination));
3276
3277
3278 // Set an oopmap for the call site.
3279 // We need this not only for callee-saved registers, but also for volatile
3280 // registers that the compiler might be keeping live across a safepoint.
3281
3282 oop_maps->add_gc_map( __ offset() - start, map);
3283
3284 // rax, contains the address we are going to jump to assuming no exception got installed
3285
3286 __ addptr(rsp, wordSize);
3287
3288 // clear last_Java_sp
3289 __ reset_last_Java_frame(thread, true);
3290 // check for pending exceptions
3291 Label pending;
3292 __ cmpptr(Address(thread, Thread::pending_exception_offset()), (int32_t)NULL_WORD);
3293 __ jcc(Assembler::notEqual, pending);
3294
3295 // get the returned Method*
3296 __ get_vm_result_2(rbx, thread);
3297 __ movptr(Address(rsp, RegisterSaver::rbx_offset() * wordSize), rbx);
3298
3299 __ movptr(Address(rsp, RegisterSaver::rax_offset() * wordSize), rax);
3300
3301 RegisterSaver::restore_live_registers(masm);
3302
3303 // We are back the the original state on entry and ready to go.
3304
3305 __ jmp(rax);
3306
3307 // Pending exception after the safepoint
3308
3309 __ bind(pending);
3310
3311 RegisterSaver::restore_live_registers(masm);
3312
3313 // exception pending => remove activation and forward to exception handler
3314
3315 __ get_thread(thread);
3316 __ movptr(Address(thread, JavaThread::vm_result_offset()), NULL_WORD);
3317 __ movptr(rax, Address(thread, Thread::pending_exception_offset()));
3318 __ jump(RuntimeAddress(StubRoutines::forward_exception_entry()));
3319
3320 // -------------
3321 // make sure all code is generated
3322 masm->flush();
3323
3324 // return the blob
3325 // frame_size_words or bytes??
3326 return RuntimeStub::new_runtime_stub(name, &buffer, frame_complete, frame_size_words, oop_maps, true);
3327 }