181 } else if ((con = in(2)->find_int_con(0)) == 0) {
182 return MulNode::Ideal(phase, can_reshape);
183 }
184
185 // Now we have a constant Node on the right and the constant in con
186 if (con == 0) return NULL; // By zero is handled by Value call
187 if (con == 1) return NULL; // By one is handled by Identity call
188
189 // Check for negative constant; if so negate the final result
190 bool sign_flip = false;
191
192 unsigned int abs_con = uabs(con);
193 if (abs_con != (unsigned int)con) {
194 sign_flip = true;
195 }
196
197 // Get low bit; check for being the only bit
198 Node *res = NULL;
199 unsigned int bit1 = abs_con & (0-abs_con); // Extract low bit
200 if (bit1 == abs_con) { // Found a power of 2?
201 res = new (phase->C) LShiftINode(in(1), phase->intcon(log2_intptr(bit1)));
202 } else {
203
204 // Check for constant with 2 bits set
205 unsigned int bit2 = abs_con-bit1;
206 bit2 = bit2 & (0-bit2); // Extract 2nd bit
207 if (bit2 + bit1 == abs_con) { // Found all bits in con?
208 Node *n1 = phase->transform( new (phase->C) LShiftINode(in(1), phase->intcon(log2_intptr(bit1))));
209 Node *n2 = phase->transform( new (phase->C) LShiftINode(in(1), phase->intcon(log2_intptr(bit2))));
210 res = new (phase->C) AddINode(n2, n1);
211
212 } else if (is_power_of_2(abs_con+1)) {
213 // Sleezy: power-of-2 -1. Next time be generic.
214 unsigned int temp = abs_con + 1;
215 Node *n1 = phase->transform(new (phase->C) LShiftINode(in(1), phase->intcon(log2_intptr(temp))));
216 res = new (phase->C) SubINode(n1, in(1));
217 } else {
218 return MulNode::Ideal(phase, can_reshape);
219 }
220 }
221
222 if (sign_flip) { // Need to negate result?
223 res = phase->transform(res);// Transform, before making the zero con
224 res = new (phase->C) SubINode(phase->intcon(0),res);
225 }
226
227 return res; // Return final result
228 }
229
230 //------------------------------mul_ring---------------------------------------
231 // Compute the product type of two integer ranges into this node.
232 const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const {
233 const TypeInt *r0 = t0->is_int(); // Handy access
234 const TypeInt *r1 = t1->is_int();
235
427 }
428
429 return TypeInt::INT; // No constants to be had
430 }
431
432 //------------------------------Identity---------------------------------------
433 // Masking off the high bits of an unsigned load is not required
434 Node *AndINode::Identity( PhaseTransform *phase ) {
435
436 // x & x => x
437 if (phase->eqv(in(1), in(2))) return in(1);
438
439 Node* in1 = in(1);
440 uint op = in1->Opcode();
441 const TypeInt* t2 = phase->type(in(2))->isa_int();
442 if (t2 && t2->is_con()) {
443 int con = t2->get_con();
444 // Masking off high bits which are always zero is useless.
445 const TypeInt* t1 = phase->type( in(1) )->isa_int();
446 if (t1 != NULL && t1->_lo >= 0) {
447 jint t1_support = right_n_bits(1 + log2_intptr(t1->_hi));
448 if ((t1_support & con) == t1_support)
449 return in1;
450 }
451 // Masking off the high bits of a unsigned-shift-right is not
452 // needed either.
453 if (op == Op_URShiftI) {
454 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
455 if (t12 && t12->is_con()) { // Shift is by a constant
456 int shift = t12->get_con();
457 shift &= BitsPerJavaInteger - 1; // semantics of Java shifts
458 int mask = max_juint >> shift;
459 if ((mask & con) == mask) // If AND is useless, skip it
460 return in1;
461 }
462 }
463 }
464 return MulNode::Identity(phase);
465 }
466
467 //------------------------------Ideal------------------------------------------
|
181 } else if ((con = in(2)->find_int_con(0)) == 0) {
182 return MulNode::Ideal(phase, can_reshape);
183 }
184
185 // Now we have a constant Node on the right and the constant in con
186 if (con == 0) return NULL; // By zero is handled by Value call
187 if (con == 1) return NULL; // By one is handled by Identity call
188
189 // Check for negative constant; if so negate the final result
190 bool sign_flip = false;
191
192 unsigned int abs_con = uabs(con);
193 if (abs_con != (unsigned int)con) {
194 sign_flip = true;
195 }
196
197 // Get low bit; check for being the only bit
198 Node *res = NULL;
199 unsigned int bit1 = abs_con & (0-abs_con); // Extract low bit
200 if (bit1 == abs_con) { // Found a power of 2?
201 res = new (phase->C) LShiftINode(in(1), phase->intcon(log2_uint(bit1)));
202 } else {
203
204 // Check for constant with 2 bits set
205 unsigned int bit2 = abs_con-bit1;
206 bit2 = bit2 & (0-bit2); // Extract 2nd bit
207 if (bit2 + bit1 == abs_con) { // Found all bits in con?
208 Node *n1 = phase->transform( new (phase->C) LShiftINode(in(1), phase->intcon(log2_uint(bit1))));
209 Node *n2 = phase->transform( new (phase->C) LShiftINode(in(1), phase->intcon(log2_uint(bit2))));
210 res = new (phase->C) AddINode(n2, n1);
211
212 } else if (is_power_of_2(abs_con+1)) {
213 // Sleezy: power-of-2 -1. Next time be generic.
214 unsigned int temp = abs_con + 1;
215 Node *n1 = phase->transform(new (phase->C) LShiftINode(in(1), phase->intcon(log2_uint(temp))));
216 res = new (phase->C) SubINode(n1, in(1));
217 } else {
218 return MulNode::Ideal(phase, can_reshape);
219 }
220 }
221
222 if (sign_flip) { // Need to negate result?
223 res = phase->transform(res);// Transform, before making the zero con
224 res = new (phase->C) SubINode(phase->intcon(0),res);
225 }
226
227 return res; // Return final result
228 }
229
230 //------------------------------mul_ring---------------------------------------
231 // Compute the product type of two integer ranges into this node.
232 const Type *MulINode::mul_ring(const Type *t0, const Type *t1) const {
233 const TypeInt *r0 = t0->is_int(); // Handy access
234 const TypeInt *r1 = t1->is_int();
235
427 }
428
429 return TypeInt::INT; // No constants to be had
430 }
431
432 //------------------------------Identity---------------------------------------
433 // Masking off the high bits of an unsigned load is not required
434 Node *AndINode::Identity( PhaseTransform *phase ) {
435
436 // x & x => x
437 if (phase->eqv(in(1), in(2))) return in(1);
438
439 Node* in1 = in(1);
440 uint op = in1->Opcode();
441 const TypeInt* t2 = phase->type(in(2))->isa_int();
442 if (t2 && t2->is_con()) {
443 int con = t2->get_con();
444 // Masking off high bits which are always zero is useless.
445 const TypeInt* t1 = phase->type( in(1) )->isa_int();
446 if (t1 != NULL && t1->_lo >= 0) {
447 jint t1_support = right_n_bits(1 + log2_jint(t1->_hi));
448 if ((t1_support & con) == t1_support)
449 return in1;
450 }
451 // Masking off the high bits of a unsigned-shift-right is not
452 // needed either.
453 if (op == Op_URShiftI) {
454 const TypeInt* t12 = phase->type(in1->in(2))->isa_int();
455 if (t12 && t12->is_con()) { // Shift is by a constant
456 int shift = t12->get_con();
457 shift &= BitsPerJavaInteger - 1; // semantics of Java shifts
458 int mask = max_juint >> shift;
459 if ((mask & con) == mask) // If AND is useless, skip it
460 return in1;
461 }
462 }
463 }
464 return MulNode::Identity(phase);
465 }
466
467 //------------------------------Ideal------------------------------------------
|