src/hotspot/cpu/x86/x86_64.ad

*** 5367,5398 ****
  instruct loadKlass(rRegP dst, memory mem)
  %{
    match(Set dst (LoadKlass mem));
  
    ins_cost(125); // XXX
!   format %{ "movq    $dst, $mem\t# class\n\t"
!             "shlq    $dst, oopDesc::storage_props_nof_bits\n\t"
!             "shrq    $dst, oopDesc::storage_props_nof_bits" %}
!   ins_encode %{
!     __ movptr($dst$$Register, $mem$$Address);
!     __ shlq($dst$$Register, oopDesc::storage_props_nof_bits);
!     __ shrq($dst$$Register, oopDesc::storage_props_nof_bits);
!   %}
    ins_pipe(ialu_reg_mem); // XXX
  %}
  
  // Load narrow Klass Pointer
  instruct loadNKlass(rRegN dst, memory mem)
  %{
    match(Set dst (LoadNKlass mem));
  
    ins_cost(125); // XXX
!   format %{ "movl    $dst, $mem\t# compressed klass ptr\n\t"
!             "andl    $dst, oopDesc::compressed_klass_mask()" %}
    ins_encode %{
      __ movl($dst$$Register, $mem$$Address);
-     __ andl($dst$$Register, oopDesc::compressed_klass_mask());
    %}
    ins_pipe(ialu_reg_mem); // XXX
  %}
  
  // Load Float
--- 5367,5391 ----
  instruct loadKlass(rRegP dst, memory mem)
  %{
    match(Set dst (LoadKlass mem));
  
    ins_cost(125); // XXX
!   format %{ "movq    $dst, $mem\t# class" %}
!   opcode(0x8B);
!   ins_encode(REX_reg_mem_wide(dst, mem), OpcP, reg_mem(dst, mem));
    ins_pipe(ialu_reg_mem); // XXX
  %}
  
  // Load narrow Klass Pointer
  instruct loadNKlass(rRegN dst, memory mem)
  %{
    match(Set dst (LoadNKlass mem));
  
    ins_cost(125); // XXX
!   format %{ "movl    $dst, $mem\t# compressed klass ptr" %}
    ins_encode %{
      __ movl($dst$$Register, $mem$$Address);
    %}
    ins_pipe(ialu_reg_mem); // XXX
  %}
  
  // Load Float
*** 6931,6940 ****
--- 6924,6960 ----
      }
    %}
    ins_pipe(ialu_reg_reg); // XXX
  %}
  
+ instruct castN2I(rRegI dst, rRegN src)
+ %{
+   match(Set dst (CastN2I src));
+ 
+   format %{ "movl    $dst, $src\t# compressed ptr -> int" %}
+   ins_encode %{
+     if ($dst$$reg != $src$$reg) {
+       __ movl($dst$$Register, $src$$Register);
+     }
+   %}
+   ins_pipe(ialu_reg_reg); // XXX
+ %}
+ 
+ instruct castI2N(rRegN dst, rRegI src)
+ %{
+   match(Set dst (CastI2N src));
+ 
+   format %{ "movl    $dst, $src\t# int -> compressed ptr" %}
+   ins_encode %{
+     if ($dst$$reg != $src$$reg) {
+       __ movl($dst$$Register, $src$$Register);
+     }
+   %}
+   ins_pipe(ialu_reg_reg); // XXX
+ %}
+ 
+ 
  // Convert oop into int for vectors alignment masking
  instruct convP2I(rRegI dst, rRegP src)
  %{
    match(Set dst (ConvL2I (CastP2X src)));